Using collaborative simulation process to …...Simulation Process and Data Management (SDM) 24 - 25...

© 2010 ANSYS, Inc. All rights reserved. 1 ANSYS, Inc. Proprietary© 2010 ANSYS, Inc. All rights reserved. 1 ANSYS, Inc. Proprietary

NAFEMS European Conference:

Simulation Process and Data Management

(SDM)

24 - 25 November 2010, Frankfurt, Germany

Using collaborative

simulation process to

accelerate the Thermally

Aware Chip Design

Thomas Lehnhäuser,

Kamal Karimanal,

Shantanu Bhide,

Vamsi Krishna,

Kapil Sahu,

Pankaj Gupta

© 2010 ANSYS, Inc. All rights reserved. 2 ANSYS, Inc. Proprietary

Motivation

• Well-known for its

simulation software

products

• Data management

software (EKM)

Chip

Manufacturer

• Chip design expertise

• Seeks for

improvements in

simulation process

Collaborate on a new

approach for

simulating the thermal

behavior of chips


Challenges in simulation

Multiple analysts working on same project

Search and reuse previous simulations

Global deployment and Collaboration

?

Collaboration Search and Reuse

Deployment


Simulation Collaboration

EKMManage data, process,

and deployment

Multiple analysis runs?

What-if study ?

Simulation decisions ?

Reports ?


end user

Compute

serverFile & web

servers

Engineering Knowledge Manager

File Repository

Meta-Data Extraction

Advanced Search

Data Mining

Report Generation

Automate Processes

Manage Workflows

Design Systems

E-mail Notification

Track Progress

PROCESS MANAGEMENTDATA MANAGEMENT

Enterprise Access

Web Enabled

ACCESS MANAGEMENT

Application Portal

Job Submission


Technical Background

• Semi conductor Gate lengths are

shrinking – 28 nm

– Higher concentration of heat dissipation

– Leakage current

• Function of temperature

– Higher temperature -> more

leakage

• High level of integration on CPU/GPU

– Multi cores, Memory, other functionality?

• Heat generation is not uniform

• Keeps moving based on end user

application

• Employed Simulation techniques

– Chip design simulation

– Thermal simulation

Intel Pentium 4 (2000)

(42 million transistors)

Intel386™ (1985)

(0.275 million transistors)


Traditional Thermal Management

Process

Chip Designer

Power map

Thermal Engineer

EDA Software

Temperature

Map

ANSYS Icepak Supplier

Issues with this approach

- Data exchange

- Data consistency

- Reponse time


Enhanced Thermal Management

Process

Chip DesignerT-Estimator

Pre-Characterization

Passive Heat sink Cooling

(Telecom FPGA & ASICS)

Active Heat sink Cooling

(CPUs and GPUs)

Liquid Cooling

(High End GPUs & Supercomputer CPUs)


Thermal Engineer



• Suppose that the relation between power

load and temperature is described by a

linear system: [T] = [C] * [Q]

• [T]: m X 1 matrix of temperature

responses

• [C]: mXn matrix of self and mutual

influence coefficients

• [Q]: power map represented in

nX1 matrix form

• Pre-characterization is the process of

determining the CmXn coefficient matrix

for one cooling design

• Thermal simulation was performed to

power the n sources of the power map

array in a linearly independent manner

1 W 0 W 0 W

0 W 0 W 0 W

0 W 0 W 0 W

0 W 1 W 0 W

0 W 0 W 0 W

0 W 0 W 0 W

370K 350K 330K

360K 340K 330K

320K 330K 330K

350K 350K 340K

340K 380K 340K

340K 330K 340K


Validation of approach

System level

Validation Setup

Thermal EngineerANSYS Icepak


Enhanced Thermal Management

Process

Chip Designer


Passive Heat sink Cooling

(Telecom FPGA & ASICS)

Active Heat sink Cooling

(CPUs and GPUs)

Liquid Cooling

(High End GPUs & Supercomputer CPUs)


Thermal Engineer

Data Life Cycle

Version Control

Global Data Repository

Custom Applications

Reporting

Searching

T-Estimator


Generate new libraries

Publish new libraries on

EKM

Request new life cycle

stage

Change of stage for outdated libraries



EKM


stage




EKM


stage




EKM


stage

Change stage for outdated libraries

Workflow in EKM

Thermal Engineer


Check out Project and provide new

powermap

Execute Thermal estimator

Generate report

Check in project


powermap


Generate report

Check in project


powermap


Generate report

Check in project


powermap


Generate report

Check in project

Workflow in EKM

Chip Designer


Advantages

• Thermal result obtained from EKM based solution is more reliable since there is less chance file corruption

• Better risk management using EKM based solution

• Results can be shared easily among analysts/designers

• Thermal result library created in Icepak can be maintaied and enhanced in EKM in a user friendly way. Leads to collaboration between Analysts and Designers

Using collaborative simulation process to …...Simulation Process and Data Management (SDM) 24 - 25...

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