Use Cases of SystemC Deploymentin Philips Semiconductors

Badri Seshadri, R M Sandeep,badri.seshadri@philips.com sandeep.rm@philips.comPhilips Semiconductors, Philips Semiconductors,India. India.

Philips Semiconductors India BS & SRM 27-09-2005 2

Agenda

• Virtual Prototype Environment (VPE)• Use cases of SystemC Modeling

– Architecture Exploration (AE)– Early Software Development

• Challenges for SystemC

Philips Semiconductors India BS & SRM 27-09-2005 3

Agenda

• Virtual Prototype Environment (VPE)• Use cases of SystemC Modeling

– Architecture Exploration (AE)– Early Software Development

• Challenges for SystemC

Philips Semiconductors India BS & SRM 27-09-2005 4

Virtual Prototype Environment

HW Debug

SW Debug

Performance analysis

Philips Semiconductors India BS & SRM 27-09-2005 5

Agenda

• Virtual Prototype Environment (VPE)• Use cases of SystemC Modeling

– Architecture Exploration (AE)– Early Software Development

• Challenges for SystemC

Philips Semiconductors India BS & SRM 27-09-2005 6

Use cases of SystemC Modeling

• Architecture Exploration– For Car Infotainment Systems

• Early Software Development– Linux Porting on SystemC VPE– Mobile devices

Philips Semiconductors India BS & SRM 27-09-2005 7

Agenda

• Virtual Prototype Environment (VPE)• Use cases of SystemC Modeling

– Architecture Exploration (AE)– Early Software Development

• Challenges for SystemC

Philips Semiconductors India BS & SRM 27-09-2005 8

How did VPE add value ?

Both Audio andRadio devicesrun on the sameclock.

Audio and Radiodevices on twodifferent clockdomains.

VPE showed that when the clock period for Audio devices isreduced by half, the application ran twice as fast as before

AE1: Splitting of Data-switching networkData-switching network

Radio Input/output devices Audio Input /outputdevices

Core 0 Core 1 Core 2 Core 3

Clock

Data-switching network 1 Data-switching network 2

Radio Input/outputdevices

Audio Input/outputdevices

Core 0 Core 1 Core 2 Core 3

Clock 1 Clock 2

Philips Semiconductors India BS & SRM 27-09-2005 9

0-

0xFFFFDMA

Core Memory is shared,hence arbitration isneeded

Core now has aseparate memory andhence will not bestalled

How did VPE add value ?

VPE showed that DMA cannot access first part of memory (address can beconfigured) and core would not get stalled in first part of memory

AE2: Splitting of Memory

0-0x7FFF

0x8000–0xFFFF

DMA

Core

Philips Semiconductors India BS & SRM 27-09-2005 10

0-0x7FFF

0x8000–0xFFFF

DMA

Core

How did VPE add value ?

Even though Core has exclusive access to first part of memory, there is a possibility of it getting stalled when trying to access second part of memory

VPE provided a re-configurable software register for giving thearbitration value (example 2/3, 3/4, 4/5, 5/6,..)

VPE showed that when given an appropriate value, core stalls can beminimized and number of cycles taken by the application to completeexecution can be reduced

AE3: Arbitration of DMA

0

5000

10000

15000

20000

25000

2 3 4 5 6 7

r=(x-1)/x

Stalls

Stalls Worst case stalls (mem access)

Calculated worst case stalls

Measured stalls

!"

!#$

#%

&accessesmemory measured ofnumber

1

r

r

Philips Semiconductors India BS & SRM 27-09-2005 11

Agenda

• Virtual Prototype Environment (VPE)• Use cases of SystemC Modeling

– Architecture Exploration (AE)– Early Software Development

• Challenges for SystemC

Philips Semiconductors India BS & SRM 27-09-2005 12

Linux porting on SystemC VPE

AXI Network

ARM11

UARTTimer

Watch dog

Interrupt Controller

DMAC

SRAM Memory

Ctrl

SDRAMMemory

Ctrl

Philips Semiconductors India BS & SRM 27-09-2005 13

Early S/W development for PhilipsMultimedia Application Processor

CPU Sub-SystemARM1176 350MHz

Video Engine:ProgrammableHigh PerformancePhilips TriMedia™

Audio Engine:Dedicated PhilipsAudio DSP Sub-System

Graphics Engine:HW assisted 2D/3Dengine based

Security Engine:Dedicated HW forsecurity tasks

Philips Multimedia Application Processor

Philips Semiconductors India BS & SRM 27-09-2005 14

Early S/W development for PhilipsMultimedia Co-processor

TV Out(CVBS & S-Video)

Sub -display

Main -display

PhilipsMultimedia

Co-processor

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Agenda

• Virtual Prototype Environment (VPE)• Use cases of SystemC Modeling

– Architecture Exploration (AE)– Early Software Development

• Challenges for SystemC

Philips Semiconductors India BS & SRM 27-09-2005 16

Challenges for SystemC

• Simulation Speed (64-bit Linux machine,2.2 GHz)– 2.3 M cycles/sec One SC_METHOD– 1.7 M cycles/sec One SC_THREAD

• VPE speed achieved for loading Linux– 60 K cycles/sec in PVT– 180 K instructions/sec in PV

• Interoperability of models among differentcompanies

Philips Semiconductors India BS & SRM 27-09-2005 17

Thank you for the attention

Questions