Update on the Design of a Slew Controlled LVDS Driver Circuit

Gianluca Traversi for the BG-PV group

Outline

! Nominal simulation results with CLC line – 320 Mbps

! Nominal simulation results with CLC line – 640 Mpbs

! Nominal simulation results with 2cm, 7cm 8cm transmission line (Kovacs Model)

! Corners and temperature simulation

! Monte Carlo (mismatch) simulation

! Conclusions and next steps

Schematic TX + LINE (TEST BENCH)

DRIVER Current reference

Pre-driver

CMFB

VA

VB

Differential output voltage: VOD = VA-VB

TX = Driver + CMFB + Pre-driver + current reference

rppolywo +

rnpolywo

rppolywo +

rnpolywo

Nominal simulation results with CLC line – 320 Mbps Transmission Line:

CP=1pF CL=2pF LS=4nH RT=100!

Simulation details: " 320 Mbps " Receiver not connected " Transient noise

VOD

VA

VB

Nominal Value

VOCM [mV] (average) 608

VOD (Transient Peak) [mV] 127

Power Consumption TX [mW] 2.0

VA

VB

Nominal simulation results with CLC line – 640 Mbps Transmission Line: Simulation details:

" 640 Mbps " Receiver not connected " Transient noise

Nominal Value

VOCM [mV] (average) 609

VOD (Transient Peak) [mV] 127

Power Consumption TX [mW] 2.2

CP=1pF CL=2pF LS=4nH RT=100!

VOD

VA

VB

VA

VB

Nominal simulation results with CLC line

Comparison between the compensated and

uncompensated driver

Simulation details: " 640 Mbps " Receiver not connected " Transient noise " Ls=4nH

Driver compensated

Driver not compensated

CP=1pF CL=2pF LS=4nH RT=100!

VA

VB

Normalized Transfer function

L=0.4nH

L=4nH

L=12nH L=40nH

Nominal simulation results with CLC line CP=1pF CL=2pF LS=1nH, 8nH, 10nH RT=100!

Simulation details: " 640 Mbps " Receiver not connected " Transient noise

Ls=0.4nH Ls=8nH

VB

VA

VOD

VOD NC

VOD NC: VA-VB uncompensated version

VB

VA

VOD

VOD NC

Ls=1nH

VB

Ls=12nH

VA

VOD

Nominal simulation results with CLC line Simulation details: " 640 Mbps " Receiver not connected " Transient noise " Ls=8nH

CD=1pF

- The overshoot can be reduced by means of a tunable CD

CD=2pF (tuned)

VOD

Corners and temperature simulation

" Corners: TT, FF, SS, FS, SF " Temperature: -25°C, -10°C, 0°C, 27°C, 50°C, 75°C

Min Max

VOCM [mV] (average) 604.9 612.2

VOD (Transient Peak) [mV] 108.2 157.8

Power Consumption TX [mW] 1.9 2.8

ff

ss

VA

VB

Simulation details: " 640 Mbps " Receiver not connected

30 simulations

Transmission Line:

CP=1pF CL=2pF LS=4nH RT=100!

VA

VB

Monte Carlo Analysis " 500 mismatch simulations " Temperature 27°C

Min Max Mean Std. dev.

VOCM [mV] (average) 604.6 612.1 608.4 1.3

VOD (Transient Peak) [mV] 116.5 142.1 129.3 4.2

ss

VA

VB

Simulation details: " 640 Mbps " Receiver not connected " Transient noise

VA-VB

VA and VB

VA

VB VOD

Transmission Line:

CP=1pF CL=2pF LS=4nH RT=100!

VA

VB

Nominal simulation results with Kovacs’s model line Simulation details: " 640 Mbps " Receiver not connected " Transient noise

Length = 2cm Length = 7cm Length = 8cm

Nominal simulation results with Kovacs’s model line

Pre-driver input signals

VA - VB

Nominal simulation results with Kovacs’s model line Simulation details: " 640 Mbps " Receiver not connected " Transient noise " Length=8cm

Comparison between the compensated and uncompensated driver

Driver compensated

Driver uncompensated

the eye diagram of the uncompensated version is more open but it shows a ringing effect on the rise edge

Next step: change CP, CL, LS, RT to fit the eye diagram obtained with Kovacs’s model

Tune RD and CD with these values

Layout

83 um

47 um

120 um

100 um

200 um

300um

Global Layout " Linear Bonding Approach using CUP I/O

" 10 um filler

" PDB3A tpan65lpnv2_9lm

" PAD50LAU tpbn65v_9lm

83 um

47 um

120 um 50 um

10 um

Driver +

Receiver Layouts

Baseline solution

Conclusions and next steps

"  Design current and voltage references of the driver

"  Design the CMFB circuit

"  Design the pre-driver circuit

"  MonteCarlo and four-corner simulations

"  Evaluate the performance of the slew-controlled driver at 320Mbps

"  Load the circuit with longer transmission lines (Mark K.)

1.  Layout the driver and receiver circuits

2.  Integrate circuits with ESD protections

Backup Slides

Introduction Tajalli and Leblebici in “A Slew Controlled LVDS Output Driver Circuit in 0.18um CMOS Technology” (IEEE JSSC, Vol. 44, n. 2, Feb. 2009) proposed a slew controlled driver able to compensate the effect of impedance mismatch between the driver itself and its load

Part of the output current is delivered to the load by a delay through Gm2 while Gm=Gm1+Gm2 The transfer function is:

It is therefore possible to obtain a lower transconductance value at high frequency (fast transitions)

Driver circuit model

Model of the driver circuit with output voltage slew controlled by introducing some delay

Schematic I

VT/Vin (normalized)

Gm1/Gm1+Gm2

" With this architecture it is possible to lower the peak by lowering the high frequency response (but it doesn’t cancel the peak)

" Simulation details: " Gm1 and Gm2 are vccs " RD= 4k!, CD= 1pF " LS= 4nH " CP= 0.5pF, CL= 1pF, RT= 50!

SR controlled driver

Normal driver

Schematic II " This architecture reduces the total input

capacitance of the driver and allows (by properly choosing RD and CD) to cancel the peak of the frequency response

" Simulation details: " Gm1 and Gm2 are vccs " RD= 40!, CD= 1pF " LS= 4nH " CP= 0.5pF, CL= 1pF, RT= 50!

VT/Vin (normalized)

VT signal, transient simulation

SR controlled

Normal driver

Schematic II (with MOSFETs) SR controlled Normal driver

VT signal, transient simulation

SR controlled

Normal driver

" Simulation details: " Gm1 and Gm2 " Gm = Gm1+Gm2 " RD= 40!, CD= 1pF " LS= 4nH " CP= 0.5pF, CL= 1pF, RT= 50! " CMFB ideal stage

Eye diagram of the differential signal at RT Simulation details: " Driver stages with MOSFETs " 640Mbps " Receiver not connected

SR controlled

Normal driver

Transient response of a 2cm, 100! differential line (Mark K.)

SR controlled

Normal driver

Simulation details: " Driver stages with MOSFETs " 640Mbps " Receiver not connected