University of Houston 2008 PCB Layout Introduction Wei Ren Feb. 2 nd, 2010.

University of Houston 2008

PCB Layout IntroductionPCB Layout Introduction

Wei RenWei Ren

Feb. 2Feb. 2ndnd, 2010, 2010


ContentContent

• Workflow• System Analysis• Transmission Lines• Components Placement• Transmission Lines Routing • Power Distribution• Crosstalk• EMI• Summary


Workflow

Design Rules Check(Schematic)

Add footprints

Netlist Generation

System Analysis

Components Placement

Board Level Routing

Schematic Design

Design Rules Check(PCB)

Gerber files Generation

Manufacture

Have errors?

Passed

Have errors?

Not finished?

Passed

Finished

Optimization may need to be made after debuggingthe circuits.


System Analysis

Divide the whole system into several sub-systems by their functions:

Power sub-system: DC-DC converter (analog? digital?); Linear regulator (analog? digital?); ±12V, ±5V, ±3.3V, etc. (analog? digital?); etc. Analog sub-system: Analog clock path; Signal path 1, (Priority?) Signal path 2, (Priority?) etc. Digital sub-system: Digital clock path; Digital-to-analog path; Digital control path; etc.


Signal Lines as Transmission Lines

General Transmission Line Categories:

Microstrip

Twisted Lines Parallel Lines

Stripline

PCB Cross View



When a signal delay is greater than a significant portion of the transition time, the signal line must treated as a transmission line.

where, L0 – distributed inductor, C0 – shunted capacitor so we have Characteristic Impedance Z0=(L0/C0)1/2

Propagation Delay td=(L0C0)1/2



Issues About Transmission Line

1, Impedance Matching In order to maximize the power transfer and minimize reflection from

the load. Should have ZS=ZL.

The reflection coefficient:



Then we put the source, the load and the transmission line together. There are two boundaries which may generate reflections.

If miss-match, ringing is generated at the load.



2, Noise Coupling Issue.

Example:

a, Coupling between 2 parallel lines, f=100kHz,TTL signal

Without coupling With coupling, 800mV

b, Direct-coupler


Components Placement

MCURamp

Generator (Analog)

Power (Digital)Ramp Generator

(Digital)

DACAmplify and S/H

(Analog)

Power (Analog)

P1 J4

J2

J3

J1

P2


Transmission Lines Routing

Layout Rules for TLs

A, Avoid Discontinuities.

at bends on the trace, keep the Zo constant.

A, poor layout

B, shaving the edge

C, by 45-degree corner

D, by curve



Vias take signal through the board to another layer. The vertical run of metal between layers is an uncontrolled impedance. So use the vias as few as possible



B, Do NOT Use Stubs or Ts

a), stubs

b), preferred solution


Power Distribution It is important to have a noise-free power distribution

network, which also must provide a return path for all signals generated and received on the board.

1, Power Distribution Network as a Power Source

A, The effect of Impedance

A, Ideal case, zero impedance

B, real case

Goal: Reduce the impedance of the power distribution network as much as possible!!


Power Distribution

B, Power Buses vs. Power Planes

Power Buses Power Planes

Power planes generally have better impedance characteristic than

power buses; Practical consideration might favor power buses.


Power Distribution

C, Linear Noise Filtering

All the systems generate enough noise to cause problems. Since the power plane or buses does not eliminate line noise, extra filtering is required.

Solution:

Bypass capacitors acting as a filter are needed.

Generally, 1uF to 10uF caps are placed across the power input to the board to filter the low frequencies (like 60-Hz);

and 0.01uF to 0.1uF caps are placed across the power and ground pins of every active device on the board to filter the harmonics ( in the range of 100MHz and higher)


Power Distribution

Real capacitors have equivalent-series resistance (ESR) and equivalent-series inductance (ESL), so the real cap is a series resonant circuit, which has resonant freq,

Fr=1/(LC)1/2

It is capacitive at frequencies below Fr, and inductive at frequencies above Fr.

As a result, the capacitor is more a band-reject filter than a high frequency-reject filter.

1Fr

LCFr


Power Distribution

TypeRange of Interest

Application

Electrolytic 1uF to >20uF Power-supply connection of board.

Glass-encapsulated Ceramic

0.01uF to 0.1uFBypass cap at the chip. Often placed in parallel with electrolytic to widen the filter BW and increase the rejection band.

Ceramic-chip 0.01uF to 0.1uF Primarily used at the chip.

C0G <0.1uFBypass for noise-sensitive devices. Often used in parallel with another ceramic chip to increase rejection band.

Table 1. Bypass Capacitor Groups


Power Distribution

Parallel the bypass caps to extend the range!

high-capacitance, low-ESL capacitor in parallel with a lower-capacitance, very-low-ESL capacitor.


Power Distribution

Bypass Capacitors Placement:1, Close to the active device, keep the connection as short

as possible;

2, Close to the Vcc and GND.

Typical Placement Preferred Placement


Power Distribution

2, Power Distribution Network as a Signal Return Path

Each time a signal switches, AC current is generated. Current requires a closed loop. The return paths are needed to complete the loop by Ground or Vcc.

Current loops have inductance. They can aggravate ringing, crosstalk, and radiation.

Equivalent AC path


Power DistributionTable 2. Inductance of simple electrical circuits in air


Power Distribution

3, Layout Rules with Power Distribution Considerations

A, Protect the circuit from damage.

Put a fuse between the power supply and device to protect the system from damage caused by short circuit, overload or device failure.

B, Be careful with feedthroughs.

Common paths of signal return due to vias

PCB Topview


Power Distribution

C, Ground cables sufficiently

a) Insufficient grounds

b) Enough grounds lumped together

c) Grounds evenly distributed among signal lines


Power Distribution

D, Separate analog and digital planes

On the boards with analog and digital functions, the power planes are separated; the planes are tied together at the power source. Place jumpers across the ground planes where signal cross to minimize the current loop.


Power Distribution

E, Avoid overlapping separated planes

Do NOT overlap the power plane of digital circuitry and analog circuitry. If the planes overlap, there is capacitive coupling, which defeats isolation.

F, Isolate sensitive components route other signals away from the

isolated section; etch a horseshoe in the power

planes around the device; add shielding box.

PCB Topview


Power Distribution

G, Place power buses near signal lines

Sometimes, power buses is the only choice when must use two-layer PCBs. It is possible to control loop size by placing the buses as close as possible to the signal lines. The loop for that signal is the same as it would be if the load used power planes.


Power Distribution

H, Pay attention to the trace width

After estimate the current of each trace, calculate the trace width before route the wire. There are some use website as “PCB Trace Width Calculator”.

For example:

http://circuitcalculator.com/wordpress/2006/01/31/pcb-trace-width-calculator/

H, Pay attention to the trace width

After estimate the current of each trace, calculate the trace width before route the wire. There are some use website as “PCB Trace Width Calculator”.

For example:

http://circuitcalculator.com/wordpress/2006/01/31/pcb-trace-width-calculator/


Crosstalk

Crosstalk is the unwanted coupling of signals between traces. It is either capacitive or inductive.

1, Capacitive Crosstalk

Capacitive crosstalk refers to the capacitive coupling of signals between signal lines. It occurs when the lines are close to each other for some distance.


Crosstalk

The ground trace must be a solid ground. For good grounding, the ground trace should be connected to the ground plane with taps separated a quarter wavelength of the highest frequency component of the signal.


Crosstalk

2, Inductive Crosstalk

Inductive crosstalk can be thought of as the coupling of signals between the primary and secondary coils of an unwanted transformer

Inductive crosstalk Transformer equivalent


Crosstalk

Crosstalk Solutions Summary1. The effect of both capacitive and inductive crosstalk increases

with load impedance. Thus all lines susceptible to interference due to crosstalk should be terminated at the line impedance;

2. Keeping the signal lines separated reduces the energy that can be capacitively coupled between signal lines;

3. Capacitive coupling can be reduced by separating the signal lines by a ground line. To be effective, the ground trace should be connected to the ground every quarter wavelength long;

4. For inductive crosstalk, the loop size should be reduced as much as possible

5. For inductive crosstalk, avoid situations where signal return lines share a common path


EMI

Electromagnetic Interference (EMI) can be reduced through shielding, filtering, eliminating current loops, and reducing device speed where possible.


Summary Analyze the circuit well before start layout the PCB;

Integrity and stability of power and ground;

Termination and careful layout of transmission lines to eliminate reflections;

Termination and careful layout to reduce the effects of capacitive and inductive crosstalk;

Noise suppression for compliance with radiation regulations.

University of Houston 2008 PCB Layout Introduction Wei Ren Feb. 2 nd, 2010.

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