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University of California, San Diego M.S. Exam: Logic Design (CSE140) Spring 2015 NAME : ____________________________________________

Transcript of University of California, San Diegoece.ucsd.edu/sites/ece.ucsd.edu/files/MS Comp...

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    University of California, San Diego

    M.S. Exam: Logic Design (CSE140)

    Spring 2015

    NAME : ____________________________________________

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    Question 1. [20 pts]

    (a) [10 pts] Using Boolean algebra theorems, simplify 𝐹 to a minimum sum-of-products representation. Write all steps to your answer. You do not need to write the names of the Boolean algebra theorems used.

    𝐹  (𝐴,𝐵,𝐶,𝐷) = 𝐴 + 𝐵! + 𝐶! ⋅ 𝐴 + 𝐵! + 𝐷! ⋅ (𝐵! + 𝐶! + 𝐷!)

    (b) [10 pts] Find the minterm expansion of 𝑓.

    𝑓 𝑎, 𝑏, 𝑐,𝑑, 𝑒 = 𝑎!𝑏!𝑒 + 𝑎𝑑 + 𝑏𝑐𝑑′

    𝑓 = 𝑚                                                                                                                                                                                                      

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    Question 2. [30 pts]

    (a) [10 pts] Fill in the Karnaugh map to represent the following function F. (d = don’t-care)

    𝐹 𝐴,𝐵,𝐶,𝐷 =   𝑚 0, 2, 5, 8, 10, 12, 13, 14, 15 +   𝑑 4    

    (b) [5 pts] List all of the essential prime implicants of F (there are three essential prime implicants).

    (c) [5 pts] List all of the prime implicants of F (there are five prime implicants).

    (d) [5 pts] List all possible minimal sum of product representations for F.

    AB CD 00 01 11 10

    00

    01

    11

    10

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    (e) [5 pts] Implement F (A, B, C, D) using exactly one 4:1 MUX and a minimum number of 2:1 MUXes.

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    Question 3. [20 pts] (a) [10 pts] Fill in the following truth table for the J-K flip-flop. Here, Q+ is synonymous with Q(t+1).

    J K Q Q+

    0 0 0

    0 0 1

    0 1 0

    0 1 1

    1 0 0

    1 0 1

    1 1 0

    1 1 1 (b) [15 pts] Complete the following timing diagram for the J-K flip-flop (Initial state of Q = 0).

    Clock

    J

    K

    Q

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    Question 4. [30 pts] The sequential circuit shown below has input (X), output (Z) and three-bit state (Q1, Q2, Q3).

    (a) [10 pts] Write down the state equations.

    Q1(t+1) =

    Q2(t+1) =

    Q3(t+1) =

    Z =

    (b) [10 pts] Fill in the state transition table.

    Q1 Q2 Q3 X = 0 X = 1

    Q1+ Q2+ Q3+ Z Q1+ Q2+ Q3+ Z S0 0 0 0 S1 0 0 1 S2 0 1 0 S3 0 1 1 S4 1 0 0 S5 1 0 1 S6 1 1 0 S7 1 1 1

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    (c) [10 pts] Draw the state machine diagram below. Is this a Moore or a Mealy machine?