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Transcript of Ultra-shallow SIMS for semiconductor depth profiling Andrew T. S. Wee Department of Physics National...
Ultra-shallow SIMS for semiconductor depth profiling
Andrew T. S. WeeDepartment of Physics
National University of Singapore
SIMS-17, Toronto, Sep09: “Depth Profiling" discussion session
Scope
1. Enabling technologies for ultimate CMOS scaling
2. Solutions to surface transient problem3. Low energy SIMS optimal conditions4. Oblique incidence SIMS5. Beyond Si and III-V: Graphene?6. Future of ultrashallow profiling
Technology Navigation for Si CMOSConventional Scaling does not give Historical Performance Improvement
Conventional Device Scaling: • Reduce EOT (equivalent oxide thickness), LG, xj, etc.• Increase doping concentration• Reduce VDD to contain power consumption.
Geometry (e.g. LG , x
j , EOT, etc)
Supply Voltage V DDPer
form
ance
or
Obj
ectiv
e F
unct
ion
(Ion
, I o
ff, d
ensi
ty) Schematic Illustration of a
Performance Optimization Problem
Hitting a Performance Plateau
?
We took this Path
What happened recently: • EOT scaling stalls (due to excessive leakage current).• LG scaling slows down.• Pitch Scaling continues for increased circuit density.• VDD scaling faces challenges due to non-scalability of Vth.
Courtesy of YC Yeo
Overview of Scaling Limitations
DS
G
Reduce Junction Depth xj
Parasitic Series Resistance ↑
Increase Doping Concentration NA
Carrier Mobility ↓
Reduce Gate Dielectric ThicknessGate Leakage Current ↑Gate Depletion Effects ↑
LG
Reduce LG
Device Density ↑Short-Channel Effects ↑Requires EOT, xj , NA scaling
VDD
Reduce Supply Voltage VDD
If (VGS - Vth) is fixed, Vth should ↓ Ioff ↑If Ioff is fixed, (VGS - Vth) ↓ Ion ↓
Need to Increase Poly-Dopingbut limited by solubility of dopants
Ion = Cox(W/LG)(VGS - Vth)2
Simple Expression for drive current Ion
If the carrier transport properties, e.g. mobility, of the channel can be engineeried, technology evolution can take a different direction.
Courtesy of YC Yeo
World’s Smallest Strained Transistors (5 nm)
5 nm Gate Length is one of the Smallest in the World. First Demonstration of Germanium Stressor to create High Strain
Levels in a tiny volume of Silicon Channel in a Transistor Significant Increase in Carrier Mobility!
Impact: Future of Electronics. - Potentially influence path of technology development.
- Show a way to scale Silicon Transistors towards its Ultimate Limit.
Yeo’s Nanoelectronics Group
Before Growth of Germanium
Stressor
Germanium
Stressor
After GermaniumEpitaxy Growth
Silicon Nanowire
(Diameter =
8 nm)
Gate Electrode
Yeo’s Nanoelectronics Group
Gate Length
Strained-Silicon
Germanium
Stressor
Gate
Electrode
Breakthrough announced at VLSI Symp. 2008, Honolulu, HI.
Courtesy of YC Yeo
New Paths of Technology Evolution
Search for New Knobs to tweak to improve performance
• Modification of Properties of Existing Materials (e.g. Strained-Si)• New Materials (e.g. Metal- Gate/High-k, New Channel Materials)• New Device Structures (e.g. Multiple-Gate Transistors)Geometry (e.g. L
G , xj , EOT, etc)
Supply Voltage V DDPer
form
ance
or
Obj
ectiv
e F
unct
ion
(Ion
, I o
ff, d
ensi
ty)
Path of Technology Evolution
Schematic Illustration of Path of Future Technological Evolution
PerformanceAchievable with Existing Set of Materials
PerformanceAchievable with New MaterialCapabilities
Courtesy of YC Yeo
Current CMOS Research Frontiers
DS
Novel Silicide Materials S/D Resistance Reduction Dopant-Segregation, Metallic S/D
Metal-Gate/High-k Dielectric Stack Technology
Beyond-CMOS Logic Switches with Sub-60 meV/decade swing: Tunnel FETs
New Strain Engineering Technologies
Advanced Channel Materials, High-Mobility Materials (III-V’s), Strain Engineering
Nea
r-T
erm
(M
ajo
r Im
pac
t in
Ind
ust
ry)
Mid
-Ter
m(U
ltim
ate
CM
OS
)L
on
g-T
erm
(B
eyo
nd
202
0)
Pro
vid
e T
ec
hn
olo
gy
So
luti
on
sF
or
Ea
rly
Ev
alu
ati
on
Ex
plo
re R
ev
olu
tio
na
ryN
an
od
ev
ice
s
Now
Far Future
Tim
elin
e
Transistor Cross-Section
Courtesy of YC Yeo
Limitations of SIMS profiling:• Poor lateral resolution (J100nm); need test structures• Instrumental effects• Includes unactivated dopants
SIMS challenges:1. Ultra-thin dielectric layer2. Ultra -shallow dopant profiles,
junction depths
SIMS Depth ProfilingSIMS Depth Profiling• SIMS is a destructive technique whereby a crater is formed in
the sample under ion sputtering• SIMS depth resolution depends on the choice of ion species,
incidence angle and impact energy• During ion-beam sample interactions, surface roughening and
mixing are the main limiting factors of depth resolution
Surface roughening – the roughening of sample surface due to inhomogeneous
incorporation of oxygen
Atomic mixing – the pushing of atoms to deeper layers due to ion bombardment.
Ep > 2 keV, 0°<p<60°Xp=O2
+,Cs+
3 regions:(1) Transient (2) Steady-state (3) Roughening
Ep < 2 keVRegion 1 & 3 coalesce(Region 2 exists for narrow energy dependent range in p.)
Surface transient & roughening in low energy SIMSRef: T.J. Ormsby et al. Applied Surface Science 144–145 (1999) 292–296
SIMS Instrumentation
ATOMIKA 4500 SIMS Depth Profiler: – Ultra-low energy quadrupole SIMS – “Floating” low energy ion gun (FLIGTM) capable of delivering stable ion beams down to 100 eV – Incidence angles from 0 (normal) to 70
Oblique incidence SIMS:
CAMECA IMS 6f Magnetic Sector SIMS: – EM post-acceleration system– Sample stage with eucentric rotation capability (20 rev/min)
– Primary ions: O2+ Incidence angle: 44°-69°
– Oxygen flooding: 1.0 10-6 torr (max)– Energy range: 0.5 to 10.0 keV
CAMECA Wf Magnetic Sector SIMS: - Gui D et al., Chartered Semiconductor
Samples: Ge and B delta doped Si wafers• quantify surface transient, depth resolution, sputter rates
Scope
1. Enabling technologies for ultimate CMOS scaling
2. Solutions to surface transient problem3. Low energy SIMS optimal conditions4. Oblique incidence SIMS5. Beyond Si and III-V: Graphene?6. Future of ultrashallow profiling
Solutions to Surface Transient problem• Cap the surface
• Shallow implant in Si: H. U. Ehrke et al. Insight 2007, Napa, USA
• SiON: D. Gui et al, Appl. Surf. Sci. 255, 1437-1439 (2008)
• Backside depth profiling• Yeo K. L., Wee A. T. S., Liu R., Ng C. M., Surf. Interface Anal. 33 (2002) 373.
• Lower impact energy and select incidence angle• W. Vandervorst, Appl. Surf. Sci. 255, 805–812 (2008)
• A.R. Chanbasha, A.T.S. Wee, Surf. Interface Anal. 37 (2005) 628-632; A.R. Chanbasha, A.T.S. Wee, Surf. Interface Anal. 39 (2007) 397-404.
• Atom probe for 3D profiles• P.A. Ronsheim et al, Appl. Surf. Sci. 255, 1547-1550 (2008)
• 18O sputtering• H. U. Ehrke et al. SIMS XVI, (2007)
• PCOR-SIMS for high dose shallow implant• Point-by-point data corrections for all regions of profile; CEA, Application Notes, 2007
To achieve better device performance, it is preferable to have a N peak close to the top surface of the nitrided gate oxide, which fabricated by using de-coupled plasma nitridation (DPN).However, it is a challenge to obtain accurate N dose and profile shape due to the surface effect. One solution is to cap the SiON with a thin layer of oxide.
D. Gui et al, Appl. Surf. Sci. 255, 1437-1439 (2008)
• MCs2+ technique
SiON with capping layer
Backside SIMS depth profiling using SOI wafersYeo K. L., Wee A. T. S., Liu R., Ng C. M., Surf. Interface Anal. 33 (2002) 373.
Yeo K. L., Wee A. T. S., See A., Liu R., Ng C. M., Appl. Surf. Sci. 203 (2003) 335.Yeo K. L., Wee A. T. S., Liu R., Zhou F. F., See A., J. Vac. Sci. Technol. B 21 (2003) 193.
SiO2
Si
Amorphous Si capped
Epoxy
Dummy Si
11B +0.5keV 5E14at./cm2 (Si pre-amorphized); 11B +0.5keV 5E14at./cm2 (Si pre-amorphized); O2+1.5keV+1keVO2+1.5keV+1keV
Scope
1. Enabling technologies for ultimate CMOS scaling
2. Solutions to surface transient problem3. Low energy SIMS optimal conditions4. Oblique incidence SIMS5. Beyond Si and III-V: Graphene?6. Future of ultrashallow profiling
Systematic low energy SIMS study• Low energy SIMS (250 eV - 1 keV) using both O2
+ and Cs+.
• Wide range of incidence angles (0 – 70) using a quadrupole SIMS.
• Variations in surface transient widths, depth resolution sputter rates reported.
• Optimum profiling conditions are recommended for silicon ultrashallow profiling (using O2
+ and Cs+).1. A.R. Chanbasha, A.T.S. Wee, Surf. Interface Anal. 37 (2005) 628-632.2. A.R. Chanbasha, A.T.S. Wee, J. Vac. Sci. Technol. B 24 (2006) 547-553.3. A.R. Chanbasha, A.T.S. Wee, Surf. Interface Anal. 39 (2007) 397-404.4. A.R. Chanbasha, A.T.S. Wee, J. Vac. Sci. Technol. B 25 (2007) 277-285.
• Understanding the SIMS altered layer: In-situ XPS study • Tan SK, Yeo KL, Wee ATS, Surf. Interface Anal. 36 (2004) 640-644
Depth profile obtained using Ep ~250eV at ~20o
70Ge+
30Si+
44SiO+Ip
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
0 50 100 150 200Depth (nm)
Inte
ns
ity
(c
ps
)
• Ge delta layers
• depth markers
• depth resolution
Effect of O2+ SIMS on surface transients
A.R. Chanbasha, A.T.S. Wee, Surf. Interface Anal. 37 (2005) 628-632
30Si+ profiles for (a) Ep ~250 eV (b) Ep ~500eV and (c) Ep ~1keV
a) 250 eV
1.E+03
1.E+04
1.E+05
0 1 2 3 4 5
Inte
ns
ity
(c
ps
)
0 10 20 3040 50 60 70
b) 500 eV
1.E+04
1.E+05
1.E+06
0 1 2 3 4 5
Inte
ns
ity
(c
ps
)
c) 1 keV
1.E+04
1.E+05
1.E+06
1.E+07
0 2 4 6 8 10Apparent Depth (nm)
Inte
ns
ity
(c
ps
)
Equilibrium signals:
-1 keV : profiles at < 40o, eqm signals higher than initial.
- but not at > 50o,
-500 eV: lower eqm intensities at > 60o
-250 eV: eqm Intensities are higher at all
Surface transient - incomplete oxidation
SIMS Altered Layer @ Steady State SputteringS. K. Tan, K. L. Yeo, A. T. S. Wee, Surf. Interface Anal. 36 (2004) 640.
0 10 20 30 40 50 60 700
10
20
30
40
50
60
70
80
Si(I) Si(II) Si(III) Si(IV) O
RE
L. C
ON
C. (
%)
INCIDENT ANGLE (Degree)
XPS relative concentrations.
Ion Ion incorporationincorporation
OO22++ bombardment bombardment
SputteringSputteringvs.vs.
Different oxide layerDifferent oxide layer106 104 102 100 98
Si(IV)Si(IV)
Si(III)Si(I)
(b) 0o
(c) 15o
(f) 55o
(a) Si(100) Si(II) Si(0)
Binding Energy (eV)
(e) 45o
(d) 30o
(g) 70o
XPS Si 2p spectra of the crater surface at steady state of 4 keV O2
+ bombardment.
SiO2
sub-oxide+
SiO2
sub-oxide
Super saturation of oxygen
Si+ (250 eV)
SiO+ (250 eV)
Si+ (500 eV)
SiO+ (500 eV)
Si+ (1 keV)
SiO+ (1 keV)
Si+(560 eV) ref.12
Si+ (1 keV) ref 12
02468
10121416
0 10 20 30 40 50 60 70 80 90Angle of Incidence
Tra
ns
ien
t W
idth
(n
m)
Measured transient width based on both 44SiO+ and 30Si+
-ztr < 1nm at Ep~250eV, θ~0-50o
-ztr~0.7nm at Ep~250eV, θ~0-20o
-ztr~0.7nm at Ep~500eV, θ~0-10o
-ztr 1.5nm at Ep~1keV, θ~0-10o
Surface transient – transient width
Difference greatest at θ where ztr coincides with surface roughening. 1keV/40o and 500eV/50o ~ θc for oxidation
a) 250 eV
0.6
0.8
1.0
1.2
1.4
1.6
Rel
ativ
e S
putt
er R
ate
0 10 20 30
40 50 60 70
b) 500 eV
0.6
0.8
1.0
1.2
1.4
1.6
Rel
ativ
e S
putt
er R
ate
c) 1 keV
0.6
0.8
1.0
1.2
1.4
1.6
0 20 40 60 80 100 120
Depth (nm)
Rel
ativ
e S
putt
er R
ate
Normalized sputter rates throughout the depth
-250eV: stable 0o<<40o diff d1-avg 7%
-500eV: stable 0o<<40o diff d1-avg10%
-1keV: stable 0o<<20o diff d1-avg 11%
Sputter rates with depth
250eV 500eV 1keV
Surface Spike Nil > 50o - 60o >30o - 40o
Equilibrium signals lower than initial
Nil > 60o > 50o
c (incomplete oxidation) Nil > 60o > 50o
Different ztr for SiO+ and Si+ > 60o 40o < < 50o 30o < < 50o
Onset of roughening ~ 60o ~ 50o ~ 40o
Range of giving lowest ztr ~ 0o - 20o ~ 0o – 10o ~ 0o – 10o
Lowest ztr 0.7nm 0.7nm 1.5nm
Sputter rate max. at ~ 50o ~ 60o ~ 60o
Sputter rate min. at ~ 0o ~ 0o ~ 0o
Stable erosion rate at 0o < < 40o 0o < < 40o 0o < < 20o
Difference in sputter rate between near surface and throughout
depth for with stable erosion rate ~ 7% ~ 10% ~ 11%
Summary of surface transient width, sputter rate and the onset of roughening for O2
+ sputtering
O2+ SIMS depth resolution parameters (FWHM and d)
dependence on energy for the first delta-layer profile at ~ 0o.
250eV 500eV 1keV
Lowest FWHM 1.5nm 2.2nm 3.5nm
with lowest FWHM throughout depth
~ 0 - 40o ~ 0 – 30o ~ 0 – 20o
with lowest FWHM to a limited depth (nm) Nil
~ 60 - 70o (12nm)
~ 60 - 70o (50nm)
Lowest d < 1nm ~ 1.2nm ~ 1.8nm
with lowest d
throughout depth ~ 0 -50o
~ 0 - 30o
~ 60 -70o
~ 0 - 20o
~ 60 -70o
with best dynamic range ~ 50o ~ 40o ~ 30o
Highest dynamic range 6.8 x 103 8.9 x 103 2.3 x 104
Summary of results of O2+ sputtering
30Si-
59Si2-
98SiGe-
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
0 50 100 150 200Depth (nm)
Inte
ns
ity
(c
ps
) Ip
Depth profile: Ep~320eV at θ~50o
Effect of Cs+ SIMS on surface transientsA.R. Chanbasha, A.T.S. Wee, Surf. Interface Anal. 39 (2007) 397-404
a) 320eV
1.E+03
1.E+04
1.E+05
1.E+06In
ten
sit
y (
cp
s)
0 10 20 3040 50 60 70
b) 500eV
1.E+03
1.E+04
1.E+05
1.E+06
Inte
ns
ity
(c
ps
)
c) 1keV
1.E+03
1.E+04
1.E+05
1.E+06
1.E+07
0 2 4 6 8 10Apparent Depth (nm)
Inte
ns
ity
(c
ps
)30Si- profiles
3 distinct profile trends:1 (a) Abrupt rise before steady state (Ep~320eV, 30-50o; Ep~500eV,30-40o; Ep~1keV, 20-30o)
- progressive build-up of Cs (b) Abrupt rise then gradual rise to steady
state (Ep~500eV, 0-20o; Ep~1keV, 0-10o)
2. Abrupt rise, shoulder before steady state(Ep~320eV, 0-20o)- indicative of onset of roughening- only >50o (Kataoka et al. [2003])- confirmed by AFM, SiO2/Si interface
3. Less abrupt rise, peak before steady state(Ep~320eV, 60-70o; Ep~320eV, 50-70o; Ep~1keV,40-70o)
30Si-
(320eV)
30Si-
(500eV)
30Si-
(1KeV)
2Rnorm 320 eV
2Rnorm 500 eV
2Rnorm 1 keV
0
5
10
15
20
25
0 10 20 30 40 50 60 70 80 90
Angle of Incidence
Tra
ns
ien
t W
idth
(n
m)
Transient width
Minimum ztr:Ep~320eV, θ~40o – 2.0nmEp~500eV, θ~ 40o – 1.4nmEp~1keV, θ~30o – 1.5nm
ztr < 2Rnorm
Enhanced ztr: >50o
Reducing Ep not significantin reducing ztr
Θ>50o not suitable for ultrashallow dopant profiling
a) 320eV
0.6
0.8
1.0
1.2
1.4
1.6
1.8
Rel
ativ
e S
pu
tter
Rat
e
0 10 20 30
40 50 60 70
b) 500eV
0.6
0.8
1.0
1.2
1.4
1.6
Rel
ativ
e S
pu
tter
Rat
e
c) 1keV
0.6
0.8
1.0
1.2
1.4
1.6
0 20 40 60 80 100 120Depth (nm)
Rel
ativ
e S
put
ter
Rat
e
Sputter rates with depth
Only at Ep~320eV,θ~0-10o can average sputter rate be used. Difference is ~3%
Other angles – error ~15%
Summary of results from this work using ultralow-energy Cs+ sputtering.
320eV 500eV 1keV30Si- profile with no peaks & no
shoulders)θ~ 30-50o θ~ 30-40o θ~ 20-30o
θ~ 0-10o(gradual rise)30Si- profiles with shoulders θ~ 0 - 20o Nil Nil30Si- profiles with peak θ~ 60-70o θ~ 50-70o Θ~ 40-70o
Enhanced transient width 11 θ> 57o (250 eV) θ> 60o Θ > 65o
Equilibrium signals maximum intensity at
θ~ 30o θ~ 30o Θ ~ 20-30o
θc roughening (evaluated at 25μm) 27 θ~ 50o (250eV) θ~ 55o θ ~ 60o
Range ofθ giving lowest ztr θ~ 30-50o θ~ 30-50o θ~ 20-30o
Lowest ztr 2.0 nm 1.4 nm 1.5 nm
Sputter rate max. at θ~ 50o θ~ 60o θ~ 60o
Sputter rate min. at θ~ 0o, 70o θ~ 0o θ~ 0o
Stable erosion rate (surface cf depth) at
θ ~ 0-10o(i)θ ~ 20-50o(ii) θ ~ 40-50o θ ~ 50-60o
Difference in sputter rate between near surface and throughout depth for θ with stable erosion rate
~3%(i)~ 15% (ii) ~15% ~15%
b)
y = -0.019x + 3.0y = -0.019x + 3.2
y = -0.019x + 3.8
0
1
2
3
4
5
0 10 20 30 40 50 60 70Incident Angle
FW
HM
(n
m)
320 eV 500 eV 1 keV
Depth resolution (FWHM)
Linear relationship between the depth resolution in terms of FWHM (dz) with θ when there is no surface roughening
y = 0.0015x + 2.185
y = 0.0021x + 1.65
0
1
2
3
4
5
0 250 500 750 1000 1250Primary Ion Energy (eV)
Re
so
luti
on
pa
ram
ete
rs(n
m)
FWHM
d
Cs+ SIMS depth resolution parameters (FWHM and λd) dependence on energy for the first delta-layer profile at θ ~ 0o.
Summary of results observed with ultralow-energy Cs+ sputtering
320 eV 500 eV 1 keV
Lowest FWHM 1.9nm 2.2nm 2.5nm
θ with lowest FWHM throughout depth
(120 nm)θ ~ 50o θ ~ 50o θ ~ 60o
(up to 80 nm)
θ with low FWHM to a limited depth
θ ~ 60o
FWHM ~ 2.6 nm(up to 23 nm)
θ ~ 60o
FWHM ~ 2.3 nm(up to 12 nm)
θ ~ 50o
FWHM ~ 2.6 nm(up to 103 nm)
θ with good depth resolution
θ ~ 30-50o
(< 2.4 nm)θ ~ 30-50o
(< 2.5 nm)θ ~ 40-60o
(< 3.0 nm)
Lowest λd ~ 1.1 nm/e ~ 1.1 nm/e ~ 1.5 nm/e
θ with lowest λd throughout depth θ ~ 50-70o θ ~ 60 -70o θ ~ 70o
θ with best dynamic range θ ~ 60o θ ~ 50o θ ~ 70o
Highest dynamic range 1.1 x 103 3.0 x 103 2.8 x 103
Summary for low energy SIMS
• O2+:
– Minimum transient width achievable at normal and near normal incidence
– Reducing Ep beyond 500eV does not result in significant reduction in ztr
• Cs+:– Lowest ztr reported ~ 1.4-2nm– Best depth resolution achievable over wider range of θ
• Optimum conditions for analysis– O2
+: Best working range with narrow transient and accurate depth calibration: 250eV, 0-20o; 500eV,0-10o; ztr ~0.7nm
– Cs+: Best condition for high depth resolution and good dynamic range: 250eV, 40o
Scope
1. Enabling technologies for ultimate CMOS scaling
2. Solutions to surface transient problem3. Low energy SIMS optimal conditions4. Oblique incidence SIMS5. Beyond Si and III-V: Graphene?6. Future of ultrashallow profiling
Sputter depth (nm)0 20 40 60 80 100 120 140 160 180 200
No
rmal
ized
mat
rix
inte
nsi
ty
10-4
10-3
10-2
10-1
No FloodingWith Flooding
Oxygen flooding improves depth resolution and suppresses crater bottom roughening effects
B- profiles using 500 eV SIMS impact energies at 46° with and without oxygen flooding
Depth (nm)
0 20 40 60 80 100 120 140 160 180 200
Nor
mal
ized
B i
nten
siti
es
10-4
10-3
10-2
10-1
2.0 keV 1.5 keV 0.5 keV
Delta B profiles obtained using various SIMS impact energies at 46° with oxygen flooding at saturated pressure (1.6 × 10-6 torr)
• Oxygen flooding improves resolution in 0.5-2.0 keV incident energy range.
• Resolution is best at 500 eV.
Effect of Oxygen Flooding on Crater Surface Composition and Surface Roughening in SIMS profiling using 1 keV O2
+
Ref: Ng CM, Wee ATS, Huan CHA, See A, J VAC SCI TECHNOL B 19: (3) 829-835 MAY-JUN 2001
• Intensity of 30Si+ as a function of depth for sputtering under various flooding pressures.
• Reduction of surface transient with increasing flooding
• Shift of roughening transition to shallower depths
0 20 40 60 80 100104
105
106
107
No Flooding
5.4 X 10-8 mbar
6.5 X 10-8 mbar)
7.5 X 10-8 mbar
1.9 X 10-7 mbar
Sputter Depth (nm)
Inte
nsi
ty o
f 3
0 Si+
(co
un
ts p
er
sec)
Pressure/Pa 4.40E-05 5.00E-05 6.00E-05 7.00E-05 7.50E-05 7.70E-05
Zon/nm 30.2 16.8 7.8 5.8 5.4 5
Wtr/nm 24.4 16 6.2 4.4 3.8 3.3
D. Gui et al, Appl. Surf. Sci. 255, 1433-1436 (2008)
Sample rotation with oxygen flooding
Oxygen flooding has two competing effects on the surface roughening, i.e., enhancement of initiating roughening and suppression of roughening development. At the intermediate pressure of ~ 5.8E-5 Pa, the surface roughening becomes most pronounced. The surface roughening is negligible without flooding or with flooding at the saturated pressure.
Effect of Oxygen Flooding on Surface Topography
• 2 2 m2 AFM images of the crater surface after SIMS profiling with
(a) no oxygen inlet;
(b) intermediate pressure (6.5 10 -8 mbar); and
(c) saturated pressure (1.9 10-7 mbar) of oxygen
(a) No flooding
rms = 0.3 nm
(b) Flooding at intermediate pressure (6.5 10-8 mbar)
rms = 2.5 nm
(c) Flooding at saturated pressure (1.9 10-7 mbar)
rms = 0.1 nm
Effect of Oxygen Flooding on Surface Composition
• Curve fitting for the XPS spectra obtained for
(a) virgin Si sample;
(b) no oxygen inlet;
(c) intermediate pressure (6.5 10 -8 mbar);
(d) saturated pressure (1.9 10 -7 mbar) of oxygen.
• (b), (c) and (d) were obtained at a sputtered depth of about 100 nm. Only the Si 2p3/2
peak components are shown here for clarity.
(d)
(b)
(a)
(c)
Si(4+)+
Si1+ Sio
Si2+Si3+
Si4+
Sat.pressure
(1.9 10-7 mbar)
Interm. pressure
(6.5 10-8 mbar)
No Flooding
Virgin sample
Using oxygen flooding in combination with low energy Cs+ sputtering, improves the sensitivity of SIMS profiling and removes the variation of the ion yield at the native oxide/silicon interface.
A. Merkulov et al. Appl. Surf. Sci. 231–232 (2004) 640–644
2keV As 500eV Cs+ O2 flooding
Shallow As profiled by CAMECA Wf
Conclusions for Oblique incidence SIMS• Low primary ion energies (sub-keV) improves depth
resolution.• Oxygen flooding and/or sample rotation is needed for oblique
incidence sub-keV SIMS profiling to suppress surface roughening.
• Oxygen flooding needs to be performed at saturation pressures whereby SiO2 (and not sub-oxides) forms to suppress surface roughening.
Scope
1. Enabling technologies for ultimate CMOS scaling
2. Solutions to surface transient problem3. Low energy SIMS optimal conditions4. Oblique incidence SIMS5. Beyond Si and III-V: Graphene?6. Future of ultrashallow profiling
Body Thickness is ~18 nm
Si:CSi:C
Leading Strained Transistor Technologies
25 nm nanowire
Si:C
Si
World’s First Transistor with Silicon-Carbon StressorsReported in IEDM 2004
World’s First Thin-Body Transistor
with Silicon-Carbon StressorsElectron Device
Letters 2007
World’s First Integration of Silicon-Carbon Stressors with Tensile SiN LinerVLSI Symp. 2006
First Integration of Silicon-Carbon Stressors in Transistor
with SiGe ChannelVLSI Symp. 2006
World’s First Nanowire Transistor with Silicon-Carbon Stressors IEDM 2006
Yeo’s Nanoelectronics Group
Yeo’s Nanoelectronics Group
Yeo’s Nanoelectronics Group
Yeo’s Nanoelectronics Group
Yeo’s Nanoelectronics Group
Courtesy of YC Yeo
Taxonomy for Emerging Research Information Processing Devices Ref: International Roadmap for Semiconductors (ITRS) 2007
Challenges of CMOS Technology
Scaling CMOS to and beyond the 16 nm technology generation:
“Develop new materials to replace silicon as an alternate channel to increase the saturation velocity and maximum drain current in MOSFETs while minimizing leakage currents and power dissipation for technology scaled to 16 nm and beyond. Candidate materials include Ge, SiGe, III-V compound semiconductors, and graphene. Develop 1D (nanowire or nanotube) structures to scale MOSFETs and CMOS gates beyond the 16 nm technology generation.“
Ref: International Roadmap for Semiconductors (ITRS) 2007
Intel's 45-nm high-k metal-gate process(Intel® Core™ i7 processor ) www.cycho.org/research/blog/
Intel’s 32 nm Nehalm chip architecture http://www.techlivez.com/2007/09/intel-reveals-worlds-first-32nm-chip-technology/
Emerging Research MaterialsRef: International Roadmap for Semiconductors (ITRS) 2007
• Graphene may enable novel and complementary applications to carbon nanotubes (CNT), its 1D counterpart. Graphene is receiving considerable attention because it exhibits ambipolar carrier conduction, a carrier mobility as high as ~ 2×106 cm2/V-sec, and a defect density of ~1×1010/cm2.
• … mobility … is practically independent of temperature, thus opening the possibility of room temperature ballistic transport at the submicrometer scale.
• Graphene on SiC can be patterned and etched by conventional planar lithography techniques and has the best reported transport properties, but processing temperatures, 1200–1400°C, are incompatible with CMOS fabrication.
• Since the bandgap of nanoribbons varies inversely with the ribbon width, it is possible to pattern and tune their electronic properties, such as bandgap opening due to lateral size quantization, though dimensional control.
Graphene-on-SiC FETs near DARPA targetshttp://nanotechweb.org/cws/article/tech/39365
Technology update Jun 4, 2009• HRL Laboratories has claimed a big leap forward in radio-frequency graphene transistors just
days after describing the first such devices in IEEE Electron Device Letters. On May 21, the Malibu, California, research institution said that it had made devices from single-layer graphene on 2 inch diameter SiC wafers with much-improved performance figures.
• “They have world-record field mobility of approximately 6000 cm2/Vs, which is six to eight times higher than current state-of-the-art silicon n-MOSFETs,” said HRL senior scientist Jeong-Sun Moon.
• The researcher also described the ratio of on-state current to off-state leakage current, Ion/Ioff of 19 for the devices as “excellent”.
Single-layer graphene on SiC
4 nm 1 nm 1 nm
multi-layer graphene or HOPG
1200 1500 1800 2100 2400 2700 30000
1000 1710
1520
2710
2735
1593
1594
1365
D
single layer EG
2-3 layer EG
SiC
SiC 2D
G
1370
Ra
ma
n In
ten
sit
y
Wave Number /cm-1
Raman: Ni ZH et al., Phys. Rev. B 77 (2008)115416.
Co
un
ts (
a. u
.)
288286284282280Binding energy (eV)
(a) Root 3 (950oC)
(b) Root 3 + nanomesh (1050oC)
(c) nanomesh (1100oC)
(d) nanomesh + graphite (1200oC)
(e) graphite (1300oC)
C 1s
h eV o
284.4 eV
282.9 eV
285.1 eV
XPS: Chen. W, et. al. Surf. Sci, 596, 176 (2005)
Multi-technique surface analytical approach
STM:
Scope
1. Enabling technologies for ultimate CMOS scaling
2. Solutions to surface transient problem3. Low energy SIMS optimal conditions4. Oblique incidence SIMS5. Beyond Si and III-V: Graphene?6. Future of ultrashallow profiling
Minimum low energy SIMS depth resolution?W. Vandervorst, Applied Surface Science 255 (2008) 805–812
• Unlimited reduction of the primary ion energy is not possible as below the threshold energy for sputtering, no target removal occurs anymore.
• O2: minimum value for sputtering lies around 30–40 eV
• Cs: the threshold energy for sputtering lies around 100–10 eV.
Cluster beamsW. Vandervorst, Applied Surface Science 255 (2008) 805–812
• Cluster beams do not seem to solve the depth resolution issues and suffer from unexpectedly large decay length values when considering the low energy per constituent atom.
• Formation of a deposit limits the reduction in primary beam energy
Future of ultra-shallow profiling?• Ultra shallow SIMS
– “SIMS performance needs to be improved down to the 0.5 nm/dec level. Meeting this target is extremely difficult and can only be approached by going as low as 100 eV.” (Vandervorst, SIMS XVI 2007)
– But SIMS is still the technique of choice for the semiconductor industry as it is relatively simple, and reproducibility rather than accuracy is needed
• 3D Atom probe– sample preparation (needle shape specimen with a top radius 50 nm) typically
requiring extensive focused ion beam milling
• Low energy ion scattering (LEIS)– For heavier atoms in lighter matrix
• Angle (& energy) resolved XPS– Lower sensitivity, but ultra shallow doping levels often >1020 at/cm3
• Combination of complementary surface analysis techniques– new materials to replace silicon (Ge, SiGe, III-Vs, graphene); matrix effect
issues with SIMS
XPS, UPS, AES SIMS
LT-STM
VT-STM Synchrotron PES, XAS
Thank YouQuestions?
Semiconductor Challenges to SIMSW. Vandervorst, Applied Surface Science 255 (2008) 805–812
• The development of the (sub-)32 nm technologies requires the formation of very shallow dopant profiles by low energy (cluster) implantation and diffusion-less (flash or laser) anneal leading to junction depths as small as 10 nm and with a steepness in the order of 1–2 nm/dec.
• Requirements on the SIMS depth resolution can be achieved by lowering the primary beam energy to 250–500 eV.
Generally speaking, magnetic SIMS has limitations in tuning the incident angle. It is even more difficult for CAMECA Wf to adjust the incident angle because the primary beam passes through split extraction field to reduce the deflection of primary beam in shallow depth profiling.
Difficulty in adjusting incident angle
Source Drain
Gate
SDE SDE
Lg
Lch
xj
EOT
Challenges of Si CMOS Technology-Device scaling
Objective: increase packing density and switching speed
Lch decrease, electric field interaction results in leakage from D-S when
transistor is off (SCE) >Shallower junction depth ~ 13-30nm
Gate oxide ~1-3nm65nm technology node
SIMS challenges:
1. Utra thin dielectric layer
2. Shallow dopant profiles, junction depths