uhfrfidtag
Transcript of uhfrfidtag
8/6/2019 uhfrfidtag
http://slidepdf.com/reader/full/uhfrfidtag 1/6
Design and analysis of a low power passive UHF RFIDtransponder IC
Li-Ying Chen • Lu-Hong Mao • Xiao-Zong Huang
Received: 17 August 2009 / Revised: 15 March 2010 / Accepted: 5 August 2010/ Published online: 15 August 2010
Ó Springer Science+Business Media, LLC 2010
Abstract This paper presents a low power passive UHF
RFID transponder IC, which is compatible with ISO/IEC18000-6B Standard, operating at the 915 MHz ISM band
with the total supply current consumption less than 10 lA.
The fully integrated passive transponder, whose reading
distance more than 3 m at 4 W (36 dBm) EIRP with an
antenna gain less than 1.5 dBi, is powered by the received
RF energy. There are no external components, except for
the antenna. The transponder IC includes matching net-
work, rectifier, regulator, power on reset circuit, local
oscillator, bandgap reference, AM demodulator, backscat-
ter, control logic and memory. The IC is fabricated using
Chartered 0.35 lm two-poly four-metal CMOS process
with Schottky diodes and EEPROM supported. The die
size is 1.5 mm 9 1.0 mm.
Keywords Low power Á UHF Á RFID Á Passive
transponder
1 Introduction
Radio frequency identification (RFID) is an automatic
wireless data collection technology with a long history since
the Second World War. Recently, RFID is becoming more
and more popular in many applications, such as supply
chain management, wireless sensing, access to control
buildings, tracking, personal identification and security, etc.
Some big corporations have employed the technology, for
example the Wal-Mart Stores Inc. The increasing applica-
tions have required for high volume, low cost, small size
and higher data rates. This paper describes a long range, low
power, passive UHF RFID transponder IC.
Nowadays, RFID technology operates in several differ-
ent frequency bands, such as low frequency (LF, 125 kHz),
high frequency (HF, 13.56 MHz), ultra high frequency
(UHF, 860–960 MHz) and microwave (2.4 GHz). IF and
HF RFID have been widely employed in many years. But
their reading range is typically limited to less than 1.2 m.
Also, the bandwidth in Europe and other regions is limited
by regulations to a few kilohertz [1]. The passive tran-
sponders that operate in the UHF and microwave frequency
bands allow longer reading distance, higher data rates, and
small antenna sizes. The UHF frequency band RFID tran-
sponders are becoming a hot spot. In North and South
America, the center frequency is 915 MHz, whereas Eur-
ope, Middle East, and Russian Federation mainly use
866 MHz. Asia and Australia use frequencies within the
band from 866 to 954 MHz. Korea made an allocation in
908 to 914 MHz [1, 2].
This paper presents a low power, fully integrated, pas-
sive UHF RFID transponder IC, which is compatible with
ISO/IEC 18000-6B Standard, operating at the 915 MHz
ISM band. The transponder IC is fabricated by Chartered
0.35 lm two-poly four-metal CMOS process with Schottky
L.-Y. Chen is supported by the National High Technology Research
and Development Program of China (No. 2008AA04A102).
L.-Y. Chen (&) Á L.-H. Mao Á X.-Z. Huang
School of Electronic and Information Engineering,
Tianjin University, Tianjin 300072, China
e-mail: [email protected]
L.-Y. Chen
Institute of Microelectronics, Nankai University,
Tianjin 300457, China
123
Analog Integr Circ Sig Process (2011) 66:61–66
DOI 10.1007/s10470-010-9521-5
8/6/2019 uhfrfidtag
http://slidepdf.com/reader/full/uhfrfidtag 2/6
diodes and EEPROM supported. The reading distance of
the transponder IC is more than 3 m with the total supply
current consumption less than 10 lA at 4 W (36 dBm)
EIRP base-station transmit power. The transponder archi-
tecture and the operation of the different building blocks
are described, respectively. The experimental results are
presented and a conclusion is provided.
2 Architecture
The block diagram of the proposed UHF RFID transponder
is shown in Fig. 1. The antenna is the only external com-
ponent. The individual building blocks of this diagram are
described in details in the following paragraphs. The tran-
sponder chip includes the RF analog front end (RF AFE)
circuit and the signal processing unit. The RF AFE consists
of matching network, rectifier, and regulator, power on reset
circuit, local oscillator, bandgap reference, AM demodula-
tor, and backscatter. The processing unit includes controllogic and memory. The matching network circuit is used to
achieve maximum power transfer between the reader,
antenna and transponder. The rectifier converts the incident
RF input signal from the reader to a DC supply voltage. The
regulator provides the stable voltage to all analog and dig-
ital circuits. The AM demodulator extracts out the digital
data bitstream from the received RF signal. The backscatter
circuit sends the data back to the reader by alternating the
input impedance of the transponder. The low power local
oscillator generates the clock signal to the control logic,
which is initialized at power-up by the power on reset
(POR) circuit. The bandgap reference circuit provides the
reference voltage and current to both analog and digital
circuits. The POR circuit generates the chip power on reset
signal. The control logic disposes of the protocols, such as
anticollision, encoding and decoding, cyclic redundancy
checks (CRC), commands, etc.
3 Building blocks
3.1 Rectifier and regulator
Figure 2 shows schematic of the rectifier, which converts
the incident RF signal to a DC supply voltage for the whole
transponder chip. The rectifier is basically a cascade of N-
stage diode-capacitor peak detector [3, 4], which is alsocalled Dickson charge pump in the context of memory ICs
[5]. All diodes and capacitors are identical. The Schottky
diodes with low series resistance and low junction capac-
itance are used, which can achieve a higher power con-
version efficiency of the received RF input energy to a DC
power supply. In AC analysis, all capacitors will appear as
short circuit and all the diodes are connected in parallel (or
antiparallel) to the RF input signal by the capacitors. In DC
analysis, all capacitors are open circuit, and all diodes are
connected in series to allow a DC current flowing. Thus,
the generated voltage is approximately equal to [3]
V DC ¼ N Á V RF;in À V dÀ Á
ð1Þ
where V RF,in is the amplitude of the RF input signal and V dis the forward voltage of each Schottky diode.
The regulator provides constant supply voltage to the RF
AFE circuit and the signal processing unit, as shown in
Fig. 3. The regulator prevents the transponder chip from
breaking down with the varied amplitude of RF input
signal at different locations. The resistors R1 and R2 form
a voltage divider. The error amplifier compares the voltage
V - with the reference voltage V? from the voltage refer-
ence circuit. The transistor M1 is used to sink the current
according to the output of the error amplifier. To achieve
the low power circuit, the startup circuit is used, and
completely turns off once the voltage reference circuit is
started and no dissipation during typical operation state.
3.2 AM demodulator and backscatter
The AM demodulator is used to extract the digital data
bitstream from the incident input carrier signal. Figure 4
shows a block diagram of the AM demodulator. A four-
stage Dickson charge pump is used as the envelope
detector to boost up the input signal. The following two
low-pass filters are used to average the boosted input signal
with large time circuit, which eliminates the carrier noise
and power ripple [6, 7]. The output voltages of two low-
pass filters are then compared with a gain amplifier to
generate the output data bitstream.
The ASK modulation is achieved by a backscattering
approach. The ASK modulator can be regarded as a simple
switch that modulates the input impedance of the tran-
sponder chip [8, 9]. As shown in Fig. 5, by switching on or
off the transistors M1 and M2, the Bi-state amplitudeFig. 1 Block diagram of the transponder chip
62 Analog Integr Circ Sig Process (2011) 66:61–66
123
8/6/2019 uhfrfidtag
http://slidepdf.com/reader/full/uhfrfidtag 3/6
modulated backscatter is achieved. With the modulation
approach, high power conversion efficiency for dc supply
voltage and high modulated backscattering power for the
backward link are implemented simultaneously. The
schematic of the backscatter modulation circuit is shown in
Fig. 5.
Fig. 2 Schematic of the
rectifier
Fig. 3 Schematic of the
regulator
Fig. 4 Schematic of the AM
demodulator
Analog Integr Circ Sig Process (2011) 66:61–66 63
123
8/6/2019 uhfrfidtag
http://slidepdf.com/reader/full/uhfrfidtag 4/6
3.3 Local oscillator
Figure 6 shows a block diagram of the on-chip local oscil-
lator that generates the clock signal for the digital circuits. It
is based on RC relaxation oscillator. The transistors M1 and
M4 are the current source and sink. When the output of the
local oscillator is low, M3 is on and M2 is off. The capacitor
C is charged with the constant current from M4. When theoutput is high, the capacitor is discharged with the constant
current from M1. The local oscillator is sensitive to the
variations of the temperature, supply voltage, and process
parameters. But the bit rate accuracy of the chosen protocol
ISO/IEC 18000-6B is less than ±15%, which is tolerant to
these variations. Therefore, the performance of the digital
circuits cannot be affected.
3.4 Control logic
The control logic is used to utilize the communication
protocols. As shown in Fig. 7, the control logic which is
clocked by the low-power local oscillator includes decoder
module, encoder module, clock synchronization module,
cyclic redundancy checks module, control unit, power
management unit, and shift registers, etc. The clock syn-
chronization algorithm is implemented in order to resolve
the frequency error and synchronization problem, because
the clock signal of the local oscillator slightly varies with
the temperature, supply voltage, and process parameters.
Because of all commands following by the preamble,
which is equivalent to nine bits of Manchester 0 in NRZformat [10], the clock signal of the local oscillator is
synchronized with the Rx signal by the preamble. The ISO
18000-6B standard defines the protocol for a UHF passive
backscatter RFID system, featuring the capabilities as
follows: identification and communication with multiple
tags in the field, selection of a subgroup of tags for iden-
tification or communication, reading from and writing to or
rewriting data many times to individual tags, user-con-
trolled permanently lockable memory, data integrity pro-
tection, interrogator-to-tag communications link with error
detection, tag-to-interrogator communications link with
error detection [5]. In the version of the prototype tagdescribed below, all of the mandatory commands and a
subset of the optional and custom commands defined by the
ISO standard have been implemented.
Fig. 5 Schematic of the backscatter circuit
Fig. 6 Block diagram of the local oscillator
Fig. 7 Block diagram of the
control logic
64 Analog Integr Circ Sig Process (2011) 66:61–66
123
8/6/2019 uhfrfidtag
http://slidepdf.com/reader/full/uhfrfidtag 5/6
4 Experimental results
The transponder chip is fabricated using Chartered0.35 lm two-poly four-metal CMOS process with Schottky
diodes and EEPROM supported. The die size is
1.5 mm 9 1.0 mm. A die photograph is shown in Fig. 8.
The only two bonding wires are required to connect the
antenna to the transponder. Figure 9 shows the measured
results of the transponder IC chip with Tektronix 3308B
real-time spectrum analyzer by the UHF RFID reader of
Model XCRMF-801 (Invengo IT Co., Ltd., Shenzhen),
which is compatible with ISO/IEC 18000-6B Standard.
The received power of the transponder versus the time is
shown in Fig. 9. As shown in Fig. 9(a), the minimum
received power of the transponder is less than -7 dBm.
And, the data rate is 80 kbit/s. Figure 9(b) shows the
waveform of the GROUP_SELECT_NE command from
the reader. With 4 W (36 dBm) EIRP at 915 MHz andthe antenna gain less than 1.5 dBi, the reading distance
of the transponder is more than 3 m. The performance of
the proposed transponder is summarized in Table 1.
Fig. 9 Measured waveforms
of the transponder chip
Table 1 Performance summary of the proposed transponder
Process 0.35 lm 2P4 M CMOS
Carrier frequency 860–960 MHz
Current consumption \10 lA
Tag impedance at 915 MHz 7.3-247j@915 MHzFree space reading distance [3 m
Rx data rate 80 kbit/s
Tx data rate 80 kbit/s
Modulation format ASK
Commands supported ISO/IEC 18000-6B
Die size 1.5 mm 9 1.0 mm
Fig. 8 Die photomicrograph of the transponder chip
Analog Integr Circ Sig Process (2011) 66:61–66 65
123
8/6/2019 uhfrfidtag
http://slidepdf.com/reader/full/uhfrfidtag 6/6
5 Conclusion
This paper presents a low power, fully integrated, passive
UHF RFID transponder IC, which is compatible with ISO/
IEC 18000-6B Standard, operating at the 915 MHz ISM
band with the total supply current consumption less than
10 lA. Theoretical analyses and circuit simulations used
for the design optimization have been proposed. Thetransponder chip has been fabricated by Chartered 0.35 lm
two-poly four-metal CMOS process with Schottky diodes
and EEPROM supported. The free space reading distance
of the transponder IC is more than 3 m with 4 W (36 dBm)
EIRP base-station transmit power and the antenna gain less
than 1.5 dBi. The measurement result meets the specifi-
cation of the proposed system.
Acknowledgments The authors would like to thank Xuan Zheng
and Liyuan Ma for their help in the process of design and
measurements.
References
1. Finkenzeller, K. (2003). RFID handbook (2nd ed.). New York,
USA: Wiley.
2. EPC Regulatory status for using RFID in the UHF spectrum 20.
http://www.epcglobalcanada.org.
3. Karthaus, U., & Fischer, M. (2003). Fully integrated passive UHF
RFID transponder IC with 16.7 uW minimum RF input power.
IEEE Journal of Solid-State Circuits, 38(10), 1602–1608.
4. Vita, G. D., & Iannaccone, G. (2005). Design criteria for the RF
section of UHF and microwave passive RFID transponder. IEEE
Transaction on Microwave Theory and Techniques, 53(9),
2978–2990.
5. Tran, N., Lee, B., & Lee, J. W. (2007). Development of long-range UHF-band RFID Tag chip using Schottky diodes in
standard CMOS technology. IEEE Radio Frequency Integrated
Circuits Symposium, pp. 281–284.
6. Yu, H., & Najafi, K. (2003). Low-power interface circuits for bio-
implantable microsystems. IEEE International Solid -state cir-
cuits conference digital technology papers, pp. 194–487.
7. Rongsawat, K., & Thanachayanont, A. (2006). Ultra low power
analog front-end for UHF RFID transponder. International Sym-
posium on Communications and Information, pp. 1195–1198.
8. Fuschini, F., Piersani, C., Paolazzi, F., & Falciasecca, G. (2008).
Analytical approach to the backscatter from UHF RFID tran-
sponder. IEEE Antennas and Wireless Propagation Letters, 7 ,
33–35.
9. Ashry, A., & Sharaf, K. (2007). Ultra low power UHF RFID tag
0.13 lm CMOS. International Conference on Microelectronics,pp. 283–286.
10. ISO/IEC 18000: Information technology automatic identification
and data capture techniques—Radio frequency identification for
item management air interface. http://www.iso.org.
Li-Ying Chen received his
Ph.D. degrees in microelectron-
ics from Tianjin University,
Tianjin, China, in 2008. He is a
lecturer in Nankai University
now. His current research inter-
ests are UHF RFID transponder
ICs, low-noise phase-locked
loops, and RF front-ends for
wireless communications
Lu-Hong Mao received his
Ph.D. degrees in microelectron-
ics from Tianjin University,
Tianjin, China, in 2000. He is a
professor in Tianjin University.
His current research interests
are UHF RFID transponder ICs,
optoelectronic integrated recei-
ver, and RF front-ends for
wireless communications.
Xiao-Zong Huang received his
B.S. degrees in microelectronics
from Tianjin University, Tian-
jin, China, in 2007. He is cur-rently working toward the M.S.
degree in microelectronics in
Tianjin University. His current
research interests are UHF
RFID transponder ICs.
66 Analog Integr Circ Sig Process (2011) 66:61–66
123