TTC for NA62
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Transcript of TTC for NA62
TTC for NA62
Marian Krivda 1) , Cristina Lazzeroni 1) , Roman Lietava 1)2)
1) University of Birmingham, UK2) Comenius University, Bratislava, Slovakia
9/12/2009 1
Content
• Test of ALICE LTU with TELL1 in Lausanne• Production of NA62 LTUs• Proposed changes for LTU• New labels for front panel• Summary
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Test of ALICE LTU with TELL1 in LausanneTested features:• TTCrx ready o.k.• QPLL lock o.k.• TTCrx reset via
optical fiber o.k.• Triggers in TTC
channel A o.k.
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TELL1board
Small 6U VME crate with ALICE LTU,TTCex and TTCit
Not tested features:• Trigger messages in
TTC channel B
Production of LTUs for NA62
• All components checked – only one component obsolete (CY7C1382B-133AC) but it is possible to buy from a grey market
• The production time depends on delivery of components (longest delivery is 10 weeks) plus 5-10 days manufacture
• The price for one LTU without any changes is 900 pounds
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LTU I/O for NA62
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16-pin connector7 LVDS links
Clock input – ECL signal
Pulser input – ECL input
Burst input - NIM input
Warning injection – LVDS input
Scope probe outputs –2 LVTTL outputs
Ser. data ch.A and B -2 ECL outputs
BUSY/ERROR – LVDS input
BUSY for L0 processor – LVDS output
1 NIM input2 ECL input
2 LVTTL outputs2 ECL outputs1 NIM output
2 LVDS inputs
4 LVDS outputs
Proposed changes for LTUNew front panel VME64x
compatible (ELMA 36D604-6)New connectors:• CHOKE/ERROR (RJ9 – 2 LVDS in)• CHOKE/ERROR for L0 processor (RJ9
– 2 LVDS out)• BURST (NIM in)• Warning injection (Lemo - ECL,NIM,
LVDS ???)• 1 spare ECL input ???• 1 spare NIM input ???
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New labels for front panel• A, B (LVTTL – scope output) o.k.• PLSR (ECL in) o.k., L1 (ECL out) -> L0 (ECL out)• Spare (ECL out) o.k., ORBIT(ECL out) -> L0
data (ECL out)• BC (ECL in) o.k., PP (NIM out) -> Spare (NIM
out)• BURST (NIM in ???)• CHOKE/ERROR (LVDS in)• CHOKE/ERROR (LVDS out)• Warning injection (NIM in ???)
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Software for LTU NA62
• LTU software for– Configuration and Control – Monitoring– L0 processor emulation
• Development of new software discussed in Bratislava: which fraction of ALICE software could be reused or taken as an model
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Summary
• Compatibility test of ALICE LTU with TELL1 was successful
• Production time of LTU board is 12 weeks• Time for the front panel changes is 1 week • Cost of LTU including changes is 1000 pounds
(approx. 1,6K CHF)• I need definition of signals BURST and
Warning injection (NIM, ECL, LVDS)
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Back up slides
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Dictionary
• TTC - Timing, trigger and control• LTU – Local trigger unit• TTCex – TTC encoder/transmitter module• TTCit – Interface Test board• TTCoc – optical coupler (fan out of optical signals)
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TTC requirements
• Distribute a clock at 40 MHz• Jitter < 50 ps RMS• Distribute:
- triggers (6 bits for each trigger)- start of burst- end of burst- event counter at the end of burst- warning ejection signals
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Clock distribution and data flow
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L0 processor
LTU+
TTCex
LTU+
TTCex
LTU+
TTCex
LTU+
TTCex
40 MHz clock
source
. . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . .
TTC partition
TTCrx TTCrx TTCrx TTCrx
Trigger inputs
For jitter < 50 ps RMSQPLL must be used !
QPLL QPLL QPLL QPLL
FEE FEE FEE FEE
BUSY/ERROR
Triggers
Clock +Triggers
Alice LTU+TTCex+(20dB att./TTCoc)
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40 MHz clock
source
6U VME cards 1 LTU+TTCex per detector !!!
Local Trigger UnitLTU (Alice)
Optical transmission of A and B channel
TTCex
ser. data channel Aser. data channel B
Trig. data from CTP
Burst
clock
clock
31 optical outputs to FEE
Detector BUSY/ERROR
LVDS (7)
Warning ejection (WE)
Monitoring of TTCTTCit
TTCoc 1:32
LTU• Global mode
– Receive triggers from L0 processor
• Local mode– Emulate L0 processor - triggers
(start signal can be: BC downscale, random, Pulser input)
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• Serialize trigger data for TTC ch.B • Encode triggers and send them to TTC • Receive BUSY/ERROR from detector and propagate it to L0 processor• Snapshot memory – 27 ms
LTU I/O for NA62
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16-pin connector7 LVDS links
2 LVDS inputs1 NIM input2 ECL input
4 LVDS outputs2 LVTTL outputs2 ECL outputs1 NIM output
Clock input – ECL signal
Pulser input – ECL input
Burst input - NIM input
Warning injection – LVDS input
Scope probe outputs –2 LVTTL outputs
Ser. data ch.A and B -2 ECL outputs
BUSY/ERROR – LVDS input
BUSY for L0 processor – LVDS output
TTCex• ECL input for external clock• ECL inputs for TTC channel A and
channel B• 10 optical outputs• Incorporates encoders driven by an
internal VCXO/PLL with very low jitter and can deliver the optimum optical signal level (-19 dBm) through 1:32 tree couplers to 320 destinations
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TTC channel B format
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16 bits at 40MHz, max. rate 2,5 MHz (8 data bits)
42 bits at 40MHz, max. rate 0,9 MHz(16 data bits)
If 14b TTCrx ADDR == 0 => also Broadcast command/data
TTCrx chip (Broadcast data)
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2 of 8 bits already used for TTCrx internal resets
TTC format for NA62• A channel
- L0 trigger: synch. signal (25ns pulse if ‘L0 accept’)
• B channel – L0 trigger type: asynch. message – short broadcast
(6-bits info related to 25 ns pulse), Event counter at the end of burst
– Start of burst, end of burst, warning ejection (a few µs before spill), warning warning ejection (1 s before spill) – short broadcast message (priority message - guaranteed time precision by inhibit interval !)
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Firmware upgrade for NA62
• NA62 will use only short broadcast (6 bits for trigger type) !!!
• upgrade LTU for sending 6-bits short broadcast• make inhibit interval only 400 ns - only for short
broadcasts which need time precision• Add input signal for Start/End of burst• Add input signal for Warning injection• Implement new functionality (Burst counter, ……
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Software for LTU NA62
• LTU software for– Configuration and Control – Monitoring– L0 processor emulation
• Part of ALICE software may be reused
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Current Alice LTU software
• CTP emulator on LTU board
• Start signal for CTP emualtor
• Frequency
• Counters
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What do we need in the lab ?• Precise clock generator (40.078 MHz)• 6U VME crate• VME processor• LTU module• TTCex module• 20 dB attenuator/TTCoc• Lemo cables• Single mode optical fibers• Appropriate software
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Only reminder – there exists independent monitoring of TTC
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TTCit board
- Receives data from TTCrq (TTCrx + QPLL)- Decoding of data- Display triggers and possibletrigger errors on the front panel- Read snapshot memory with zero suppression via VME bus
2 LVTTL outputs for scope1 LVDS input
Location of TTC partitions in NA62
• It should be in the center in order to have similar delay to fares detectors
• 3 possibility:– Technical gallery– Barak with electronics directly in cavern– Control room (probably too far, necessary to
make calculation how much extra delay will be there)
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LTU cost & time scale for production
Estimation of time scale for production:• Buying of components and PCB production:
5 - 6 weeks• Assembly: 2 – 3 weeks• Test: 1 - 2 weeks
Estimation of cost:• 3 kCHF9/12/2009 28
New TTCex• Advantages – new VCXO which is less expensive
and available, possibility to switch off lasers which are not used
• First prototype – spring 2010• Production – summer 2010 • Cost – 3500 CHF (500 CHF less than current
TTCex)• Cost can decrease if you don`t need 10 lasers (1
laser = 300 CHF) – lasers are in removable socket
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Summary– Distribution of Clock and Triggers– Emulation of L0 processor sequences : detectors can use it before L0
processor is available – Modification of ALICE LTU (firmware and software)– (almost) independent of L0 processor design– For beginning we can borrow a few(6 ???) TTCex from LHC experiments– New version of TTCex is better for NA62 (availability of components)– 1 LTU board (3 kCHF) + 1 TTCex (3,5 kCHF) = 6,5 kCHF/per detector(most expensive part on TTCex is laser 200 CHF/pc, so there is option tohave only 1 laser assembled and use TTCoc 1:32 = 1 kCHF)- 1 LTU (3 kCHF) + 1 TTCex-1laser (1,5 kCHF) + 1 TTCoc 1:32 (1 kCHF) = 5,5 kCHF/per detector -> for 32 optical receivers/FEE !!!- TTCit board(1,2kCHF) for monitoring and debugging purpose if necessary
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Back-up
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Test of max. trigger rate with LTU (Alice) board
• Max. trigger rate (individually-addressed frame, 16 bits data word) measured on TTCit board is 0.9 MHz
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VMEInterface
Local Trigger UnitLTU (Alice)
FIFO
ser. data channel B
Dataprocessing
Optical transmissionTTCex
Optical receiverTTCit
Optical fiber
TTC interface on LTU board
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- 5 different priorities for B channel- inhibit interval 44 BC(1,1µs) after Broadcast command request (in order to have exact time for start of burst, event reset ???)-128x32-b FIFO for trigger data (option for sw generated commandsavailable via VME)
ALICE format
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LTU (Alice) TTCex
16-pin connector7 LVDS links
2 LVDS inputs1 NIM input2 ECL input
4 LVDS outputs2 LVTTL outputs2 ECL outputs1 NIM output
10-optical outputs
ECL I/O:2 A-channel inputs2 B-channel inputs 2 Encoded data outputs2 clock outputs1 clock input
High quality clock
transmission
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ALICE LTU board
16-pin connector7 LVDS links
2 LVDS inputs1 NIM input2 ECL input
4 LVDS outputs2 LVTTL outputs2 ECL outputs1 NIM output
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TTCex board
10-optical outputs
ECL I/O:2 A-channel inputs2 B-channel inputs 2 Encoded data outputs2 clock outputs1 clock input