TRANSISTORS & APPLICATIONSBipolar Junction Transistors

Chapter 5

KMEM4110

TRANSISTOR CONSTRUCTION

Chapter 5

Transistor is a three-layer semiconductor device.

There are two types of transistors: pnp transistor & npn transistor

The terminals are labeled:Fig 1: pnp

and npn

E EmitterB BaseC Collector

COMMON-BASE CONFIGURATION

Chapter 5

The base is common to both input (emitter-base) junction and

output (collector-base) junction of

the transistor

Recall: The arrow in the diode symbol defined the direction of

conduction for conventional

current.

For transistor: The arrow in the graphic symbol defines the

direction of emitter current

(conventional flow) through the

deviceFig 2: Notation and symbols used with

the common-base configuration.

COMMON-BASE CONFIGURATION

Chapter 5

The curve shows the relationship between input current (IE) to input

voltage (VBE) for three output

voltage (VCB) levels.

Fig 3: Input characteristics for common-base

transistor amplifier

Input Characteristics Output Characteristics

The graph demonstrates the output current (IC) to an output

voltage (VCB) for various levels of

input current (IE).

Fig 4: Output characteristics for common-base

transistor amplifier

OPERATING REGIONS

Chapter 5

Active

Operating range of the amplifier.

Cutoff

The amplifier is basically off. There is

voltage, but little current.

Saturation

The amplifier is fully on. There is current,

but little voltage.

APPROXIMATIONS

Emitter and collector currents: EC II

Base-emitter voltage: Silicon) (for V .VBE 70

ALPHA ()

Chapter 5

Alpha () is the ratio of IC to IE :

Ideally: = 1

In reality: falls somewhere between 0.9 and 0.998

EI

CI

dc

COMMON-EMITTER CONFIGURATION

Chapter 5

The emitter is common to both input (base-emitter) and output (collector-emitter) circuits.

The input is applied to the base.

The output is taken from the collector

Common-emitter amplifier currents:

Ideal Currents

IE = IC + IB IC = IE

COMMON-EMITTER CHARACTERISTICS

Chapter 5

Collector Characteristics Base Characteristics

BETA ()

Chapter 5

represents the amplification factor of a transistor.

Relationship between amplification factors and

is particularly important parameter because it provides a direct link between current levels of the input and output circuits for a common-emitter

configuration

BI

CIdc

1

1

BC II BE )I(I 1

COMMON-COLLECTOR CONFIGURATION

Chapter 5

The input is on the base and the output is on the

emitter

Fig 5: Notation and symbols used with

the common-collector configuration.

COMMON-COLLECTOR CONFIGURATION

Chapter 5

For common-collector configuration, the output

characteristics are similar

to those of the common-

emitter configuration

except the vertical axis is

Output characteristics are a plot of versus for a range of values of

DC BIASING - BJTs

Chapter 5

Biasing: Application of dc voltages to establish a fixed level of current

and voltage.

For transistor amplifiers, the resulting dc current and voltage establish an

operating point on the

characteristics that define the region

that will be employed for

amplification of the applied signals.

Operating point: Q-point

Fig 6: Various operating points within the

limits of operation of a transistor.

THE THREE OPERATING REGIONS

Chapter 5

Operation in the cutoff, saturation and linear regions of the BJT characteristics are provided as follows:

Active or Linear Region Operation

BaseEmitter junction is forward biased BaseCollector junction is reverse biased

Cutoff Region Operation

BaseEmitter junction is reverse biased

Saturation Region Operation

BaseEmitter junction is forward biased BaseCollector junction is forward biased

FIXED-BIAS CONFIGURATION

Chapter 5

The fixed-bias circuit of Fig 7 is the simplest transistor dc bias

configuration.

Even though the network employs an npn transistor, equations and

calculations apply equally well to

a pnp transistor configuration by

changing all current directions and

voltage polarities.

For dc analysis: the network can be isolated from the indicated ac

levels by replacing the capacitors

with an open-circuit equivalent

Fig 7: Fixed-bias circuit.

THE BASE-EMITTER LOOP

Chapter 5

From Kirchhoffs voltage law:

+ = 0

Note the polarity of the voltage drop across as established by the indicated direction of

Solving for base current:

Because and are constant, the selection of sets the level of base current for the operating point.

Fig 8: Base-emitter loop.

B

BECCB

R

VVI

COLLECTOR-EMITTER LOOP

Chapter 5

Collector current:

Changing to any level will not affect the level of or as long as we remain in the active region of the device.

From Kirchhoffs voltage law:

: voltage from collector to emitter

and : voltages from collector and emitter to ground

Fig 9: Collector-emitter loop.

BC II

CCCCCE RIVV

SATURATION

Chapter 5

When the transistor is operating in saturation, current through the transistor is at its maximum possible value.

To know the approximate maximum collector current (saturation level), insert short circuit equivalent between collector and emitter of the transistor.

Resulting saturation current for fixed-bias configuration:

VCEV 0

CR

CCV

CsatI

LOAD LINE ANALYSIS

Chapter 5

The load line end points are:

The Q-point is the operating point where the value of sets the value of

Fig 10: Fixed-bias load line.

ICsat

IC = VCC / RC

VCE = 0 V

VCEcutoff

VCE = VCC

IC = 0 mA

EFFECT OF AND ON THE Q-POINT

Chapter 5

Fig 11: Effect of lower values of on the load line and the Q-point.

Fig 12: Effect of an increasing level of on the load line and the Q-point.

EFFECT OF ON THE Q-POINT

Chapter 5

Fig 13: Movement of the Q-point with

increasing level of .

EXAMPLE

Chapter 5

EMITTER-BIAS CONFIGURATION

Chapter 5

Fig 14: BJT bias circuit with emitter resistor.

The dc bias network of Fig 14 contains an emitter resistor to improve stability level over that of

the fixed-bias configuration.

The more stable a configuration, the less its response will change due to

undesirable changes in temperature

and parameter.

BASE-EMITTER LOOP

Chapter 5

Fig 15: Base-emitter loop.

From Kirchhoffs voltage law:

Since:

Solving for :

Note: The only difference between this equation for and that obtained for fixed-bias configuration is the term ( + 1)

0 RIVRIV EEBEBBCC

IE = ( + 1)IB

01 EBBEBBCC R)I(VRIV

EB

BECCB

)R(R

VVI

1

COLLECTOR-EMITTER LOOP

Chapter 5Fig 16: Collector-emitter loop.

From Kirchhoffs voltage law:

Since:

Also:

0 VR I V R I CCCCCEEE

IE IC

) R (R I V V ECCCCCE

EBEBBCCB

CCCCECEC

EEE

VV R I V V

RIVV V V

R I V

IMPROVED BIASED STABILITY

Chapter 5

Stability refers to a condition in which the currents and voltages remain fairly constant over a wide range of temperatures and transistor Beta () values.

Adding RE to the emitter improves the stability of a transistor.

SATURATION LEVEL

Fig 17: Determining for

the emitter-bias circuit

The collector saturation level (or maximum collector current) for an emitter-bias design can be determined using same

approach as the fixed-bias configuration.

Apply short circuit between collector-emitter terminals shown in Fig 17.

Calculate the resulting collector current:

ERCR

CCV

CsatI

VCE

V0

LOAD-LINE ANALYSIS

Chapter 5

Fig 18: Load line for the

emitter-bias configuration

The endpoints can be determined from the load line

VCEcutoff:

mA0 I

V V

C

CCCE

ICsat:

ERCR

CCV

CI

VCE

V0

EXAMPLE

Chapter 5

ANSWER

Chapter 5