Transistor Characteristics EMT 251. Outline Introduction MOS Capacitor nMOS I-V Characteristics...
-
Upload
grant-flynn -
Category
Documents
-
view
259 -
download
15
Transcript of Transistor Characteristics EMT 251. Outline Introduction MOS Capacitor nMOS I-V Characteristics...
Transistor Transistor CharacteristicsCharacteristics
Transistor Transistor CharacteristicsCharacteristics
EMT 251EMT 251
Outline
• Introduction• MOS Capacitor• nMOS I-V Characteristics (ideal)• pMOS I-V Characteristics (ideal)
Introduction• So far, we have treated transistors as ideal
switches• An ON transistor passes a finite amount of
current– Depends on terminal voltages– Derive current-voltage (I-V) relationships
• Transistor gate, source, drain all have capacitance– I = C (V/t) -> t = (C/I) V– Capacitance and current determine speed
MOS Capacitor
polysilicon gate
(a)
silicon dioxide insulator
p-type body+-
Vg < 0
(b)
+-
0 < Vg < Vt
depletion region
(c)
+-
Vg > Vt
depletion regioninversion region
• Gate and body form MOS capacitor• Operating modes
– Accumulation– Depletion– Inversion
-V
V+
V++
Terminal Voltages• Mode of operation depends on Vg, Vd, Vs
– Vgs = Vg – Vs
– Vgd = Vg – Vd
– Vds = Vd – Vs = Vgs - Vgd
• Three regions of operation– Cutoff– Linear– Saturation
nMOS Cutoff
• No channel• Vgs < Vt
• Ids = 0 +-
Vgs = 0
n+ n+
+-
Vgd
p-type body
b
g
s d
nMOS Linear
• Channel forms– Vds = Vgs-Vgd– If Vds=0 (i.e. Vgs=Vgd)
• No electrical field tending to push current fr. d to s.
• Small positive potential Vds• Current flows from d to s
– e- from s to d
• Ids increases with Vds
• Similar to linear resistor
+-
Vgs > Vt
n+ n+
+-
Vgd = Vgs
+-
Vgs > Vt
n+ n+
+-
Vgs > Vgd > Vt
Vds = 0
0 < Vds < Vgs-Vt
p-type body
p-type body
b
g
s d
b
g
s dIds
nMOS Saturation
• Channel pinches off• Ids independent of
Vds• We say current
saturates• Similar to current
source
+-
Vgs > Vt
n+ n+
+-
Vgd < Vt
Vds > Vgs-Vt
p-type body
b
g
s d Ids
Nmos region of operation
“CUTOFF” region: VG < VT
1. Cutoff region: VGS < VT, any value of VDS
ID = 0
2. Linear (or Resistive, or Triode) region: VGS > VT, VDS < (VGS – VT)
3. Saturation region: VGS > VT, VDS > (VGS – VT)
L
WC
VVI
oxn
TGSDSAT
where
2
2
L
WC
VV
VVI
oxn
DSDS
TGSD
where
2
Example
0 1 2 3 4 50
0.5
1
1.5
2
2.5
Vds
I ds (m
A)
Vgs = 5
Vgs = 4
Vgs = 3
Vgs = 2
Vgs = 1
• We will be using a 0.6 m process for your project– From AMI Semiconductor
– tox = 100 Å
– = 350 cm2/V*s
– Vt = 0.7 V
• Plot Ids vs. Vds
– Vgs = 0, 1, 2, 3, 4, 5
– Use W/L = 4/2
14
28
3.9 8.85 10350 120 /
100 10ox
W W WC A V
L L L
pMOS I-V• All doping and voltages are inverted for pMOS• Mobility mp is determined by holes
– Typically 2-3x lower than that of electrons mn
– 120 cm2/V*s in AMI 0.6 mm process• Thus pMOS must be wider to provide same
current– In this class, assume mn / mp = 2
– *** plot I-V
Transistor Operation
• Current depends on region of transistor behavior
• For what Vin and Vout are nMOS and pMOS in– Cutoff?– Linear?– Saturation?
Schematic of CMOS Schematic of CMOS inverterinverter
nMOS Operation
Cutoff Linear Saturated
Vgsn < Vtn
Vin < Vtn
Vgsn > Vtn
Vin > Vtn
Vdsn < Vgsn – Vtn
Vout < Vin - Vtn
Vgsn > Vtn
Vin > Vtn
Vdsn > Vgsn – Vtn
Vout > Vin - Vtn
Idsn
Idsp Vout
VDD
Vin
Vgsn = Vin
Vdsn = Vout
pMOS OperationCutoff Linear Saturated
Vgsp > Vtp
Vin > VDD + Vtp
Vgsp < Vtp
Vin < VDD + Vtp
Vdsp > Vgsp – Vtp
Vout > Vin - Vtp
Vgsp < Vtp
Vin < VDD + Vtp
Vdsp < Vgsp – Vtp
Vout < Vin - Vtp
Idsn
Idsp Vout
VDD
Vin
Vgsp = Vin - VDD
Vdsp = Vout - VDD
Vtp < 0
Calculation of VIL
When the input voltage is Vin = VIL, the slope of the VTC is equal to [-1](dVout/dVin). At this point B, nMOS transistor operates in saturation while the pMOS transistor operates in the linear region. Using KCL at output node:
[Id,n(saturation)= Id,p(linear)]
At point D, input voltage is equal to VIH, the nMOS transistor operates in the linear region and pMOS transistor operates in saturation. By applying KCL at the output node:
[ Id,n(linear) = Id,p(saturation)]
Calculation of VIH
Threshold voltage is defined as Vth=Vin=Vout. For Vin=Vout, both transistor operate in saturation region, refer point C. By applying KCL at output node:
[ Idn(saturation)=Idp(saturation) ]
Calculation of Vth
Consider a CMOS inverter circuit with the following parameters, calculate the (W/L) ratios of the nMOS and pMOS transistors if the switching voltage is Vth = 1.5 V.
VDD = 3.3 V
VT,n = 0.6 V
VT,p = -0.7V
µncox = 80 µA/V2
µpcox = 30 µA/V2
Exercise 1
Exercise 2
Consider a CMOS inverter circuit with the following parameters, calculate the Switching voltage (Vth) of the circuit.
VDD = 3.3 V
VT,n = 0.6 V
VT,p = -0.7V
µncox = 80 µA/V2
µpcox = 30 µA/V2
(W/L)n = 8(W/L)p = 12
Voltage transfer characteristic
Inverter with n-Type MOSFET load
Depletion-Load nMOS Inverter
When the input voltage Vin is smaller than the driver threshold voltage VTO, the driver transistor is turned off and thus not conduct any drain current. ID,load = 0,
VOH = VDD ID,load = 0
Calculation of VOH
Assume Vin = VOH = VDD. Driver transistor operate in linear region and load transistor operate in saturation. By using KCL.
Id,driver(linear) = Id,load(saturation)
Calculation of VOL
When Vin = VIL the slope of the VTC is equal to (-1),(dVout/dVin). Driver transistor operate in saturation region and load transistor operate in linear region. KCL
Id,driver(saturation) = Id,load(linear)
Calculation of VIL
Calculation of VIH
Driver transistor operate in linear region and load transistor operate in saturation region.
Id,driver(linear) = Id,load(saturation)
Region
nMOS pMOS
A Cutoff Linear
B Saturation Linear
C Saturation Saturation
D Linear Saturation
E Linear Cutoff
Operating Regions (Summary)
Vout
Vin0.5 1 1.5 2 2 .50.
51
1.5
22.
5
NMOS resPMOS off
NMOS satPMOS sat
NMOS offPMOS res
NMOS satPMOS res
NMOS resPMOS sat
Exercise 3
VDD = 3.3 VThreshold voltage nMOS (VT,n) = 0.6 VThreshold voltage pMOS (VT,p) = -0.7VKn = 200 µA/V2
Kp = 80 µA/V2
Based on the inverter circuit and parameter in figure above, what is the value of:
i) Switching Voltage, VTH
ii) Input Voltage High, VIH
THE END