1

Chapter 1

INTRODUCTION

1.1 Inverters equipped with transformers

Grid-connected photovoltaic (PV) systems, particularly low-power single-phase

systems (up to 5 kW), are becoming more important worldwide. They are usually private

Systems where the owner tries to get the maximum system profitability. Issues such as

reliability, high efficiency, small size and weight, and low price are of great importance

to the conversion stage of the PV system. Quite often, these grid-connected PV systems

include a line transformer in the power-conversion stage, which guarantees galvanic

isolation between the grid and the PV system, thus providing personal protection.

Furthermore, it strongly reduces the leakage currents between the PV system and the

ground, ensures that no continuous current is injected into the grid, and can be used to

increase the inverter output voltage level. The line transformer makes possible the use of

a full-bridge inverter with unipolar pulse-width modulation (PWM). The inverter is

simple. It requires only four insulated gate bipolar transistors (IGBTs) and has a good

trade-off between efficiency, complexity and price.

Due to its low frequency, the line transformer is large, heavy and expensive.

Technological evolution has made possible the implementation, within the inverters, of

both ground-fault detection systems and solutions to avoid injecting dc current into the

grid. The transformer can then be eliminated without impacting system characteristics

related to personal safety and grid integration. In addition, the use of a string of PV

modules allows maximum power point (MPP) voltages large enough to avoid boosting

voltages in the conversion stage. This conversion stage can then consist of a simple buck

inverter, with no need of a transformer or boost dc–dc converter, and it is simpler and

more efficient. But if no boost dc–dc converter is used, the power fluctuation causes a

voltage ripple in the PV side at double the line frequency. This in turn causes a small

reduction in the average power generated by the PV arrays due to the variations around

the MPP. In order to limit the reduction, a larger input capacitor must be used. Typical

values of 2 mF for this capacitor limit the reduction in the MPPT efficiency to 1% in a 5-

KW PV system. However, when no transformer is used, a galvanic connection between

the grid and the PV array exists.

2

Dangerous leakage currents (common-mode currents) can flow through the large

stray capacitance between the PV array and the ground if the inverter generates a varying

common-mode voltage. A topology that generates no variable common-mode voltage is

the half-bridge family of inverters, with two, three or more levels. The main drawback is

the need of high input voltages (greater than, approximately, 700 V for European

applications), which involves the use of either a large PV string or a previous boost dc–dc

stage. The full-bridge topology requires half of the input voltage demanded by the half-

bridge topology, that is, around 350 V for European applications. In order to avoid a

varying common-mode voltage, the full bridge has to be modulated with bipolar PWM, a

modulation strategy that leads the converter to a low efficiency and a high current ripple.

This project studies a new topology that generates no varying common-mode

voltage, requires the same low-input voltage as the bipolar PWM full-bridge topology,

and achieves a higher efficiency and a lower current ripple in the inductor. The topology

consists of six switches and two diodes and can be an advantageous power conversion

stage for transformerless grid-connected PV systems.

1.2 Disadvantages of inverters equipped with Transformer

The use of transformers in inverters simplifies the conversion of AC to match the

grid voltage level, but involves magnetic and ohmic losses, and increases the device’s

weight. Furthermore, far from operating silently, it draws attention to itself with a low-

pitched humming noise. For this reason, high frequency transformers are often used

instead of 50 hertz (Hz) models. They are smaller, lighter in weight and more efficient,

but require more complex power electronics.

If the DC supplied by the PV generator is greatly above the crest value of the grid

voltage, the transformer becomes technically redundant. In addition, buck-boost

converters can be employed to expand the input voltage range of an inverter and adjust it

to suit different PV generators. Owing to their higher efficiency, transformerless inverters

are now well established on the market.

Since removing the transformer also entails the loss of galvanic isolation, a DC

sensitive fault protection switch needs to be included. A further disadvantage of

transformerless inverters is a slight increase in electromagnetic radiation (electrosmog).

3

1.3 Common Mode Voltage in Full Bridge Inverter

Figure 1.1 shows a typical full bridge topology. Generally, two pulse width

modulation (PWM) techniques are used for full bridge inverter - unipolar and bipolar

modulation. Unipolar modulation is also known as three-level modulation. It generates

three level output voltage: +Vdc, 0, - Vdc, with double of the switching frequency. In

every switching transition, the voltage changes across the inductor by Vdc. Thus, unipolar

PWM reduces change of voltage (dv/dt), ripple current, filter size and losses in both

switches and inductors. However, unipolar PWM is not suitable for transformerless full

bridge topology. Voltage oscillating with switching frequency energizes stray

capacitances which generates high frequency common mode voltage. This high

frequency common-mode voltage generates dangerous leakage current up to few

amperes.

Fig 1.1 Full Bridge Inverter topology

4

1.4 Pulse width Modulation Basics

There are many forms of modulation used for communicating information. When

a high frequency signal has amplitude varied in response to a lower frequency signal we

have AM (amplitude modulation). When the signal frequency is varied in response to the

modulating signal we have FM (frequency modulation. These signals are used for radio

modulation because the high frequency carrier signal is needs for efficient radiation of

the signal. When communication by pulses was introduced, the amplitude, frequency and

pulse width become possible modulation options. In many power electronic converters

where the output voltage can be one of two values the only option is modulation of

average conduction time.

Fig 1.2 Sine triangle modulated pulses

5

The most efficient method of controlling output voltage is to incorporate PWM

control within inverters. In this method, a fixed d.c. voltage is supplied to inverter and a

controlled a.c. output voltage is obtained by adjusting on-off period of inverter devices.

The basic PWM techniques are:

1. Single Pulse Width Modulation

2. Multi Pulse Width Modulation

3. Sinusoidal Pulse Width Modulation (SPWM )

Pulse Width Modulation variable speed drives are increasingly applied in many

new industrial applications that require superior performance. Recently, developments in

power electronics and semiconductor technology have lead improvements in power

electronic systems. Hence, different circuit configurations namely PWM inverters have

become popular and considerable interest by researcher are given on them. A number of

Pulse width modulation (PWM) schemes are used to obtain variable voltage and

frequency supply. The most widely used PWM scheme for voltage source inverters is

sinusoidal PWM.

1.5 Development of inverter with SPWM

SPWM is commonly used in industrial application. In this scheme the width of

each pulse is varied in proportion to the amplitude of a sine wave evaluated at the center

of same pulse. The gating signals are generated by comparing a sinusoidal reference

signal with a triangular carrier wave of frequency fc. The frequency of reference signal

determines the inverter fr determines the inverter output frequency fo and its peak

amplitude Ar controls the modulation index, M and then in turn the RMS output voltage

Vo. The number of pulses per half-cycle depends on the carrier frequency. Within the

constraint that two transistors of same arm cannot conduct at the same time, the

instantaneous output voltage is shown in Fig 1.3.

6

Fig 1.3 Sinusoidal Pulse Width Modulation

It can be observed that the area of each pulse corresponds approximately to the

area under the sine wave between the adjacent midpoints of off periods on the gating

signals. The same gating signals can be generated by using unidirectional triangular

carrier wave.

7

8

Bipolar modulation, also known as two-level modulation, generates two level

output voltage: +Vdc and -Vdc. In every switching transition, the voltage changes across

the inductor by twice of input voltage, 2Vdc. Such modulation technique reduces the

overall efficiency of the inverter due to large current ripple across the inductors and high

switching losses. Compared to unipolar PWM, leakage current is significantly reduced

due to constant common-mode voltage.

9

1.6 Single phase transformerless inverter

Photovoltaic (PV) inverters have a very important role in the energy market,

therefore they must possess excellent characteristics regarding cost and reliability. The

PV structure most often used in the conversion stage of solar energy system includes a

Low Frequency Transformer (LFT) which provides galvanic isolation, but on the other

hand reduces the overall efficiency and increases the total size and cost of the system. An

alternative to reduce the size of the system and the losses, is to use a High Frequency

Transformer (HFT), the problem in this case is that additional power stages must be

included in the system. The additional stages increase the power losses in the conversion

process, as a consequence the efficiency of the system is reduced. Therefore the tendency

is to remove the transformer in order to increase the efficiency and reduce the cost. A

security problem regarding common mode currents arise when the LFT or HFT is

omitted. In this paper an inverter topology to deal with the problem of the common mode

currents is proposed. Numerical results are performed in order to prove the performance

of the topology regarding efficiency and Common Mode Voltage (CMV) issues.

The PV renewable energy has become a very important electrical energy source

within the entire energy market. The growing is mainly due to the fact that these systems

have been constantly improving in terms of efficiency, power, reliability, etc. On the

other hand, the policies stated by the governments in many countries have allowed the

spread of the PV systems. The PV system can be designed either in island or grid

connected mode being the last one the most commonly used (Kjaeret al., 2005). The grid

connection allows injecting the power generated into the electrical grid; in order to

achieve this objective, the PV system is commonly set by using three stages: the PV

array, the power inverter and the grid filter with the galvanic isolation (Kerekeset al.,

2009). In the conventional PV systems, the last stage includes a LFT to link the converter

with the electrical grid to provide galvanic isolation as it is shown in Figure 1.4.

10

Fig 1.4Power inverter with low frequency transformer.

However, the main problem with the LFT is that it introduces around 2% of

power losses in the system yielding low efficiency. Furthermore, the LFT increases the

total cost of the system and the transformer size is big due to the operating frequency that

coincides with the frequency of the electrical grid which can be 50or 60Hz (Gonzalez et

al., 2007).

In order to solve the problem of the transformer size, a HFT has been proposed as

an intermediate stage(Li &Wolrfs, 2008; Xueet al., 2004), the system is shown in Figure

1.5. However, the efficiency in this case is significantly reduced, not only because of the

losses in the transformer but also because of the additional power stages that must be

added in the power conversion process. Since the efficiency is one of the most important

issues in a PV system, transformerless inverters have emerged to mitigate the problems of

the galvanic isolated systems. As the transformerless inverters are connected directly to

the electrical grid, there is not galvanic isolation between the PV system and the electrical

grid dealing in new problems to be solved.

11

Fig 1.5 power inverter with high frequency transformer(HFT)

A PV solar panel naturally presents a stray capacitance which is formed between

the PV cells and the grounded frame like in Figure 1.3. Thus, when the PV generator is

connected to the grid by means of a transformerless inverter, a leakage current can flow

through the stray capacitances as it is shown in Figure 1.4. Then, the leakage current can

generate additional power losses in the system and a high risk of electrical shock for the

users in contact with the PV installation (Gubíaet al.,2007). On the other hand, a resonant

circuit is formed between the parasitic capacitances, the impedance of the ground path

and the passive elements in the output filter of the converter (Salmet al., 2012; Yang et

al., 2012).

Fig 1.6 Parasitic capacitance model of a PV panel

12

The resonance peak can reach high values yielding serious problems in the

operation of the circuit. Unfortunately, the value of the stray capacitance depends on

operational and weather conditions as: humidity, PV panel surface, the material used in

the metallic frame and the values in the passive elements of the power converter

(Kerekeset al., 2007, Jietal., 2013; Houet al., 2013), therefore, it is not possible to

precisely determine its value. Nevertheless, some experiments have been done in order to

estimate the value of these capacitances which according to Lopez et al. (2010)is between

50-150 nF/Kw, which is enough to conduct current to the ground at the switching

frequency (7-20kHz) (Gonzalez et al., 2008). On the other hand, it has been demonstrated

that the magnitude and frequency of the leakage currents, depends mainly on the power

converter topology and its modulation strategy (Xiaomenget al., 2011).

Fig 1.7 Leakage ground current path in a transformerless PV inverter

When leakage ground currents appear in the stray capacitances in a PV array, it

comes up a problem related to the personal security. Since in a PV plant there are people

in charge of maintenance, they may touch the panel and the leakage current can flow

through their body, causing injury, shock and in an extreme case, death. To avoid this

kind of situations, some standards have been imposed to regulate the maximum leakage

current level that can flow through the ground path in transformerless PV systems.

13

A normative was established in Germany by DIN (Deutsches Institutfür

Normunge. V.) for transformerless PV systems that have been widely extended. One of

these standards is the DINVDE 0126-1-1 that regulates the maximum leakage current

level allowed that can be up to 300 mA(DKE, 2005; Vázquezet al., 20

1.7 Bipolar SPWM

IGBT is used as switch, the gate signal is ON for + Vdc and OFF for - Vdc.

Fig 1.8 Bipolar SPWM

Bipolar PWM Outputs

The output alternates between plus and minus the dc supply voltage.

Vo = +/- Vdc

The output is at + Vdc when the instantaneous value of the sine reference is larger

than the triangular carrier.

Vo = + Vdc for Vsine > Vtri

The output is - Vdc when the sine reference is less than the triangular carrier.

Vo = - Vdc for Vsine < Vtri

The switching scheme that will implement bipolar switching using the full bridge

inverter is determined by comparing the instantaneous reference and carrier

signals:

T1 and T2 are on when Vsine > Vtri (Vo = + Vdc)

T3 and T4 are on when Vsine < Vtri (Vo = - Vdc)

14

Harmonics in Bipolar SPWM

The Fourier series if the bipolar PWM output is determined by examining each

pulse.

mf is chosen to be an odd integer, PWM output exhibits odd symmetry.

Fourier series is expressed as:

The harmonic amplitudes are a function of ma because, width of each pulse

depends on the relative amplitudes of the sine and triangular waves.

The first harmonic frequencies in the output spectrum are at mf and around mf.

Fig 1.9 Normalized frequency spectrum for Bipolar SPWM

1

sin( )O n on

t n tV V

1

1

2

0

1

sin( ) ( ),

2sin( ) ( ) sin( ) ( )

2cos( ) cos( ) 2cos( )

4o o

k k k

k k k

nk dc o o dc o o

dck k k k

T

n O

p

nkk

n t t

n t t n t tV V V

Vn n

n

tV VT

V

         T = 2  

15

1.8 MATLAB simulation results for bipolar SPWM

The Bipolar SPWM was simulated using MATLAB/SIMULINK. The reference

sine wave used was of amplitude 0.8 volts and frequency 50 Hz. and the triangular carrier

wave of amplitude 1 volt and frequency 2000 Hz.

16

1.9 Unipolar SPWM

The unipolar modulation normally requires two sinusoidal modulating waves Vm

and Vm- which are of same magnitude and frequency but 1800 out of phase. The two

modulating wave are compared with a common triangular carrier wave vcr generating

two gating signals vg1 and vg3 for the upper two switches S1 and S3. It can be observed

that the upper two devices do not switch simultaneously, which is distinguished from the

bipolar PWM where all the four devices are switched at the same time. The inverter

output voltage switches between either between zero and +Vd during positive half cycle

or between zero and –Vd during negative half cycle of the fundamental frequency thus

this scheme is called unipolar modulation. The unipolar switched inverter offers reduced

switching losses and generates less EMI. On efficiency grounds, it appears that the

unipolar switched inverter has an advantage.

Over modulation occurs when amplitude modulation index ma is greater than

unity. It causes a reduction in number of pulses in the line to line voltage waveform

leading to emergence of lower order harmonics. Moreover the notch and pulse widths

near the center of positive and negative half cycle tend to vanish.

Fig 1.10 Waveforms of Unipolar SPWM scheme

17

To complete the switching operations of the device, minimum notch and pulse

widths must be maintained. When minimum width notches and pulses are dropped, there

will be some transient jump of load current.

Unipolar SPWM Outputs

The output is switched either from high to zero or from low to zero.

Vo = +Vdc, 0, - Vdc

Switch pairs (S1, S4) and (S2, S3) are complementary (when one switch in a pair

is closed, the other is opened)

S1 is on when Vsine>Vtri

S2 is on when -Vsine<Vtri

S3 is on when –Vsine > Vtri

S4 is on when Vsine < Vtri

The voltages Va and Vb alternate between + Vdc and zero.

The output voltage, Vo = Vab = Va - Vb

Another unipolar switching scheme has only one pair of switches operating at the

carrier frequency while the other pair operates at the reference frequency. ( Thus,

there are two high frequency switches and two low frequency switches)

S1 is on when Vsine > Vtri (high frequency)

S4 is on when Vsine < Vtri (high frequency)

S2 is on when Vsine > 0 (low frequency)

S3 is on when Vsine < 0 (low frequency)

Harmonics in unipolar SPWM

Frequency modulation index, mf is chosen to be an even integer the harmonics in

the output begin at around 2 mf.

The unipolar PWM scheme using high and low frequency switches have similar

results for frequency spectrum as in bipolar PWM but the harmonics will begin at

around mf rather than 2 mf.

18

Fig 1.12 Harmonic analysis in Unipolar SPWM

1.10 MATLAB simulation for unipolar SPWM

MATLAB simulation is done for a sine reference wave of amplitude 0.8 volts and

frequency 50 Hz. The triangular carrier wave used has an amplitude of 1 volt and a

frequency of 2000 Hz.

19

20

Chapter 2

PARASITIC CAPACITANCE AND LEAKAGE CURRENT

2.1 Parasitic Capacitance

PV panels are manufactured in many layers and the junction of these layers is

covered by grounded metallic frame. A parasitic capacitance (stray capacitance) is

formed between the earth and the metallic frame. Its value is directly proportional to the

surface area of the PV panel. Dangerous leakage currents (common mode currents) can

flow through the large stray capacitance between the PV array and the ground if the

inverter generates a variable common mode voltage. These leakage currents have to be

eliminated or at least limited to a safe value.

2.2 Condition for eliminating common mode leakage current

The ground leakage current that flows through the parasitic capacitance of the PV

array is greatly influence on the common mode voltage generated by a topology

.Generally the utility grid does not influence the common mode behavior of the system.

The common-mode voltage can be defined as the average of the sum of voltages

between the outputs and the common reference. In this case, the common reference is

taken to be the negative terminal of the PV.

The differential-mode voltage is defined as the difference between the two

voltages.

Fig 2.1. Model Showing Common mode and differential mode voltages

21

Using Thevenin’s theorem in the above circuit the model can be simplified. By

applying Kirchhoff’s voltage law as shown in Fig 2.2.

dm AB AN BNu u u u ........................(1)

from the above two equations

2

2

dmAN cm

dmBN cm

uu u

uu u

Fig 2.2. Model to find out the equivalent common mode voltage

Leakage current ecm

leakage

dvc

dti ........................(2)

2

AN BNcm

u uu

22

Hence if effective common mode voltage Vecm is maintained constant then,

differential of a constant quantity will be zero and hence leakage current will be zero.

........................(3)

To find out the current,

The simplified equivalent model of the common-mode resonant circuit has been

derived in as shown in Figure 2.3, where CPV is the parasitic capacitor, LA and LB are the

filter inductors, ileakage is the common-mode current and, an equivalent common-mode

voltage uecm is defined by,

2

2

2

2

2

02

= const

2 2

B A

A B

B A

A B

dm

dm

dm

dm

dm

dm

Acm ecm

A

B

dm

A

A B

B A

A B

ecm cm

ecm cm

ecm cm

ecm cm

ecm cm

AN BN AN BNecm

L

L L

L L

L L

L L

uu uL

L

L

uL

L

L L

L L

uu u

uu u

uu u

uu u

uu u

i

i

i

u u u uu

ant

2

B A

A B

dmecm cm

L L

L L

uu u

23

Fig 2.3.Simplified equivalent model of common mode resonant circuit

It is clear that the common-mode leakage current icm is excited by the defined

equivalent common-mode voltage uecm. Therefore, the condition of eliminating common

mode leakage current is drawn that the equivalent common-mode voltage uecm must be

kept a constant as follows,

In the full-bridge inverter family, the filter inductors LA and LB are commonly

selected with the same value. As a result, the condition of eliminating common-mode

leakage current is met that,

........................(8)

2 2

2

B A

A B

AN BN AN BN

AN BNcm

A B

ecm

ecm

L L

L L

u u u u

u uu

L L

u

u

24

Chapter 3

SINGLE PHASE FULL BRIDGE INVERTER TOPOLOGIES

3.1 Photo-Voltaic Inverters

Renewable energy sources and mostly photovoltaic (PV) applications are now-a-

days experiencing a fast and continuous development. From the scientific point of view,

the effort over the last years has gone into increasing the efficiency of PV cells and

bringing down the manufacturing costs. Taken into account that the efficiency of the PV

panels currently available on the market is only 15-20%, a crucial aspect in these kinds of

applications is to design efficient power electronics systems to exploit the most of the

produced energy.

The main component of these systems is the PV inverter, representing the 25% of

the whole system cost. Inverters used in PV systems can be grouped into two main

categories: the isolated and the non-isolated inverters. The former, in order to create a

galvanic isolation between the input and the output include a transformer (mandatory in

some countries) that limits the whole system performances in terms of efficiency, weight,

size and cost. On the contrary, transformer-less inverters do not present any isolation and

are characterized by little size, lower cost and higher efficiency (more than 2%higher).

Nevertheless, the lack of transformers leads to leakage currents that can be harmful to the

human body, as well as for the whole conversion system integrity. This can be considered

as their main drawback.

3.2 NPC inverter

The operation of Neutral point clamp (NPC) topology (Fig.4.1) can be described

as follow: during the positive half cycle, T2 remains ON, T1 commutates at switching

frequency and T3 and T4 are OFF; in more detail, when T1 is ON the current flows

through T1 and T2 toward the grid (current increasing), while when T1 is OFF, the current

flows through D5 and T2 (current decreasing). During the negative half cycle, T3 remains

ON, whereas T4 commutates at switching frequency and T1 and T2 are OFF; when T4 is

ON current flows through T3 and T4 toward the grid (current increasing). Moreover,

when T4 is OFF, the current flows through T3 and D6 (current decreasing).

25

Fig 3.1 NPC inverter topology

3.3 HERIC topology

HERIC (Highly Efficient and Reliable Inverter Concept) topology is another

structure that avoids a fluctuating potential on the DC terminals of the PV generators by

means of disconnecting the converter from the grid (Fig.3.2).

26

Fig 3.2 HERIC topology

During the positive half cycle T6 remains connected, whereas T1 and T4

commutate at switching frequency. When T1 and T4 are ON), current flows from the PV

panels to grid, while they switch OFF, the current flows through T6 and D1 (freewheeling

state). On the other hand, when the negative cycle is coming, T6 goes OFF and T5 goes

ON, whereas T3 and T2 commutate at switching frequency. In more detail when T3 and

T2 are ON, the current flows from the PV panel towards the load, thus when T3 and T2

turn off, the current flows through T5 and D2.

3.4 H5 topology

Compared to the full H-bridge, this topology presents an additional transistor, and

that is the reason for its name. The H5 topology is patented by SMA and it is based on the

same concept as the HERIC topology, i.e. to disconnect the PV panels from the grid

during current free-wheeling periods, thus having an almost constant common mode

voltage. In Fig. 4.3 it is shown the H-5 topology, that uses a full-bridge consisting of the

four switches T1, T2, T3 and T4, and the DC-bypass T5 switch. The switches T1 and T2

are operated at grid frequency, where as T3, T4 and T5 are operated at high frequency.

27

During current free-wheeling period, T5 is open, disconnecting PV panels from

the inverter full H-bridge. The free-wheeling path is closed by the transistor T1 and the

inverse diode of T3 for the positive half-cycle of the electrical grid, and by the transistor

T3 and the inverse diode of T1 for the negative half-cycle.

Fig 3.3 H5 topology

3.5 Power loss calculations

In any semiconductor device operating in switch-mode, power losses can be

classified in three main categories:

• Conduction losses

• Switching losses

• Blocking (leakage) losses, usually neglected.

28

A. IGBT conduction losses

IGBT conduction losses are related to the energy lost in the switch during the on-

state, depending on the voltage across it and the handled current. The method used by

PLECS to calculate the IGBT conduction losses consists in modeling the IGBT as a DC

voltage source, which represents the on-state zero-current collector-emitter voltage

(Vceo), connected in series with a resistance representing the collector-emitter on-state

resistance(rc):

where Tsw is the switching period, Icav is the handled average collector current and ICrms

is its rms value. In order to execute the calculation, PLECS requires the collector-emitter

on voltage vs collector current curve (varying with the temperature) from the datasheet of

the component.

B. IGBT switching losses

IGBT switching losses represent the energy losses which occur during the

switching transient, as the operating switch state is changed from on to off and vice versa.

They depend on the voltage across the switch, the current through it and the switching

time. The mathematical equation used by PLECS to evaluate the IGBT switching losses

can be expressed as:

........................(13)

21

1 2

. .( )Sw

swoffswon

s s s ssw f

t tt tt tp i v i v

t t

0

2

0

2

( ) .

1( ( ))(

1( ( ) . ( ) )(

. .

sw

sw

cCE c CEO c

ccond CE

sw

cc ccond CEO

sw

Cav CCEO Crms

V i V irT

t tp V iT

Tt t tp V i ir

T

V iI r

29

where fsw is the switching frequency, t1 represents the moment when the IGBT

starts to turn on, t2 represents the time moment when the switch starts to turn off, tSWon

represents the time needed for the switch to turn on, tSWoff represents the time needed for

the switch to turn off, is is the instantaneous current through the IGBT and vs is the

instantaneous voltage across the switch.

C. Diode losses

Diode switching and conduction losses are calculated by PLECS following the

same approach described previously for the IGBTs.

30

Chapter 4

DC DECOUPLED H6 INVERTER TOPOLOGY

4.1 UniTL H6 Configuration

Like the full-bridge inverter with unipolar SPWM, the improved inverter has one

phase leg including T1 and T2 operating at the grid frequency, and another phase leg

including T3 and T4 commutating at the switching frequency. Two additional switches T5

and T6 commutate alternately at the grid frequency and the switching frequency to

achieve the dc decoupling states. Accordingly, four operation modes that generate the

voltage states of +Udc , 0, −Udc.

Fig 4.1 DC decoupled H6 inverter topology

31

Fig 4.2 UniTL model for H6 inverter

4.2 Modes of operation

Fig 4.3 Unipolar SPWM switching scheme for H6 inverter

32

The UniTL H6 PWM was proposed to limit the common mode current in PV

grid-connected systems adopting a full bridge power converter driven by a unipolar

modulation (i.e.,three level output voltage and frequency of the output current ripple

twice the switching one).The hardware architecture is the same of, but the PWM strategy

differs radically. In fact, the DC decoupling disconnects the full-bridge from the DC

Source during the current freewheeling phases, that take place alternately in the high and

low sides of the full-bridge. In particular during high side freewheeling T5 is switched off

while during low side freewheeling T6 is switched off. The No-ideality Compensation

block allows to reduce the common-mode voltage variations in presence of a symmetrical

commutations and unity power factor.

In Fig. 4.3, x and y represent the PWM signals used to drive the legs of the full

bridge. The figure highlights that the signal driving the DC decoupling block are

dependent on the sign of the grid voltage half-wave.

With reference to the schematic of Fig.4.3 and to positive output voltage and

current (first quadrant operation) the following four configurations are sequentially

operated in a switching cycle:

1) T1, T4, T5, T6 ON : VAO=VDC, VBO=0, VAB=VDC,

Vcm=VDC/2.

2) T1, T3, T6 ON : High side current freewheeling through

T1, and the anti-parallel diode of T3, VAO= VBO=VDC/2, VAB=0,

Vcm= VDC/2.

3) T2, T3, T5, T6 ON : VAO=0, VBO=VDC, VAB=-VDC,

Vcm=VDC/2.

4) T2, T4, T5 ON : Low side current freewheeling through

T4 and the antiparallel diode of T2, VAO= VBO=VDC/2, VAB =0,

Vcm =VDC/2.

33

(a)

(b)

34

(c)

(d)

Fig 4.4 Four modes of operation (a)Mode-1 (b)Mode-2 (c)Mode-3 (d)Mode-4

Assuming unity power factor, T5 and T6 commutate at the switching frequency

with half of the input voltage Vpv, and the corresponding two freewheeling diodes of the

full bridge commutate with Vpv but with half of the current. Therefore, switching losses

will be lower than those of the bipolar PWM full bridge and can be expected to be similar

to those of the unipolar PWM full bridge.

35

Since the blocking voltage of T5 and T6 is only half of the input voltage, switches

with lower rated blocking voltage can be used and thus will exhibit lower switching

losses for the same operating conditions. Therefore the switching losses of the topology

will be lower than those of the unipolar PWM full bridge. The IGBT switching losses of

the full bridge are neglected, since they switch at the grid frequency.

When the power factor decreases, the losses of the proposed topology increase

because the switching losses of the full bridge increase. Conduction losses are expected

to be greater in the proposed topology, because when T5 and T6 are on current flows

through four switches instead of two, as in the full bridge (regardless of the PWM

technique used). However, this increment is limited by the fact that T5 and T6 have lower

saturation voltages because they have lower rated voltages. In PV inverters, it is

important to achieve a high efficiency in a wide range of power and voltage of the PV

array, since both variables exhibit great variations depending on the solar irradiation and

ambient temperature. The common-mode voltage Vcm remains constant during all

commutation states. Additionally, voltage VAB and therefore the inductor current, have

the same waveforms as those obtained in the unipolar PWM full bridge.

The full-bridge driving signals in case of unipolar modulation and the resulting Vcm,

which presents a peak-to-peak amplitude equal to the DC Link voltage VDC at switching

frequency. The full-bridge driven by unipolar modulation can be used in PV systems only

if other devices are added to this basic structure. Two additional power switches, suitably

driven, were added in order to eliminate common-mode voltage variation. As stated

above, instead of proposing a custom power converter topology able to mitigate the

variations of the output common-mode voltage, this work proposes the use of the

efficient and simple full-bridge topology driven by a unipolar modulation followed by a

device able to cancel the common mode voltage variations at the converter output.

Obviously, this additional device should be characterized by low power losses,

simplicity and low cost.

36

4.3 Design Considerations

Semiconductors

Voltage stress across the switches T1 and T3 are maximum and equal to the input

voltage. The root mean square (RMS) current flowing through them can be calculated in

(14) as:

........................(14)

Where Tg is the grid period and Iout(t) is the output current. On the other hand,

switching voltage across the switches T2, T4,and T5 operating at the switching frequency

are equal to the half of the input voltage. The RMS current flowing through these

switches can be calculated in (15), where D(t) is the duty cycle of the selected switches,

that varies from zero to one depending on the amplitude of the sinusoidal reference.

........................(15)

DC side capacitor

DC link capacitor works as an energy storage device to make sure the stable

operation of the inverter at maximum power point (MPP). The precise design of the DC

link capacitor is most important, because having an excessive amount of capacitance

causes some safety concern. If the inverter is powered down, the large amount of energy

stored in the DC link capacitor can be dangerous for the repairing persons. The minimum

capacitor value could be calculated

........................(16)

where Pout is the output power, (%Vin_min) is the percentage of ripple on the

input voltage, Vin_min is the minimum input voltage (used for worth case calculation),

and w is the grid angular frequency. Since the DC link capacitor buffers the energy at the

freewheeling stage with high frequency.

22

10

( ))1

(

g

rms s out

g

t

T

tiiT

_

2

2

20

( ) )1

] )[(

g

rms s out

g

t D

T

t tiiT

_

_ min _ min2 %

outpv

in in

pC

V V

37

Also the film capacitor is not limited by the ripple current; hence it is

advantageous to use some low inductance film capacitors. Therefore the use of a film

capacitor with lower values of equivalent series resistance (ESR), reduce high-frequency

voltage ripple.

Output filter

The Differential Mode (DM) voltage of the improved inverter varies between

VPV, 0 and -VPV. Thus, a low-pass output filter would be optimized. In order to reduce

the high-frequency voltage fluctuation between the PV module and the ground, two split

inductors with identical values are adopted to the proposed improved inverter. The entire

solution can be considered equivalent to the LC type filter. The value of the DM inductor

can be calculated by considering the instant when the output current ripples reach

maximum value. The factor representing such instant is calculated by the maximum value

of (17) as

........................(17)

where M is the modulation index, x is the angular frequency. Fig. 4.5 shows the

waveform of I factor for different modulation indexes. It can be seen that the maximum

value of I factor is 0.25. The value of the output filter inductor could be as follows:

Fig 4.5 Waveform of I factor at different modulation indexes highlighting the maximum value.

2 2sin( ) sin ( )factor M t M tI

38

........................(18)

where VPV is the input voltage, fs is the switching frequency and iL is the

maximum ripple on the output current. A higher ripple value reduces the output filter size

and also the inductor losses. However, the higher ripple at the output increases RMS

current cause’s higher conduction losses. Therefore, by considering these two issues, a

value not higher than 20% is suggested. The output filter capacitor is calculated using Eq.

(19) by selecting the cutoff frequency

Losses due to the additional capacitors:

........................(19)

Two additional capacitors whose values are much greater than the junction

capacitance of T5, are connected in parallel to T2 and T4. Depending on two constraints,

first, increasing switching losses and second, minimization of CM leakage current,

additional capacitor’s value is selected as 650pF. The additional current induced in the

capacitor connected across the switches could be as follows:

........................(20)

where Cd = additional capacitor value, VCE = blocking voltage of the switches, and

Ton = turn-on time. By fixing the value of the parameters in (20), the additional current

flowing through the switches during the turn on transient time is calculated as Icd = 2.8A.

Therefore, the additional switching losses during turn-on can be calculated by the Eq. (21) as:

..................(21)

where Fs is the switching frequency. From (21), the switching loss due to the

additional capacitor is calculated 0.832 W.

factorPV

LS

LV I

f i

221

1

4o

c

Cf L

0.5CE PV

ON

cd d dt

V VC CIT

2

sPVcd dV FW C

39

Therefore, the total switching loss for the two additional capacitors is 1.6 W.

Since the high frequency switches are replaced with MOSFETs which reduces the

switching losses considerably; hence the additional losses due to the added capacitors

have very low impact on the overall efficiency.

Efficiency

In the PV inverter, it is important to achieve higher efficiency over a wide load

range and this performance can be evaluated by the European efficiency which is defined

as follows:

.......(22)

5% 10% 20% 30% 50% 100%0.03 0.06 0.13 0.10 0.48 0.2EU

40

Chapter 5

MATLAB MODELLING AND SIMULATION RESULTS

In order to verify the theoretical analysis in previous sections, a 1-kWp PV array

is simulated, having the frame of the panels connected to ground with the parasitic

capacitance of 75 nF. A 1-kW inverter is built. The detailed components and parameters

used are as follows: output power, Pout = 1 kW; input voltage, Vdc= 350 V; input

capacitor, Cdc :2200 μF; grid voltage, Vg = 325.5 , Vac ; grid frequency, fg= 50 Hz; switch

frequency, fs = 5 kHz; filter inductor, Lf = 3mH; parasitic capacitor, CPV = 75 nF; power

switches, S1 –S6; junction capacitors of the switches, C1 –C6 :28pF. Following figures

show the simulated and experimental results by employing the unipolar SPWM when the

junction capacitances of six switches are equal.

Since the value principle of the junction capacitors described in is not reached, the

relatively large oscillations of the voltages VAN ,VBN , and Vcm are induced. The

simulated waveforms indicate that VAN = VBN = 115 V at the end point of the transient

process from Mode 1 to Mode 2, according to the theoretical analysis. Subsequently VAN

,VBN , and Vcm begin to resonate.

41

42

43

44

45

H6 transformerless, single-phase PV inverter with six switches and two diodes.

The proposed topology generates no common-mode voltage, exhibits a high efficiency,

and can operate with any power factor. It has been compared to other topologies and

validated by means of a 5-kW prototype with satisfactory results. The maximum

efficiency achieved by the topology is 97.4%, and the European efficiency varies

between 97.16% and 95.2% in the whole range of the input voltage (350–800 V). As a

conclusion, this topology can be an advantageous power-conversion stage for

transformerless, grid-connected PV systems.

Fig 5.1 comparison of efficiency of H6 inverter with Full bridge Bipolar inverter Scheme

46

Chapter 6

CONCLUSION AND FUTURE SCOPE

The evolution of the European efficiency as a function of the input voltage for

both the H6 topology and the bipolar PWM full bridge. The maximum European

efficiency of the proposed topology appears at 350 V and achieves 97.16%, which is 2%

greater than the bipolar PWM full bridge. In addition, the European efficiency of the

proposed topology exhibits a small decrease with the input voltage, while the efficiency

of the other topology decreases very quickly. Differences of up to11% are obtained for

800 V. The small decrease in the efficiency of the proposed topology is due to the fact

that the increase of the switching losses with the input voltages is strongly compensated

by the reduction in the conduction losses.

Several single phase transformerless grid connected inverter topologies are

modeled, analyzed and simulated in terms of output voltage, output current, common

mode voltage and leakage current. Besides unipolar modulation, all the topologies such

as bipolar modulation, H5,H6, HERIC and oH5 are suitable for the use of transformer

less PV system because the leakage current complies with the requirement stated in the

VDE-O 126-1-1 standard while maintaining high efficiency as in unipolar modulation.H5

and HERIC topologies disconnect the PV and the grid during the free-wheeling period

using the extra switches. H5 is using DC decoupling while HERIC is using AC

decoupling methods. On the other hands, instead of disconnecting the PV and the grid

completely, the voltage of the free-wheeling paths of both H6 and oH5 is clamped to the

half of the input voltage. This gives better performance in common-mode characteristic.

Compared to bipolar modulation, H5 and HERIC topologies, both H6 and oH5 are

having smaller leakage current due to improved common mode voltage.

47

REFERENCES

[1] shenet al.: “novel transformer less grid-connected power converter with negative

grounding”, IEEE transactions on power electronics, vol. 27, no. 4, April 2012

[2] “Transformerless Grid-Connected Converter for PV Plants with Constant

Common Mode Voltage and Arbitrary Power Factor”D. Barater,G. Buticchi

IECON 2012

[3] “High Reliability and Efficiency Single-Phase Transformerless Inverter for Grid-

Connected Photovoltaic Systems” Bin Gu, Student Member, IEEE, Jason

Dominic, Jih-Sheng Lai, Fellow, IEEE,IEEE transactions on power

electronics, vol. 28, no. 5, may 2013

[4] “Transformerless Inverter for Single-Phase Photovoltaic Systems”, Roberto

González, Jesús López IEEE transactions on power electronics, vol. 22, no. 2,

march 2007

[5] “An improved transformerless grid connected photovoltaic inverter with reduced

leakage current, Monirul Islam” Elsevier Ltd 2014

[6] “Improved Transformerless Inverter for PV Grid Connected Power System by

using ISPWM Technique” R.Antony Raja Sekar International Journal of

Engineering Trends and Technology (IJETT) - Volume4Issue5- May 2013.

[7] “Active Common-Mode Filter for Ground Leakage Current Reduction in Grid-

Connected PV Converters Operating with Arbitrary Power Factor” Davide

Barater, IEEE Transactions 2012.

[8] “Power Electronics: Converters, Applications, and Design”, 3rd Edition Ned

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H. RashidISBN-13: 978-0133125900

[10] High Efficiency Single-Phase Transformer-less Inverter for Photovoltaic

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