Train Alarm System by Microchip Design Project

7/30/2019 Train Alarm System by Microchip Design Project

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INTRODUCTION:

Sometimes we people comes to know

accident of trains from news papers.

Whatever may be the cause there is great

loss of life and wealth. Lot of damage done torailway track and prevents other trains to

move on it. Trains are accident in remote

areas so it prevents people from quick

treatment, this leads to more loss of life.

Accident occurs due to derailing of trains due

to cracks develops in tracks & subversive

activities by terrorist. Accidents happen due

to collision between two trains. These

collisions are head on or from backside.

Accident due to collision is serious one which

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causes lot of loss in lives and wealth. This is

mainly due to human error.

Bad management & human error cause

accident between two trains. A train is in one

track & by mistake another train is released in

that track. This leads to head on or back side

collision.

Here we try to develop a system that helps in

alarming both trains and stopping one train

before being collided. It is a microcontroller

based system and wireless operated system.

Wireless because it sends signals to trains

about track information and alarm. Here we

use two eight bit microcontroller of 18 pin

(PIC 16F628) from microchip. The project also

use IR light beam for the purpose.

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BLOCK DIAGRAM:

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IR transmitter:

This section is usually fitted with a constant

voltage supply +5v which are constantlygiving the signal to the IR LED. So IRtransmitting LED will emit lights. The infraredtransmitter is to be faced at the matchinginfrared sensor mounted on the other side ofthe train track. Infrared signal follows all thetheories of light and do not make disturbance

in passage as it is not visible.

IR receiver:

It is the circuit, which contains IR sensors

which receives IR signal radiating out of the IR

LED. It converts it into electric signal. The

signal received and fed to microcontroller at

within specified voltage level.

Comparator:

It compares sensor output with a referencevoltage. So that it provides perfect digital

output. Two sensors have two OPAMP output.

Serial encoder:It encodes the parallel input signal from themicrocontroller to serial data.

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Radio transmitter:It is a frequency modulated ASK transmitter.

The digital data generated is super imposedupon the carrier frequency by ASK techniqueand is transmitted to air at 433 MHz.

Radio Receiver:It is the circuit, ASK receiver, which receives

the transmitted signal and separates the

encoded digital data from the carrier wave.

Serial decoder:It converts the serial data into parallel four

bit binary data.

Microcontroller section:This section takes the input of sensors andgenerates logic accordingly. This binary datais send to serial encoder.

Driver stage:This section helps in improving the power

level of serial decoder to sufficient level todrive the buzzer.

THEORY:

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Here the system is build around the

microcontroller. IR system is introduced forthe system. There are two barriers from both

sides. Here if a train comes from one side

that will cut or interrupts the IR barrier and

that is why a signal from the IR sensor comes

to microcontroller. It is then recorded inmicrocontroller memory and now second IR

barrier is also broken then second signal of

+5 volt is send to microcontroller. Now

microcontroller makes track no 1 busy by

sending a signal to parallel to serial decoder.

Which is transmitted to receiver section

through a ASK transmitter. This in turn glow a

single LED on the track map. If that train

passes the third IR barrier then it is alright. If

that is not happen a train from other

direction comes then other microcontroller

detects it and issue a signal at output pin to

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sends signal to ASK transmitter in similar

process as first microcontroller does. It is

transmitted at 433MHz frequency. Anotherred LED is also glow on the track. Showing

that two trains are on same track going for

head on collision.

IR beam moves in straight line and follows all

the rules of visible light source. If any opaque

comes on the way then dark area is created

behind it. IR beam used is of invisible in

nature. So sensor scheme is not affected by

other light source. As long as IR light falling

on the sensor, its output is low. IR sensor

output is made high as light is interrupted

due to train. This is transmitted to

microcontroller indicating a train is passing

through IR barrier. Two barrier schemes is

arranged to know the train is coming or

going.

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OPERATION PROCEDURE:

Now take track 1 into consideration, if a

train is coming from right side it interrupts

the first sensor then next sensor this

indicates that train is coming to protected

zone. Now microcontroller makes the track 1

is busy in its memory. This train is goingtowards left so sensors interrupted in

outgoing fashion, so now microcontroller

makes it free zone.

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In busy condition another train comes into

protected zone then microcontroller detectsit create a visible alarm signal and send to

both train through a wireless digital

transmission. This makes the train driver alert

about two trains on the same track. Train

driver make the train off.

CIRCUIT DESCRIPTION:

There are four sections: transmitter sectionReceiver sectionIR transmitter &

receiverPower supply

section

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TRANSMITTER SECTION:

Here used TX433 as ASK transmitter & HT12E

as parallel to serial encoder. Single bit data is

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fed to pin 10 of encoder. Pin 1 to 8 are

address bit & 10 to 13 are data input. It

converts 4 bit data & 8 bit address in to serialdata so that it can be transmitted serially

through ASK transmitter. Tx is built using SMD

components and very small in size. Pin 4 of

the TX is antenna and is 17 cm long wire and

that is telescopic antenna. Data fed to tx at

pin 2.

ASK transmitter & serial encoder:

Here TX433 ASK transmitter circuit is used.

It is a integrated chip. It operates in +5

volt. There four terminals.

Pin 1 - Ground

Pin2 - Data input from serial encoder

Pin3 - Vcc

Pin4 - Antenna

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12 bit serial encoder HT12 E is used for

converting the binary data input to serialdata. Inputs are provided at pin 10 to 13

from microcontroller. There is a oscillator

resistor 1 M connected in between 15 & 16.

Pin 1 to 8 is for address pin.

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RECEIVER & SERIAL

DECODER:

ASK receiver RX433 operates at 433 MHz.There are 8 pins in this chip.

Pin 1, 6 & 7 --- GNDPin 2 --- data outputPin 4, 5 --- + VccPin 8 --- Antenna

The data is fed into HT12D, the serialdecoder. It converts the serial data into fourbit binary output.

Pin 10 to 13 --- four bit binary outputPin 13 --- connected with audioindicator using driver amplifier.Pin 14 --- data inputPin 1 to 8 --- address pinPin 15 & 16 --- Oscillator resistorsPin 17 --- data receive

acknowledgement

A NAND gate 4093 is used for detection of

two head on situation and makes alarm. Its

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inputs are 1 & 2 with output is 3. Output is

provided with a PNP transistor driver to drive

the buzzer.

IR BARRIER USING IR LED & TRANSISTOR:

Here IR led is connected directly to power

supply +5v using a proper value of resistor.

IR led emits light straight. It follows all the

theories of light like reflection & refraction. It

can not pass the opaque object as light

passes through it. As IR light falls on the IR

transistor, it starts to switch ON. Here we are

making a optical coupling between a LED & a

transistor. This is called IR barrier. According

to intensity of light falls on base of transistor,

its output varies. When a person enters into

barrier it totally blocks the light flow therefore

making a large change in output signal. This

signal variation may be high or low according

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to transistor type NPN/PNP. This signal is to be

fed to logic device for further action. Before

that the signal must be made 1/0. So anOPAMP is used as a comparator to make it

possible.

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(IR BARRIER 1)

(IR BARRIER 2)

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The circuit uses a IR transistor as the basic

element for IR sensing. The variation in light

reflection light will result into a correspondingvariation in voltage at collector/emitter of the

transistor which is provided to pin 3 & pin5 of

each MCP602 opamp. A 10k resistor is used in

collector. Preset 100k is used as a

reference voltage generator. There are two

OPAMPS inside the IC so two comparators

operates simultaneously in it. Two sensor

inputs are provided to pin 3 & 5. Reference

voltage is given to pin 2 & 6. Power supply

given +5 v to pin 8 & ground to pin 4.

MICROCONTROLLER

SECTION:

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Microcontroller PIC16F628.

CIRCUIT DESCRIPTION:

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description in theory section the

microcontroller is programmed.

POWER SUPPLY:

The microcontroller needed to be operating in

DC power supply. The microcontroller needs

+5V supply. The transformer is a center tap

12-0-12V 500mA. It is then rectified using fullwave rectifier. A 1000F capacitor is used for

filtration purpose. The three terminal voltage

regulators 7805 provides regulated DC

outputs for the operation of the circuit. A

good grounding is necessary for the proper

functioning of the circuit.

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SOME IMPORTANT

DISCUSSIONS:

ASK ( AMPLITUDE SHIFT KEYING ):-

MODULATION:

Modulation is the process of modifying the

characteristic of one signal in accordance withsome characteristic of another signal. In most

cases, the information signal, be it voice,

video, binary data, or some other information,

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is normally used to modify a higher-frequency

signal known as the carrier. The information

signal is usually called the modulatingsignal, and the higher-frequency signal which

is being modulated is called the carrier or

modulated wave.The carrier is usually a sine

wave, while the information signal can be of

any shape, permitting both analog and digital

signals to be transmitted. In most cases, the

carrier frequency is considerably higher than

the highest information frequency to be

transmitted.

AMPLITUDE MODULATION WITH SINE WAVES:

In AM, the information signal varies the

amplitude of the carrier sine wave. In other

words, instantaneous value of the carrier

amplitude changes in accordance with the

amplitude and frequency variations of the

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modulating signal. Figure 2-1 shows a single-

frequency sine wave modulating a higher-

frequency carrier signal. Note that the carrierfrequency remains constant during the

modulation process but that its amplitude

varies in accordance with the modulating

signal. An increase in the modulating signal

amplitude causes the amplitude of the carrier

to increase. Both the positive and negative

peaks of the carrier wave vary with the

modulating signal. An increase or decrease- in

the amplitude of the modulating signal causes

a corresponding increase or decrease in both

the positive and . negative peaks of the

carrier amplitude.

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If you interconnect the positive and negative

peaks of the carrier waveform with animaginary line (shown dashed in Fig. 2-1),

then you re-create the exact shape of the

modulating information signal. This imaginary

line on the carrier waveform is known as the

envelope, and it is the same as themodulating signal. Because complex

waveforms like that shown in Fig. 2-1 are

difficult to draw, they are usually simplified by

representing the high frequency carrier waves

simply many equally spaced vertical lines

whose amplitudes vary in accordance with a

modulating signal. Figure 2-2 shows a sine

wave tone modulating a higher-frequency

carrier. We will use this method of

representation throughout this book.



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amplitude and frequency variations of themodulating signal. Figure 2-1 shows a single-


frequency carrier signal. Note that the carrier

frequency remains constant during the











carrier amplitude.

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The signals illustrated in Figs. 2-1 and 2-2

show the variation of the carrier signal withrespect to time. Such signals are said to be in

the time domain.Time-domain signals are the

actual variation of voltage over time. They are

what you would see displayed on the screen

of an oscilloscope. In this section we show the

AM types of modulation. Later you will see

that modulated signals can also be expressed

in the frequency domain

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(Amplitude Modulation with Digital Signals)

Digital, usually binary, signals may also be

used to amplitude modulate a carrier. Figure

2-4 shows a binary signal modulating a sine

wave carrier. In Fig. 2-4(a), the binary 1 level

produces maximum carrier amplitude and the

binary 0 level produces a lower-value carrier.

Amplitude modulation in which the carrier is

switched between two different carrier levels

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is known as amplitude shift keying (ASK). A

special fonn of ASK is one in which the carrier

is simply switched on or off. See Fig. 2-4(b).The binary 1 level turns the carrier on, and

the binary 0 level turns the carrier off. This is

called on-off keying (OOK). Some digital

signals have more than two levels. As long as

a signal varies in discrete steps, it is

considered digital. Figure 2-5 shows a four-

level digital signal and the resulting AM

signal. To improve the speed of digital

transmission in computer modems, 4-, 8-, 16-

and 32-level digital signals are commonly

used. Amplitude modulation is combined with

simultaneous phase modulation of a carrier to

produce quadrature amplitude modulation

(QAM).

BRIEF TALK ON MICROCONTROLLER:

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The past three decades have seen the

introduction of a technology that has radically

changed the way in which we analyze thecontrol the world around us. Born of parallel

developments in computer architecture and

integrated circuit fabrication, the

microprocessor or computer on a chip first

became a commercial reality in 1971 with

introduction of 4-bit 4004 by Intel corp.A byproduct of microprocessor development

was the microcontroller. The same

fabrication techniques and programming

concept that make possible the general

purpose microprocessor also yielded the

microcontroller.

Microcontroller are not as well as known to

the general public, or to many in the

technical community, as are he more

glamorous microprocessor . The public is

however very aware that something isresponsible for all of the smart VCRs, clock

radios, washers and dryers, video games,

telephones, microwaves ,TVs, automobiles,

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toys vending machines, copiers, elevators,

irons and myriads of other articles that are

intelligent and programmable. Companiesare also aware that being competitive in this

age of microchip requires their products, or

the machinery they use to make those

products, to have some smart.

Figure below shows the block diagram of a

typical microcontroller, which is truecomputer on a chip. The design incorporates

all of the features found in a microprocessor

CPU; ALU, PC, SP, register. It also has added

the other features needed to make a

complete computer: ROM, RAM, parallel I/O,

serial I/O, counters, and a clock circuit.

Like the microprocessor, a microcontroller is a

general purpose device, but one that is meant

to read data, performs limited calculations on

that data, and control its environment based

on those calculation. The prime use of amicrocontroller is to control the operation of a

machine using a fixed program that is stored

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in ROM and that does not change over the

lifetime of the system.

The design approach of the microcontrollermirrors that of the microprocessor: make a

single design that can be used in as many

applications as possible in order to sell,

hopefully, as many as possible. The

microprocessor accomplishes the goal by

having a very flexible and extensiverepertoire of multisystem instructions. These

instruction work in a hardware configuration

that enables large amounts of memory and

I/O to be connected address and data bus

pins on integrated circuit package. Much of

the activity in the microprocessor has to do

with moving code and data to and from

external memory to the CPU. The architecture

feature s working registers that can be

programmed to take part in the memory

access process, and instruction set is aimedat expediting this activity in order to improve

throughput. The pins connected to the

microprocessor to external memory are

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unique, each having a single function. Data

is handled in byte, or larger , sizes.

The microcontroller design uses a much morelimited set of single and double byte

instructions that are used to move code and

data from internal memory to ALU. Many

instructions are coupled with pins on

integrated circuit package, the pins are

programmable that is capable of havingseveral different functions depending on the

wishes of the programmer. The

microcontroller is concerned with getting

data from and to its own pins ; the

architecture and instruction set are

optimized to handle data in bit and byte size.







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frequency carrier signal. Note that the carrier

frequency remains constant during themodulation process but that its amplitude










carrier amplitude.

The contrast between a microcontroller and a

microprocessor is best exemplified by the

fact that most microprocessor s have manyoperational codes(opcodes) for moving data

from external memory to the CPU;

microcontrollers may have one or two.

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Microprocessor may have one or two types of

bit handling instructions; microcontrollers

have many.

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BLOCK DIAGRAM OF MICROCONTROLLER

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COMPONENT DESCRIPTION:

PIC16F84A / F628 ( 8-BIT FLASH

MICROCONTROLLER):

Microcontroller features:

Only 35 instructions to learn

High performance RISC CPU

All single cycle instruction except forprogram branches which are two cycle

Operating speed DC- 20MHz clock inputDC 200 ns instruction

cycle 1024 words of program memory

68 bytes of data EEPROM

64 bytes of data EEPROM

14-bit wide instruction words

8-bit wide data bytes

15 special function hardware registers

eight level deep hardware stack

direct , indirect and relative addressingmodes

four interrupt sources

- external RB0/INT pin

- TMR0 timer overflow

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- PortB ,7:4> interrupt on change

- Data EEPROM write complete

Peripheral features:

13 I/O pins with individual direction control

high current sink/source for direct LED drive

- 25mA sink max per pin

- 25mA source max per pin

TMR0 : 8-bit timer /counter with 8-bitprogrammable prescaler

Special microcontroller features:

1000 erase/write cycles enhanced flashprogram memory

1,000,000 typical typical erase/write cyclesEEPROM data memory

EEPROM DATA RETENTION > 40 YEARS

INCIRCUIT SERIAL PROGRAMMING - VIA

TWO PINS POWER ON RESET (POR) POWER UP TIMER

(PWRT)OSILLATOR START-UP TIMER (OST)

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WATCHDOG TIMER (wtd) WITH ITS OWN

ON-CHIP RC OSCILLATOR FOR RELIABLE

OPERATION CODE PROTECTION

POWER SAVING SLEEP MODE

SELECTABLE OSCILLATOR OPTIONS

CMOS ENHANCED FLASH/EEPROM TECHNOLOGY:

LOW POWER, HIGH-SPEED TECHNOLOGY

FULLY STATIC DESIGN

WIDE OPERATING VOLTAGE RANGE

- COMMERCIAL : 2.0 V TO 5.5 V

-

INDUSTRIAL : 2.0 V TO 5.5 V LOW POWER CONSUMPTION

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ARCHITECTURAL OVERVIEW:

The high performance of the PIC16F84A can

be attributed to a number of architectural

features commonly found in RISC

microprocessors. To being with, thePIC16F84A uses a Harvard architecture, in

which, program and data are accessed from

separate memories. This improves bandwidth

over traditional von Neumann architecture

where program and data are fetched from the

same memory. Separating program and data

memory further allows instructions to be

sized differently than the 8-bit wide data

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word. Instruction opcodes are 14-bits wide

making it possible to have all single word

instructions. A 14-bit wide program memoryaccess but fetches a single cycle. A two-stage

pipeline overlaps fetch and execution of

instructions (see Example 3-1). Consequently,

all instructions execute in a single cycle (200

ns @ 20 MHz) except for program branches.

The PIC16F84A addresses 1K x 14 programmemory. All program memory is internal.

The PIC16F84A can directly indirectly address

its register files or data memory. All special

function registers including the program

counter are mapped in the data memory. An

orthogonal (symmetrical) instruction set that

makes it possible to carry out any operation

on any register using any addressing mode.

This symmetrical nature and lack of special

optimal situations make programming with

the PIC16F84A simple yet efficient. Inaddition, the learning curve is reduced

significantly.

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PIC16F84A devices contain an 8-bit ALU and

working register. The ALU is a general

purpose arithmetic unit. It performsarithmetic and Boolean functions between

data in the working register and any register

file.

The ALU is 8-bit wide and capable of addition,

subtraction, shift and logical operations.

Unless otherwise mentioned, arithmeticoperations are twos complement in nature. In

two operand instruction, typically one

operand is the working register (W register),

and the other operand is a file register or an

immediate constant. In single operand

instructions, the operand is either the W

register or a file register.

The W register is an 8-bt working register

used for ALU operation. It is not an

addressable register. Depending on the

instruction executed, the ALU may affect thevalues of the Carry , Digit Carry (DC), and

Zero (Z) bits in the STATUS register. The C

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and DC bits operate as a borrow and digit

borrow out bit, respectively, in subtraction.

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MEMORY ORGANIZATION:

There are two memory blocks in the

PIC16F84A. These are the program memory

and the data memory. Each block has its own

bus, so that access to each block can occur

during the same oscillator cycle. The data

memory can further be broken down into the

general purpose RAM and the Special

Function Registers (SFRs). The operation of

the SFRs that control the core are described

here. The SFRs used to control the peripheral

modules are described in the sectiondiscussing each individual peripheral module.

The data memory area also contains the data

EEPROM memory. This memory is not directly

mapped into the data memory, but is

indirectly mapped. That is an indirect address

pointer specifies the address of the data

EEPROM memory to read/write. The 64 bytes

of data EEPROM memory have the address

range 00 - 3Fh.

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Program Memory Organization:

The PIC16F84A has a 13-bit program counter

capable of addressing an 8K x 14-program

memory space. For the PIC16F84A only the

first 1K x 14 (0000-03FFh) are physically

implemented. Accessing a location above the

physically implemented address will cause a

wrap-around. For example, locations 20h

420h, C20h, 1020h, 1420h, 1820h, and 1C20h

will be the same instruction. The reset vector

is at 0000h and the interrupt vector is at

0004h

Data Memory Organization:

The data memory is partitioned into twoareas. The first is the Special Function

Registers (SFR) area, while the second is the

General Purpose Registers (GPR) area. The

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SFRs control the operation of the device.

Portions of data memory are banked. This is

for both the SFR area and the GPR area. TheGPR area is banked to allow greater than 96

bytes of general purpose RAM. The banked

areas of the SFR are for the registers that

control the peripheral functions. Banking

requires the use of control bits for bank

selection. These control bits are located in theSTATUS Register.

Instructions MOVWF and MOVF and move

values from the W register to any location in

the register file (F), and vice-versa. The

entire data memory can be accessed either

directly or indirectly through the File Select

Register (FSR). Indirect addressing used the

present value of the RP1:RP0 bits for access

into the banked areas of data memory.


amplitude of the carrier sine wave. In otherwords, instantaneous value of the carrier


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frequency sine wave modulating a higher-frequency carrier signal. Note that the carrier

frequency remains constant during the











carrier amplitude.

Data memory is partitioned into two banks

which contain the general purpose registers

and the special function registers. Bank 0 is

selected by clearing the RP0 bit

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(STATUS). Setting the RP0 bit select Bank

1. Each Bank extends up to 7Fh (128 bytes).

The lower locations of each Bank are reservedfor the Special Function Registers. Above the

Special Function Registers are General

Purpose Registers implemented as static

RAM.

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GENERAL PURPOSE REGISTER FILE:

The register file is accessed either directly or

indirectly through the FSR. All devices have

some amount of GPR area. The GPR is 8-bits

wide. When the GPR area is greater then 96,

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banking must be performed to access the

additional memory space

PORTA and TRISA Registers:

PORTA is a 5-bit wide latch. RA4 is a Schmitt

trigger input and an open collector output. All

other RA port pins have TTL input levels andfull CMOS output drivers. All pins have data

direction bits (TRIS registers) which can

configure these pins as output or input. A

1on any bit in the TRISA registers puts the

corresponding output driver in a high-

impedance mode. A 0 on any bit in theTRISA register puts the contents of the output

latch on the selected pin(s). Reading the

PORTA register reads the status of the pins

whereas writing to it will write to the port

latch. All write operations are read-modify

write operations. So a write to a port implied

that the port pins are firs read, then this value

is modified and written to the port data latch.

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PORTB and TRISB Registers:

PORTB is an 8-bit wide bi-directional port. The

corresponding data direction register is

TRISB. A 1 on any bit in the TRISB register

puts the corresponding output driver in a high

impedance mode. A 0 on any bit in the

TRISB register puts the contents of the output

latch on the selected pin(s).

Each of the PORTB pins have a weak internalpull-up. A single control bit can turn on all the

pull-ups. This is done by clearing the RBPU

(OPTION) bit. The weak pull-up is

automatically turned off when the port pin is

configured as an output the pull-ups are

disabled on POR. Four of PORTBs pins, RB7,

RB4, have an interrupt on change feature.

Only pins configured as inputs can cause this

interrupt to occur (i.e. any RB7:RB4 pin con-

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figured as an output is excluded from the

interrupt on change comparison). The pins

value in input mode are compared with theold value latched on the last read of PORTB.

The mismatch outputs of the pins are ORed

together to generate the RBIF interrupt

(INTCON).

DATA EEPROM MEMORY:

The EEPROM data memory is readable andwritable during normal operation (full VDDrange). This memory is not directly mapped inthe register file space. Instead it is indirectly

addressed through the Special FunctionRegisters. There are four SFRs used to readand write this memory. These registers are:

EECON1

EECON2 (Not a physically implementedregister)

EEDATA

EEADREEDATA holds the 8-bit data for read/write,and EEADR holds the address of the EEPROMlocation being accessed. PIC16F84A devices

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have 64 bytes of data EEPROM with anaddress range from oh to 3Fh.The EEPROM data memory allows byte read

and write. A byte write automatically erasesthe location and data memory is rated forhigh erase/write cycles. The write time iscontrolled by an on-chip timer. The write timewill vary with voltage and temperature as wellas from chip to chip. Please refer to ACspecifications for exact limits.

When the device is code protected, the CPUmay continue to read and write the dataEEPROM memory. The device programmercan no longer access this memory.

Reading the Eeprom Data Memory:

To read a data memory location, the usermust write the address to the EEADR registerand then set control bit RD (EECON1).The data is available, in the very next cycle,in the EEDATA register; therefore it can beread in the next instruction, EEDATA will holdthis value until another read or until it is

written to by the user (during a writeoperation).

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DATA EEPROM READBCF STATUS, RP0 ; Bank 0MOVLWCONFIG_ADDR ;MOVWFEEADR ; Address to read

BSF STATUS, RP0 ; Bank 1BSF EECON1, RD ; EE Read

BCF STATUS, RP0 ; Bank 0MOVF EEDATA, W ; W = EEDATA

Writing to the EEPROM Data Memory:To write an EEPROM data location, the usermust first write the address to the EEADRregister and the data to the EEDATA register.Then the user must follow a specific sequenceto initiate the write for each byte.BSF STATUS, RPO ; Bank 1BCF INTCON, GIE ; Disable INTs.BSF EECON1, WREN; Enable writeMOVLW55H ;MOVWFEECON2 ; Write 55hMOVLWAAh ;

MOVWFEECON2 ; Write AAhBSF EECON 1,WR ; Set WR bit beginwriteBSF INTCON, GIE ; Enable INTs.

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The write will not initiate if the abovesequence is not exactly followed (write 55h toEECON2, write AAh to EECON2, then set WR

bit) for each byte. We strongly recommendthat interrupts be disabled during this codesegment.Additionally, the WREN bit in EECON 1must beset to enable write. This mechanism preventsaccidental writes to data EEPROM due toerrant (unexpected) code execution (i.e., lost

programs). The user should keep the WRENbit clear at all times, except when updatingEEPROM. The WREN bit is not cleared byhardware.After a write sequence has been initiated,clearing the WREN bit will not affect thiswrite cycle. The WR bit will be inhibited frombeing set unless the WREN bit is set.At the completion of the write cycle, the WRbit is cleared in hardware and cycle, the WRbit is cleared in hardware and the EE WriteComplete Interrupt Flag bit (EEIF) is set. Theuser can either enable this interrupt or pollthis bit. EEIF must be cleared by software.

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Depending on the application goodprogramming practice may dictate that thevalue written to the Data EEPROM should beverified to the desired value to be written.

This should be used in applications where anEEPROM bit will be stressed near thespecification limit. The Total Endurance diskwill help determine your comfort level.

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Generally the EEPROM write failure will be abit which was written as a o, but reads backas a 1 (due to leakage off the bit).

WRITE VERIFY:

BCF STATUS, RPO ; Bank o: ; Any code can go here: ;MOVF EEDATA, W ; Must be in Bank oBSF STATUS, RP0 ; Bank1 READBSF EECON1, RD ; YES, Read the

; value writtenBCF STATUS, RP0 ; Bank o;; Is the value written (in w reg) and;read (in EEDATA) the same

SUBWF EEDATA, W ;BTFSS STATUS, Z ; Is difference 0 ?GOTO WRITE_ERR ; NO, Write error : ; YES, Good write: ; Continue program

Configuration Bits:

The configuration bits can be programmed

(read as 0) or left unprogrammed (read as

1) to select various device configurations.

These bits are mapped in program memory

location 2007h.

Note that address 2007h is beyond the user

program memory space. In fact, it belongs to

the special test/configuration memory space

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(2000h 3FFh), which can be accessed only

during programming.

OSCILLATOR CONFIGURATION:

Oscillator types:

The PIC16F84A can be operated in fourdifferent oscillator modes. The user can

program two configuration bits (FOSC1 and

FOSCO) to select one of these four modes:

LP Low Power Crystal

XT Crystal/Resonator

HS High Speed Crystal/Resonator

RC Resistor/Capacitor

CRYSTAL OSCILLATOR / CERMIC RESONATORS:

In XT, LP or HS modes a crystal or ceramic

resonator is connected to the OSC1/CLKINand OSC2/CLKOUT pins to establish oscillation

(Figure 8-2). The PIC16F84A oscillator design

requires the use of a parallel cut crystal. Use

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of a series cut crystal may give a frequency

out of the crystal manufactures specifications.

When in XT, LP or HS modes, the device canhave an external clock source to drive the

OSC1/CLKIN PIN.

Watchdog Timer (WDT):

The watchdog timer is realized as a freerunning on-chip RC oscillator which does not

require any external components. This RC

oscillator is separate from the RC oscillator of

the OSC1/CLKIN pin. That means that the

WDT will run even if the clock on the

OSC1/CLKIN and OSC2/CLKOUT pins of the

device has been stopped, for example, by

execution of a SLEEP instruction. During

normal operation a WDT time-out generates

device RESET. If the device is in SLEEP mode,

a WDT time-out causes the device to wake-upand continue with normal operation. The WDT

can be permanently disabled by programming

configuration fuse WDTE as a 0.

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Code Protection:

The code in the program memory and data

EEPROM memory can be protected by

programming the code protect bit.

INSTRUCTION SET:

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A RISC processor has only 35 instructions.

.

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7805 ( +5V VOLTAGE REGULATOR) :-

3-Terminal 1A Positive Voltage Regulator

Features:

Output Current up to 1A

Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18,

24V

Thermal Overload Protection

Short Circuit Protection

Output Transistor Safe Operating Area

Protection

Description:

The MC78XX/LM78XX/MC78XXA series of

three terminal positive regulators are

available in the TO-220/D-PAK package andwith several fixed output voltages, making

them useful in a wide range of applications.

Each type employs internal current limiting,

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thermal shut down and safe operating area

protection, making it essentially

indestructible. If adequate heat sinking isprovided, they can deliver over 1A output

current. Although designed primarily as fixed

voltage regulators, these devices can be used

with external components to obtain

adjustable voltages and currents.

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TESTING PROCEDURE:

After completion of the assembling of the

electronics components on PCB. All the

circuits are arranged on a board. Power is

made on . Take a multimeter and check

output voltage of the power supply for +5v

& check in all parts of the project. Now IR

beam scheme is to check. When light falls

output of the sensor is 0.0v and when train

comes in front of the sensor output voltage

is +5v. Check output of the sensor 5.0v

when interrupted.

Transmitter is tuned to receiver. Transmitter

is sending signal at 433MHz frequency. Now

turn the trimmer at same time press the TE

switch so output of the receiver

acknowledgement signal high. Now it is

tuned.

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CONCLUSION:

The project is build around the

microcontroller; ASK communication & IR

barrier system. Project detects train

automatically using IR beam scheme. Alert

signal is provided to trains through ASK

transmission. Same ASK scheme can be used

in large number of tracks by varying the

address. Microcontroller is intelligent brain of

the project.

Here ASK transmitter is of low range therefore

it is applicable to small region. But it can be

improved to large region by using power

amplifier.

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Train Alarm System by Microchip Design Project

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