Analyzer SuiteTrace Analyzer

Logic Analyzer

Multicore System Analyzer (MCSA)

Analyzer Suite A collection of system analysis and visualization tools leveraging multiple

technologies to provide powerful debug and optimization solutions for multi-core application

Bringing multiple technologies together to maximize visibility into different levels of the system Trace Analyzer: analysis based on CPU Trace (hardware instrumentation)

Logic Analyzer: analysis based on System Trace (hardware instrumentation)

Multi Core System Analyzer: analysis based on software instrumentation

Each tool designed to support specific use cases leveraging particular technologies but synchronized with each other for a more complete system solution Data correlation across cores and tools to a common global timeline

Synchronized scrolling of views across tools

Availability: Trace Analyzer: available in CCSv5

Logic Analyzer: available in CCSv5

Multicore System Analyzer:

1.0 Beta available as CCSv5.0 patch

1.0 GA will be mid-May as CCSv5.0 patch

1.0 will be included in CCSv5.1

Analyzer Suite (analyzers working together - correlated and synchronized): 3Q11

2

Trace Analyzer Analyze and visualize CPU PC and data trace

Data captured using CTool Trace hardware and post processed in Trace Analyzer

Optimize system performance using PC trace data

Non-intrusive performance analysis

Inclusive and exclusive function CPU cycle and stall profiling

Cache profiling

3

Debug difficult real-time problems

Function call graph to determine how you got there

Log view for detail PC trace

Source code correlation

Advance data navigation features

o Advance find, search and filtering

o Zooming, measurement markers

o Synchronous view scrolling

Ability to export decoded data from Trace Analyzer to csv format

Function profiler Function call graph

Source code tracking

Source

code

correlation

Advance

data

navigation

features

Logic Analyzer Monitor system transactions and traffic using System Trace

4

Data Captured using System Trace hardware

and post process in Logic Analyzer

Graphical event timeline viewing of System

Trace events and messages

Intuitively represented events according to

type: waveform, state, value, icon or message

Hierarchical/flat representation of event to

manage large number of sources

Advance view features: zooming,

measurement markers, bookmarks, sorting,

hide/show

System Trace Statistics Analysis

Analyze and graphically visualize through-put,

bandwidth, burst length, IVA-HD behavior,

power/clock management, etc.

Statistics analysis of performance counters

State, Value, icon,

message, waveform

representation of

events

Source name optionally displayed

hierarchical to create manageable groups

Graphically visualization of statistics/through-

put/bandwidth data

Simulator Profiler Leverage the simulator profiler for situations where:

Hardware is not available

When there is a need to profile longer program execution that what can be captured on

hardware using CPU Trace

Require code coverage analysis

Determine where application is spending it’s time using simulator PC discontinuity-

trace Function Profiler

5

Count number of times functions are called

Calculate total inclusive and exclusive

cycles spend in function

Inject OS context switch information for

context aware profiling

Analyze code execution using simulator

base code coverage

Determine is source lines are fully, partially

and not executed at all

Determine number of lines of function gets

executed and percentage coverage

Fully executed == Green

Partially == Yellow

Not executed == Red

Multicore System Analyzer (MCSA)

6

Visibility into the application, OS and hardware across the system at any given time

Software and hardware instrumentation from multiple cores correlated to a global timeline

Unified Instrumentation Architecture (UIA)

defines a set of APIs, interfaces and guidelines to collect data in real-time using software

instrumentation

allow instrumented components from different groups to play well together

Analyze system locally or remotely

Connect to target via Ethernet or JTAG

Drain ETB via Ethernet: virtually extending

ETB size and access date remotely

Linux target host support

Can transport via Ethernet on Linux host

Output logs to Linux Terminal

Live or capture and post-process

Runtime control to enable/disable logging

Easy to use analysis and visualization tooling

enable by Data Analysis and Visualization

Technology (DVT)

Execution Graph

Duration Analysis

Context Aware Profile

Load Analysis

Statistics Analysis

MCSA: Multicore Data Correlation

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Correlate CPU Trace, System Trace and software Instrumentation from

multiple cores to a global timeline

Sync logs injected into data streams

Sync log contains local timestamp and system timestamp

Sync logs fed into a timeserver on host to correlate different data streams

Correlated events can be analyzed graphically on a single timeline in the

event viewer

Visibility into what activities are happening on what cores and when

Timeserver enable correlation across tools from multiple vendors

Timeserver is developed in open source community

Messages

Events

Trace

MCSA: Multicore Data Correlation An Example: monitoring hardware and software statistics

The Keystone Architecture provides a rich set of silicon-based performance monitoring capabilities:

A wide range of Performance Monitoring Counters can be read by software

CP_Tracer modules’ bus throughput statistics can be logged as STM events

Provides insight into bus utilization at several points in the device

Allows the throughput of individual bus masters to be monitored

GEM Event Trace can provide insight into e.g. cache performance

MCSA allows all of the above types of statistics and events to be correlated with each other

Enables graphs of the statistics over time that can help to identify bottlenecks and performance issues

Allows statistics to be viewed on the same timeline as software events logged by the application software

Allows GEM CPU trace to be correlated with STM events and software events for insight into the

operation of the code

How this can be done:

CP_Tracer periodically logs its statistics counters as STM events, and raises an interrupt when it does so

The interrupt triggers an ISR on each of the CPU cores. The ISR:

reads the PMC counters

logs the values as timestamped UIA Software events

logs a ‘sync point’ event to inject time correlation info into the STM and GEM CPU Trace streams

The data is then uploaded to the host

Either through Ethernet (using ETB draining for STM and GEM Trace) or through XDS560v2

MCSA correlates the uploaded data and displays in CCS

DDR3 EMIF: 2 Bus utilization counters

MSMC Performance Counters

EDMA parameters

RAC access counters

XMC profiling counters for

sent/cancelled/hit/miss of prefetch

MCSA: Analysis Features

9

Monitor execution states across multiple

cores using software instrumentation

Execution Graph of OS context and

execution activities

Context event are logged by OS or via

context hook function

Activities are tracked by logging start/stop

events

Profile latency/duration to complete

operation

Base on start/stop software instrumentation

Determine frequency of operation and

minimum, maximum, average time taken

Context Aware inclusive and exclusive

profiling

MCSA: Analysis Features

10

CPU load analysis

Monitor overall CPU loading and task

loading on CPU

Summary analysis of CPU loading

Monitor system resource (such as heap)

usage

Resource usage logged via software

instrumentation

Data visualized graphically with

summary analysis

MCSA: Instrumentation Package Unified Instrumentation Architecture (UIA) target package for

instrumentation

Provide target-side APIs, transports, interfaces and guidelines that enable

instrumentation that is portable and flexible

Built on RTSC (open source) technology

DSP/BIOS instrumented out-of-the-box

Guidelines on how to instrument other RTOSes

Linux logging support 4Q11

UIA Portability and Flexibility

ISA independent - reusable across wide range of TI single-core and multi-

core devices

O/S independent - not tied to specific operating system

Transport independent - no source code change to switch transport

Platform independent - host-side tooling works on both Windows and Linux

Current May 3Q11 4Q11

Future

Production

Early Adopter

In Development

1H12

Code Composer Studio Roadmap

2H12June

No more patches5.0.x

CCSv5.0

CCSv5.1

•Eclipse 3.6 (Helios)

•Windows & Linux

•Validated on a subset of devices (expanded with each release)

•Targeted at Linux application developers & Early Adopters

•Eclipse 3.7 (Indigo)

•Windows & Linux

•Replaces CCSv4 & CCSv5.0

•Supports all devices

•Available as full installation and plug-in distribution

•Regular milestone (M) releases adding functionality during beta

M3 5.1.0 5.1.1 5.1.xM4 Mx

Analyzer

Suite v1.0

Analyzer

Suite 1.0

5.0.3

CCS Analyzer Suite•MC System Analyzer (MCSA)

•Trace Analyzer

• Logic Analyzer

• Available as patch to CCSv5.0

• Included in CCSv5.1

• Available as patch to

CCSv5.0• Include in CCSv5.1

Analyzer

Suite v1.1

• Correlation across

multiple analyzers

• ETB draining