TPC DAQ developments Gilles De Lentdecker, Yifan Yang, Erik Verhagen, IIHE-ULB (Brussels)

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Specifications From detector: DDL : 200MBps GBT : 400MBps To DAQ: PCI :800MBps PCIe (serial link) : 250 or 500 MBps/lane (up to 8 lanes) Plateform : PC MicroTCA (Micro Telecommunication Computing Architecture)

Transcript of TPC DAQ developments Gilles De Lentdecker, Yifan Yang, Erik Verhagen, IIHE-ULB (Brussels)

TPC DAQ developments Gilles De Lentdecker, Yifan Yang, Erik Verhagen, IIHE-ULB (Brussels) ILC TPC: New D-RORC design DDL DRORC From PC to TCA Collaboration with DESY, Lund HDMI SFP PCIe Based on ALICE Hardware: FEC, RCU, DDL, DRORC (PCI) Specifications From detector: DDL : 200MBps GBT : 400MBps To DAQ: PCI :800MBps PCIe (serial link) : 250 or 500 MBps/lane (up to 8 lanes) Plateform : PC MicroTCA (Micro Telecommunication Computing Architecture) Interface Separated board with GBIC MMC study AMC connector CMC connector Power module MCU Sensor SFP module PCIe study QSE connector Optical module Jitter cleaner DDR2 memory PCIe1 connector FPGA Power module Future plan TCA crate A large interconnection network with high bandwidth (10G ethernet, PCIe, etc) Large processing power with some flexibility SFP POWER MODULE FLASH MEMORY MCU FPGA BACKPLANE Thank You!


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