TP-Effect of Voiding in Solder Interconnections LF - Alpha, an Alent

SOLDER PRODUCTS VALUE COUNCIL

ASSOCIATION CONNECTINGELECTRONICS INDUSTRIES ®

The Effect of Voiding in Solder Interconnections Formed from Lead Free Solder Pastes with

Alloys of Tin, Silver and Copper

A Research Report by the Lead Free Technical Subcommittee

IPC SOLDER PRODUCTS VALUE COUNCIL

The Effect of Voiding in Solder Interconnections Formed from Lead Free Solder Pastes with Alloys of Tin, Silver and Copper

TABLE OF CONTENTS

Mission Statement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i

Solder Products Value Council Members. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i

Introduction and Statement of Problem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Review of Test Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Executive Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Void Data Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Statistical Analysis of Void and Failure Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Metallographic Cross Section Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Summary and Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Appendix A: Table of Voids and Failure Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Appendix B: Statistical Analysis of Voids and Failure Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

i The Effect of Voiding in Solder Interconnections Formed from Lead Free Solder Pastes with Alloys of Tin, Silver and Copper

IPC Solder Products Value Council

Mission StatementIn support of IPC’s Mission Statement, IPC solder manufacturers recognize that the PCB and electronics assembly indus-

tries, comprised of the entire supply chain, must grow profi tably. The IPC Solder Products Value Council (SPVC) Steering

Committee’s objective is to identify and execute programs designed to enhance the competitive position of solder manu-

facturers and their customers.

Acknowledgement

It is estimated that nearly $1 million was spent to conduct the round robin lead free testing program from which the data

discussed in this paper was obtained. Each and all members of the IPC Solder Products Value Council contributed not only

funds but also a signifi cant amount of staff time in support of this program. However, like any program of this magnitude,

the following companies and individuals have contributed to the program’s success. The Council wishes to thank George

Wenger and Pat Solan, Andrew Corporation; Engent AAT; Jasbir Bath, Solectron Corporation; Dongkai Shangguan,

Flextronics International; Hallmark Circuits; Jean-Paul Clech; and Dean May, Crane Division-Naval Surface Warfare

Center.

IPC Solder Products Value Council Members

IPC Solder Product Value Council

Lead Free Subcommittee Members

AIM Inc. Henkel Technologies Nihon Superior Company Ltd.

Amtech, Inc. Heraeus, Inc. P. Kay Metal Supply Inc.

Avantec Indium Corporation Qualitek International Inc.

Cookson Electronics Kester Senju Metal Industry

Assembly Material Division Koki Company Ltd. Shenmao Technology Inc.

EFD Inc. Metallic Resources Inc. Thai Solder Industry Corp

Harimatec

Karl Seelig, AIM, Subcommittee Chairman Brian Deram, Kester

Greg Munie, Kester, White Paper Editor Masayuki Nakajima, Koki Company, Ltd.

William Gesick, Advanced Metals Nimal Liyanage, Metallic Resources Inc.

Technology Keith Sweatman, Nihon Superior Co. Ltd.

Patrice Rollet, Avantec Larry Kay, P. Kay Metal Supply Inc.

Paul Lotosky, Cookson Electronics Tippy Wicker, Qualitek

John A. Vivari, EFD, Inc. Hiro Suzuki, Senju/Mitsui Comtek Corp.

Katsuji Takasu, Harimatec Mark Young, Shenmao Technology Inc.

Douglass Dixon, Henkel Loctite Somchai Vorasurayakamt, Thai Solder Industry Corporation Ltd.

Brian Bauer, Heraeus Inc. James Slattery, Indium Corporation

1 The Effect of Voiding in Solder Interconnections Formed from Lead Free Solder Pastes with Alloys of Tin, Silver and Copper

Introduction and Statement of Problem

Due to marketing and legislative pressures in Asia and

Europe, the electronics industry is moving to the adoption

of lead free solders. These lead free materials are con-

sidered by some to be environmentally preferable to the

current lead containing solders that dominate elec tronics

manufacturing.

Although the issue as to whether lead free solders are

indeed environmentally preferred compared to lead con-

taining solders is still under debate, market and legislative

actions are forcing a change in materials used in electron-

ics assembly.

Accordingly, solder material suppliers are being asked to

provide the electronics industry with solders that are lead

free (per the accepted technical defi nition of that term) and

yet still provide all the needed properties – including ease

of assembly and reliability – the electron ics industry has

come to expect from lead containing solders.

At present, there are a large number of materials that have

been proposed as replacements for Tin/Lead (SnPb) solder.

Primary among these are the Tin/Silver/Copper (SAC)

alloys.

There are several variations of the SAC alloys that have

been suggested as the preferred replacements for SnPb

solders. Two are of special interest: the Japan (JEITA)

adopted alloy of 96.5% Tin, 3.0% Silver and 0.5% Copper

and the North American Electronics Manufacturing

Initiative (NEMI) alloy of 95.5% Tin (Sn), 3.9% Silver

(Ag), and 0.6% Copper (Cu).

Both of these alloys have undergone signifi cant testing.

And both sponsors believe that their particular choice is

the best candidate for replacement of SnPb solders.

The SPVC (Solder Products Value Council) is an industry

council comprised of 23 solder manufactures from around

the world that is addressing issues related to solder

assembly. The IPC Solder Products Value Council (SPVC)

members are technically capable of providing any alloy

requested by their customers.

However, the IPC SPVC, as producers of solder alloys,

believes it is in the best interests of the industry, from the

standpoint of product consistency, quality and the conser-

vation of natural resources to achieve a consensus on a

standard lead free alloy for the electronics industry. To that

end, the SPVC recently fi nished a 36 month, million dollar

study of SAC alloys that included contributions of several

organizations, including Engent Labs, NSWC Crane,

Andrew Corporation, Flextronics, and Solectron. This

study, which was completed in June, 2005, was designed

to fi nd a globally available, default lead free alloy. The

fi ndings of this study determined that SAC305 is the

default alloy.

Along with the performance of the SAC alloys, the study

collected a signifi cant amount of data on solder joint voids

for the alloys. This data shows that process voids found

and thermal fatigue failures seen in testing do not show a

statistically signifi cant dependence for the test vehicles and

alloys examined.

The electronics assembly industry generally considers

voiding in BGAs as a potential defect in manufacturing.

In doing so, the industry has adopted a maximum voiding

specifi cation of 25% of the ball X-ray image area. This is a

debatable point since examination of the void is subject to

energy levels of the X-ray, as well as beam angle.

Extremes in energy levels can result in either a false pass

or a false fail. Additionally, each manufacturer of X-ray in-

spection equipment gives a variety of ranges for the energy

levels used during inspection. Unlike other test criteria

where the pass/fail limits are specifi ed by the particular

piece of equipment, X-ray inspection is not specifi ed. The

type of voids is not specifi ed, e.g. interfacial voids or voids

in the bulk of the solder. However, in spite of this, most

companies engaged in electronics assembly have adopted a

void specifi cation.

In general, voiding seems to have more of an impact

on handheld devices where high G-forces resistance is

required. As a matter of fact, several papers have been

written over the past few years that support the theory that

voiding does not impact reliability.

With advent of lead free solder, the voiding specifi ca-

tion of 25% has been carried over to be used for lead free

assemblies, as well. Lead free solder joints are known

to void more than tin-lead solders, and SAC alloys void

higher than other lead free alloys.


During the SPVC’s analysis of thermal cycling and

thermal shock failures with SAC alloys, void-to-failure

ratio was studied. The results are in agreement with

previous studies on tin-lead assemblies that demonstrated

that there is no relationship between voids occuring in the

bulk of the solder and thermal stress failures.

The following paper presents data collected from the IPC

SPVC study that supports the claim that voids in the bulk

of the solder do not signifi cantly impact BGA failure. It

also demonstrates that failures occur at the package side of

the ball bond pad, away from the solder joint. This is due

to the die placement and CTE changes that occur across

the package due to die layout. As no interfacial, “cham-

pagne” or Kirkendall voids were observed, this paper

makes no inferences about the effects of those types of

voids on solder joint reliability.

Review of Test Program

Methodology

In order to determine what material is best suited to be the

standard alloy, the IPC SPVC members reviewed the most

likely candidates in the current list of contenders and care-

fully considered:

• What alloys are presently, through general ac-ceptance, most likely to be used as SnPb solder replacements?

• What tests are applicable to make an accurate deter-mination of the differences (if any) in the properties of the most likely candidates?

Alloy Choice

As was previously stated, the majority of potential

“standard” replacement alloys are composed of Tin, Silver,

and Copper with Silver varying between 3 and 4% and Tin

varying between 95.5 and 96.5%. Prior to SPVC testing,

the “front runners” were (in % of Tin/Silver/Copper) the

96.5/3.0/0.5 (JEITA) and 95.5/3.9/0.6 (NEMI) alloys. To

cover that composition range represented by these alloys,

the alloys chosen for testing by the IPC SPVC were:

• 96.5/3.0/0.5 Tin/Silver/Copper (Referred to as Alloy C in this report)

• 95.5/3.8/0.7 Tin/Silver/Copper (Referred to as Alloy B in this report)

• 95.5/4.0/0.5 Tin/Silver/Copper (Referred to as Alloy A in this report.)

Elements of Testing Program

To answer these questions, the IPC SPVC completed a

three year round robin testing program. The elements of

the program were:

1. Assembly Performance (initial screening) by council members of SAC alloys to compare basic alloy properties.

2. Dow n-select testing by Engent of SAC alloys provided by six solder manufacturers before assembly.

3. Assembly of Flextronics and Solectron test PCBs using down-selected SAC alloys. An industry standard eutectic SnPb solder was used as a control.

4. Base Line Metallographic Analysis of completed assemblies by Andrew Corporation

5. Thermal Shock and Thermal cycling conducted by NSWC Crane

As noted above, this Research Paper is not intended to

summarize all phases of the test program. The summaries

of the fi rst and second phases of the work, comparison of

alloy properties and the comparison of assembly results,

as well as the complete overview with all data on thermal

testing and metallographic analysis has already been

presented else where and is now available from IPC. A

complete summary, including all data collected, was pre-

sented in a comprehensive third white paper also available

form IPC. The intent of this work is to discuss observa-

tions made during the testing and metallographic analyses

on the impact of voiding on solder joint integrity. As such

a description of the phases of the testing program and an

executive summary of the conclusions of this part of the

study on voiding in solder interconnections are presented

below.

Board Assembly

In support of the SPVC study, both Solectron and

Flextronics populated 40 boards with each of the three

SAC alloys and their incumbent Sn63/Pb37. Both com-

panies assembled their own test vehicles using process

parameters established by the SPVC Technical Lead Free

Subcommittee. These two test vehicles are shown in

Figures 1 and 2.


Of primary concern was the refl ow profi le. A single

common time-temperature profi le was used for the three

chosen SAC alloys. Target time-temperature values where

chosen to ensure best possible wetting given the alloys

under testing. It is important to note, that to preserve ano-

nymity of the solder pastes used, there was no optimiza-

tion of the profi le. As a result, it is likely that an optimized

profi le could reduce the level of voiding.

• O2 ppm level of 1000 or less

• Ramp Rate - 0.5˚ to 1.5˚C per second is optimal. The assembly compa nies agree the target would be 1˚ - 2˚C.

• Peak Temperature – 235˚ to 245˚C is recommended. Peak tem peratures may range from 230˚ to 265˚C.

• Time Above Liquidus – 45 to 75 seconds is recom-mended. Time above liquidus may range from 30 to 90 seconds.

• Total Profi le Length – Time from ambient to peak temperature should be 3 to 4 minutes.

At Solectron, the production refl ow oven used had 10

heating zones, with forced convec tion and a Nitrogen

(<100 ppm O2) rich atmosphere. The lead free refl ow

profi le was in the ranges specifi ed. For the lead free

SnAgCu solder pastes at the largest QFP 256 component

on the board, solder joint peak temperature was 241°C

and for one of the smallest components on the board (lead

free 0.5mm CSP) solder joint peak temperature was 247°C

with time over 217°C of 75 to 82 seconds.

A 2D-Xray system was used for initial X-ray inspection

after assembly. Voiding greater than 25% of the area was

observed with all three lead free solder paste assembled

alloy boards specifi cally for the 0.5mm CSP lead free

components. For the tin-lead assembled boards, there was

evidence of some voiding but much less than 25% void

area on the 0.5mm tin-lead assembled CSP components.

It should be noted that the SnPb solder paste used by both

companies was their standard production solder paste

and the time-temperature profi le used for SnPb assembly

was their standard refl ow profi le optimized for their SnPb

solder paste. No rework was performed on the devices

with voids, per agreement with the IPC SPVC technical

committee members.

At Flextronics, the refl ow oven used had 9 heating zones

with a nitrogen (<1000 ppm O2) rich atmosphere. The

refl ow peak temperature was 240˚C-248˚C for the lead

free solder and 217˚C-222˚C for the eutectic Sn-Pb solder.

It also should be noted that the SnPb solder paste used

by Flextronics was their standard production solder paste

and the time-temperature profi le used for SnPb assembly

was their standard refl ow profi le optimized for their SnPb

solder paste.

An X-ray system was used for micro-focus, real-time, non-

destructive inspection of the sol der joints. Voiding greater

than 25% was observed with all three lead free alloys.

Devices PBGA196, C-CSP224, and CSP8 all showed

voids greater than 25% on almost all packages, but no

voids were discovered on the LCC24 and BCC24. X-ray

inspection on the eutectic Sn/Pb solder boards showed

Figure 1: Solectron Test Vehicle

Figure 2: Flextronics Test Vehicle


no voids. No rework was performed on the devices with

voids, per agreement with the IPC SPVC technical com-

mittee members.

Test Methodology

The test regime consisted of conventional industry

accepted thermal cycle and thermal shock exposures.

Environmental exposures were conducted on both sets

of test boards with functional monitoring during the

exposure. The test vehicle sets included assemblies from

both Solectron and Flextronics. Each company provided

four (4) groups of forty (40) test panels representing the

three SAC solder alloy compositions as well as a baseline

eutectic (tin/lead) solder composition. One board from

each set was used for destructive metallographic analysis

and not included in the thermal cycling study.

The specifi cs relating to the thermal test events are

outlined in the following paragraphs along with specifi cs

on the test equipment, test profi les, test confi gurations,

functional monitoring, and test schedule.

Test Equipment

The thermal cycling equipment incorporates the use of

a BEMCO FW100 thermal chamber. This chamber is

capable of cycling, when empty, from 0°C to 100°C in ap-

proximately 10 minutes. Similarly, this chamber can cycle,

when empty, from -55°C to 125°C in 20 minutes.

The Thermotron, model ATS–320–H–15–15, is the thermal

shock chamber. This chamber provides for temperature

cycling from -55°C to 125°C through physical movement

of the test article within the chambers in less than one

minute. The temperature stabilization would take longer

and would be a function of the thermal mass of the test

article. Typical stabilization times for these temperature

ranges were 5 minutes.

Test Approach

Due to the sizing of the equipment, the payload of the

thermal shock equipment was maximized with a combi-

nation of Flextronics and Solectron test vehicles. The re-

maining balance of test vehicles was allocated for thermal

cycling.

The initial estimate for this distribution consisted of ap-

proximately 24 of each vendors test vehicle subjected to

thermal shock with the remaining balance of 132 of each

vendor test vehicle subjected to thermal cycling. This

approach allowed for 6 of each solder composition to be

exposed to thermal shock with the balance subjected to

thermal cycling. The size of the BEMCO chamber accom-

modated this large number of assemblies.

The thermal cycle profi le refl ects the IPC test regimen

and consists of a low temperature soak (0°C) for ten (10)

minutes with a temperature increase ramp up to 100°C

with a high temperature soak of ten (10) minutes prior to

a ramp down to the low temperature. The total cycle is

typically takes around sixty (60) minutes. The cycle time

is a function of the chamber time to temperature and the

related temperature stabilization of the test article.

The thermal shock test profi le is very similar to the JEDEC

prescribed exposure. It consisted of a low temperature

(-55°C) soak for fi ve (5) minutes, followed by a transition

to the high temp (125°C) with a high temperature soak

for fi ve (5) minutes, with a fi nal transition back to the

low temperature. This cycle would was repeated continu-

ously. The total cycle time was approximately twenty (20)

minutes.

Functional monitoring was provided using Fluke NetDaq

Model 2640A data acquisition units. The test provided 2-

wire resistance monitoring for 700 signals based on thirty-

fi ve (35) NetDaq units with twenty (20) channels each.

In addition to the functional monitoring, metallographic

analysis at every 500 thermal cycles was done at Andrew

Corporation on representative samples from the two sets

of tests vehicles. When comparing the results of X-ray

analysis for voids, failures in thermal cycling and thermal

shock and the metallographic examination of both failed

and functional solder joints after thermal exposure, it is

obvious that voids had little or no infl uence on solder joint

integrity. Follow up statistical analysis, presented here,

confi rms that belief.


As was previously mentioned, the IPC Solder Products

Value Council Lead Free Technical Subcommittee chose,

because of its widespread use, the tin, silver, copper family

of lead free alloys. The council assumed that although the

high content silver alloys (3.8 % silver or greater) were

being promoted as an alloy of choice, it appeared that

the lower silver (96.5/3.0/0.5 SnAgCu commonly called

SAC 305) lead free alloy would perform equally as well at

lower cost.

Standard tin-lead near-eutectic solder (SnPb) solder, as

a part of this study, was used as a control. However, the

members of the technical committee did not intend for

the test program to be a head to head comparison between

lead free and SnPb solder but an analysis of the SAC alloy

family.

The committee then, working with the appropriate

company or organization, chose the testing protocol and

reviewed each step of the testing program. The results of

each phase of the six-phase test program can be summa-

rized as follows:

Assembly performance screening to compare alloys: No

statistically signifi cant difference was found in alloy

performance when data from participating locations was

compared. Experimentally the alloy properties of melt

temperature (DSC), time to reach zero and maximum force

in wetting balance testing and solder spread as determined

by area and diameter were found to not be statistically dif-

ferent. In some cases a specifi c location found differences

but when the data was averaged between locations for the

same alloy no statistical difference could be found.

Down selection of the solder pastes for assembly: No dif-

ference was found between alloys for the pastes tested for

assembly performance.

Assembly of test vehicles using SAC alloys with SnPb

eutectic solder as a control: No difference was found in

process ability or defect rate between the alloys as as-

sembled at two separate test locations using two separate

test vehicles. Although the materials’ performance was

distinguishable from SnPb eutectic solder there was no dif-

ference between the lead free SAC alloys studied.

Baseline metallographic analysis of the assembled test

vehicles: No metallurgical difference was found between

the SAC alloy solder joints after assembly and before

thermal cycling.

Thermal cycling testing: All three SAC alloys showed

similar failure rates for similar packages. These rates

were distinguishable from the behavior of SnPb solder but

were not distinguishable from one another. When the data

collected in this study was compared to data collected in

previous studies using the NEMI 95.5/3.9/0.6 SAC alloy

the results of the different studies were not distinguishable

by alloy.

Metallographic analysis as a function of thermal cycling:

Metallographic analysis was performed at every 500

thermal cycles. Results showed there was no signifi cant

difference between SAC alloy structures with thermal

cycling.

Statistical analysis of the relationship between voids and

solder interconnection reliability: A key by-product of

this testing program was the data gathered on the much

debated issue of solder joint voiding. Based on comparison

of number and size of solder joint voids to thermal cycle

interconnection failure data collected in this study, there

is no evidence that the type of process-related solder joint

voiding that was observed in the SAC alloy solder joints

has any signifi cant impact on solder joint reliability.

The results of the testing done over all phases of this study

indicate that SAC 305 (Sn96.5/Ag3.0/Cu0.5) should be the

default alloy for use in SAC lead free applications involv-

ing refl ow assembly. The presence of process related

voids in the interconnections formed using the SAC

alloys has been found to have no statistically signifi cant

effect on solder interconnection reliability as tested by

accepted thermal cycling methods.

Executive Summary Section


Void Data Summary

Overview

The data presented here represents the compilation of

electrical failures, transmission x-ray imaging and metal-

lographic analysis of the test vehicles described above.

The test regimen lasted over 6000 thermal cycles (as per

IPC-9701 test conditions.)

Voiding was noted before the start of the thermal testing in

both the Flextronics and Solectron assemblies. The amount

of voiding in the SAC alloys was considerably greater than

in the near-eutectic SnPb solder joints.

In the Solectron assemblies voiding greater than 25% of

the area was observed with all three lead free SAC alloy

solder paste assembled boards and specifi cally for the

0.5mm pitch CSP84 lead free components on the boards.

For the SnPb assembled boards, there was evidence of

voiding but much less than 25% void area on the 0.5mm

pitch SnPb assembled CSP84 components.

On the Flextronics assembly, voiding greater than 25%

was also observed with all three lead free SAC alloys.

Devices PBGA196, C-CSP224, and wafer-level CSP8 on

the assembled boards all showed voids greater than 25%

on almost all packages.

For both sets of assemblies no rework was performed

on the devices with voids, per agreement with the IPC

SPVC technical committee members. All void locations,

along with other defects that were repaired, were noted

with a red inspection arrow at the component location. It

was hoped that thermal shock and thermal cycle testing

would provide data on the correlation (if any) between

the location and magnitude of the voids and attachment

reliability.

Shown in Figures 1-4 some typical examples of voids

detected on assemblies not yet subjected to thermal

cycling, i.e. the baseline metallographic analysis.

Transmission X-ray images and photomicrographs of

solder joints from the Flextronics solder test vehicle are

shown in Figures 1, 2, and 3. These fi gures along with

many others are from the fi nal SPVC white paper (released

separately and available from IPC). There is also less

solder joint voiding in the SnPb solder joints than there

is in the SAC alloy solder joints. An example of voids

detected during the cross sectioning process for SAC405

alloy A is shown in Figures 3. Note that these images were

made prior to any thermal cycling.

Transmission x-ray imaging was performed on each

component on every board that was removed each 500

cycles. Although the number of x-ray images is too large

to incorporate in a report, the images did reveal that solder

joint voiding was more extensive in the SAC alloy solder

joints than in the SnPb solder joints. In particular the

solder joint voiding, both in number as well as size, in

the CSP84 package solder joints was considerably more

extensive than the other area array packages. Comparison

of the voiding with cross sections of temperature-cycled

packages did not show any obvious correlation of voiding

to interconnect failure.

For example, the cross-sectioned SAC305 solder joints of

the Solectron Board C11, U313 CSP84 package presented

in Figure 4 shows very large voids but no indication that

these voids are contributing to interconnection failure even

though this package was subjected to 4500 temperature

cycles.

The fi nal SPVC white paper confi rms that there were

enough temperature cycle induced creep-fatigue solder

joint failures of the 0.8mm pitch 84 I/O CSP packages

on the Solectron Pb-Free to obtain 2-parameter Weibull

slope (Beta) and characteristic life (Eta) values. A Weibull

plot of the failure distributions for the CSP84 packages is

presented in Figure 5.

The Weibull distributions show that the SAC alloy solder

joints had a longer characteristic life than the SnPb solder

joints (4713 to 6810 cycles for SAC alloy compared to

1595 cycles for SnPb). However, the transmission x-ray

images and cross sections that were done on the non-

monitored boards every 500 cycles showed considerably

more and larger voids in the SAC alloy solder joints than

the SnPb solder joints. Because of this it was decided to

x-ray each and every CSP84 package upon completion

of the 6000 temperature cycles and attempt to correlate

voiding with cycles to failure. It needs to be emphasized

that although the voiding in the SAC alloy solder joints

was greater than the SnPb solder joints, the voiding is

believed to be due to the use of a non-optimized assembly

process for the SAC alloy boards. As indicated earlier, the


IPC SPVC defi ned a “common refl ow profi le” to be used

for the SAC alloy assembly. The SnPb solder paste used

by Flextronics and Solectron was the standard production

solder paste used at each company and the refl ow profi le

used was their standard optimized production profi le and

not the IPC SPVC “common refl ow profi le”. To validate

that the voids in the SAC alloy solder joints were due to

the use of a non-optimized assembly process, Solectron

provided boards that they assembled using SAC396 with

an optimized assembly process. The transmission x-ray

images presented in Figure 6 and 7 compare the solder

joint voiding in CSP84 packages assembled using SAC396

with an optimized assembly process voiding to CSP84

packages assembled using SAC387 with a non-optimized

assembly process.

Figure 1: Transmission X-Ray comparison of U1 PBGA196 showing voids bigger with Pb-free sac soldering

Figure 2: Transmission X-Ray comparison of U43 Wafer-Level CSP8 showing voids bigger with Pb-free sac soldering

Figure 3: X-Ray and cross section of Flextronics Board A9 U2 SAC405 assembled C-CSP224

Figure 4: X-Ray and cross section of Solectron Board C11 SAC305 assembled U313 CSP84 Row 12

Figure 5: Weibull 2-P Distributions for the CSP84 packages on the Solectron Boards


The x-rays in Figure 6 and 7 clearly show larger

voids in the SAC alloy solder joints that were

made using a non-optimized assembly process.

The other interesting point to note in these fi gures

is the Weibull Beta and Eta values. These sta-

tistics are based on the 24 CSP84 packages that

were part of the IPC SPVC reliability test and

the 60 CSP84 packages that were part of the

Solectron reliability test. Although there are large

voids in the SAC387 solder joints assembled

using the “common refl ow process”, there is no

statistically signifi cant difference in the character-

istic life of the solder joints. In fact, the average

value of the characteristic life of the solder joint

with large voids is greater.

To better quantify the solder joint voiding, each of

the CSP84 package x-ray images was magnifi ed

and the number of solder balls with voids for each

package was counted. The number of solder joints

with voids greater than 25% of the PCB pad area

was also counted. The magnifi ed images present-

ed in Figure 8 shows the voids were counted. The

red numbers indicate the solder joints with voids

greater than 25%. It is interesting to note that

although there are approximately similar numbers

of solder joints with voids in both fi gures, only

the solder joints made using the non-optimized

assembly process have voids greater than 25%.

Although the CSP84 packages were monitored

during temperature cycling and the number of

cycles to failure for each package is known, it was

impossible to remove each package at the moment

it failed and cross section the solder joints to

determine which solder joints failed fi rst.

However, if there is an infl uence of voids on

failure mode this effect should be detectable

graphically. For example, plots of the distribu-

tion of voids > 25% for failing and non-failing

packages at 6000 cycles should be distinctly

different.

Figure 6: X-Ray comparison showing process effect on solder joint voids

Figure 7: Another X-Ray comparison showing process effect on solder joint voids

Figure 8: Magnifi ed X-Ray comparison showing process effect on solder joint voids


A comparison of the distributions for failed and non-failed

packages is presented in Figure 9.

If the infl uence of voids was a negative one on intercon-

nect reliability the two sets of distributions would diverge,

i.e. fewer and smaller voids would be tracked by the red

triangle distribution (across the bottom of the graph) while

the blue circle distribution of interconnections with more

and larger voids would climb steeply from left to right.

However, both sets of distributions track each other within

the expected scatter of such a plot. This would tend to

imply that in this test there is no obvious effect of voids on

interconnection reliability.

To present the voiding data in a slightly

different manner Figure 10 is a summary

of the voiding data showing the relation

between size and number of voids in the

interconnection and interconnection cycles

to failure

Two data sets are shown: interconnec-

tions with voids greater than 25% area and

interconnections with total voids regardless

of size. As above, if voids had a signifi cant

effect the >25% voids would be expected

to cluster in failures early on. However,

both sets of data maintain a common

scatter, typical of scatter in thermal

cycling failures, across the entire span

of the testing. Note the early failures at

the bottom left hand area of the plot. The

black circles represent the SnPb assembled

CSP84 package failures. Although these

failed earliest in the testing they had essen-

tially no large voids! The total number of

voids in the SAC alloy assembled CSP84

packages denoted by the blue triangles in

Figure 10 are fewer than the total number

of voids in the SnPb assembled packages.

The SAC alloy packages’ cycles to failure,

however, were considerably greater.

Note that if voids impacted the attachment

reliability of the packages then the occur-

rence of large voids/many voids would

result in a high failure rate at a low number

of cycles. However, the plot of size and oc-

currence versus cycles to failure is essen-

tially fl at within the scatter of the data for the three SAC

alloys and SnPb. This implies that voids have, for this set

of test conditions, no impact on attachment reliability.

Neither the size nor the number of voids in a solder joint

as observed in this study appears to have any effect on at-

tachment reliability. As noted previously in this paper, the

study does not discount the possibility that other types of

voids not observed in the study—Kirkendall voids— may

have an impact on solder joint reliability.

Figure 10: CSP84 voiding verses cycle to failure

Figure 9: Distributions for comparing failed and non-failed CSP84 packages show no void effect


Many of the monitored packages on the Pb-Free test

vehicles were cross sections after completing 6000 tem-

perature cycling. The cross section confi rmed the large

voids observed in the transmission x-rays made prior to

sectioning. The photomicrographs presented in Figure 20

shows a transmission x-ray and cross sectional comparison

of CSP84 SnPb and SAC396 solder joints. These packages

had been assembled using a refl ow process optimized for

their respective solder pastes. The photomicrographs are of

the solder joints at Row 10 that is immediately under the

edge of the die where the local CTE mismatch would be

greatest. Also presented in Figure 20 is the transmission

x-ray and cross section of SAC305 solder joints that were

made using the non-optimized IPC SPVC “common refl ow

profi le”. As can be seen there are large voids in many of

the SAC305 solder joints.

Magnifi ed image comparisons of the individual solder

joints for the three packages are presented in Figures 21a,

21b, and 21c. All of the Row 10 solder joints on the SnPb

package assembled with an optimized process have com-

pletely cracked at the interface to the CSP84 package after

the 6000 temperature cycles.

The original failure of this package occurred during

temperature cycling at 1413 cycles. Eight of the 10 (solder

joint M10 is not shown for any of the three packages) Row

10 solder joints on the SAC396 package assembled with

and optimized process have completely cracked at the

interface to the CSP84 package after the 6000 temperature

cycles. The original failure of this package occurred during

temperature cycling at 3075 cycles.

Although there are large voids in fi ve of the 10 Row 10

solder joints of the SAC305 package that was assembled

using the non-optimized IPC SPVC “common profi le”,

none of the Row 10 solder joints are completely cracked at

the interface to the CSP84 package after the 6000 tempera-

ture cycles. The original failure on this package occurred

during temperature cycling at 4196 cycles.

Figure 20: Typical Cross sections of CSP84 Packagea after 6000 Temperature Cycles

Figure 21a: CSP84 Solder Joints After 600 Cycles

Figure 21b: CSP84 Solder Joints After 600 Cycles

Figure 21c: CSP84 Solder Joints After 600 Cycles

Metallographic Cross Section Results


Statistical Analysis of Void and Failure DataListed in Appendix A is a table of voids and failure data.

This data was used in the statistical analysis of voids and

failures shown in Appendix B. In the table, packages

outlined in green did not fail during the 6000 temperature

cycle testing. Those packages that failed are highlighted in

pink.

Appendix B, Figures 11 through 19 features a graphi-

cal analysis of the void and failure data using the Minitab

Software package available from SBTI Inc. Nine different

methods of statistical analysis were used comparing failure

rates of packages with and without voids.

Data from the IPC Solder Products Value Council reli-

ability study on SAC alloys has been used in a comparison

of voids in SAC interconnections and thermal cycles to

failure. Nine separate methods of statistical analysis com-

paring cycles to failure looking at both voids greater than

25% of the interconnection area and total voids have been

done. Absolutely no correlation between voids and failures

under thermal cycling has been demonstrated.

Based on comparison of the number and size of solder

joint voids to interconnection failure in our thermal cycling

data there is no evidence that the type of solder joint

voiding observed in the SAC alloy solder joints has any

signifi cant impact on solder joint reliability.

Summary and Conclusions


Appendix A: Table of Voids and Failure Data

At 6,000 Cycles: Green—Did not fail; Pink—Failure


Figure 11 shows a boxplot of the cycles to failure for

all CSP84 package solder joints versus number of voids

greater than 25% of the area of interconnection.

Note that cycles to failure do not track the number of

voids. In addition it should be noted that assemblies with

Sn/Pb solder paste (red boxplot) failed at approximately

1200 cycles even though they had zero voids above 25%.

Figure 12 shows an analysis of mean cycles to failure for

all alloys.

Assemblies with Sn/Pb solder paste (red square outlier)

are statistically different than all the SAC alloys. However,

the SAC alloys show no correlation between mean cycles

to failure and number of voids greater than 25% of the

interconnection area.

Figure 13 is a main effects plot of cycles to failure. No

correlation is shown between the number of large voids

or the total number of total voids and the cycles to failure

except for alloy. While SAC alloys all perform well, SnPb

alloys fail earlier in cycling. (The points in the upper left

hand plot at the end of the line of cycles to failure versus

board ID.) However, there is no correlation between total

number of voids and failure – boards with less than 10

total voids failed before components with more then 39

voids.

Figure 14 is a boxplot of cycles to failure for all alloys.

Note that only SnPb stands out. No correlation between

voids and cycling is apparent for SAC alloys.

Figure 11: Voids Greater than 25% Area and Cycles to Failure

Figure 12: Analysis of Means of Cycles to Failure

Figure 13: Main Effects Plot

Figure 14: Cycles to Failure All Alloys

Appendix B: Statistical Analysis of Void and Failure Data


Figure 15 is a matrix plot of cycles to failure and number

of voids greater than 25% of the interconnection area.

There is no correlation between void size and cycle

failures by SAC alloy.

All the Sn/Pb assemblies did however fail with very few

cycles and with very few voids.

Figure 16 is a one-way analysis of mean cycles to failure

for all alloys.

There is a statistically signifi cant difference between alloys

and cycles to failure but only for the comparison of SnPb

to all SAC alloys, i.e. no void effect is noted for SAC

while SnPb shows a greater failure rate in the absence of

voids.

Figure 17 is a one-way analysis of means for all alloys

comparing voids greater than 25% area versus cycles to

failure.

There is no statically difference between SAC alloys the

number of voids greater than 25% and failures. The fi rst

data point, which shows a statistical difference, is Sn/Pb

solder paste.

Figure 18 is a main effects plot of cycles to failure for all

alloys. Note that SnPb is the only statistically signifi cant

stand out in effects. Voids have no effect on cycles to

failure.

SAC Alloy composition is not a main effect with regard to

cycles to failures.

Figure 19 shows a similar analysis to Figure 18. However,

here all voids, including those less than 25% are examined.

No statistical difference between SnPb and SAC alloys

concerning cycles to failure and total void count is found.

Figure 16: Mean Cycles to Failure All Alloys

Figure 17: One Way Analysis of Mean Cycles to Failure

Figure 18: One Way Analysis of Mean Cycles to Failure for All Alloys

Figure 19: Main Effects Plot of Cycles to Failure for All Alloys

Figure 15: Matrix Plot of Cycles to Failure for Voids Greater than 25% Area

TP-Effect of Voiding in Solder Interconnections LF - Alpha, an Alent

Documents

Transcript of TP-Effect of Voiding in Solder Interconnections LF - Alpha, an Alent