Totem-Pole PFC AppNotes - United Silicon Carbide Inc...
4
Application Note USCi_AN0012– Oct. 2016 1.5 kW Totem-pole PFC Using 650V USCi SiC Cascodes Mike Zhu Totem-Pole PFC USCi_AN0012 – Oct. 2016 1.5 kW Totem-pole PFC Using 650V USCi SiC Cascodes 1 United Silicon Carbide 1 Introduction The large reverse recovery charge of conventional Si devices limit the totem-pole PFC in critical conduction mode (CrM) which suffers from large EMI noise and are suitable for low power level alone. With a combination of a SiC JFET and a Si MOSFET in a cascode structure, USCi 650 V SiC cascode provides very fast switching speed, low on resistance, low reverse recovery charge (Qrr), low capacitance, standard 12 V gate drive and very good short circuit and avalanche capability. All these features make the SiC cascode ideal to enable a continuous conduction mode (CCM) totem-pole PFC. The excellent Qrr and fast switching performance of USCi 650 V SiC cascodes achieves 98.6% efficiency at high line (230 VAC) with 400 V DC output. 2 Totem-Pole PFC Topology The goal of a totem-pole PFC is to reach and exceed Titanium efficiency standard. Generally, bridgeless PFC has lower conduction loss than conventional PFC by reducing the number of semiconductor devices in the current path from 3 to 2. Totem-pole bridgeless topology is known for its lower EMI noise with the least amount of devices when compared to other bridgeless topologies [1]. Cout Q1 Q2 Q3 Q4 L AC R D1 D2 Cout Q1 Q2 Q3 Q4 L AC R D1 D2 Figure 1. CCM totem-pole PFC operation in positive half cycle with an active switch in conduction (top) and a freewheeling device in conduction (bottom). Fig. 1 illustrates the operation principle of a CCM totem-pole PFC during the positive half line cycle. Q1 and Q2 are the SiC cascodes to form the 100 kHz fast switching leg. Q3 and Q4 are low RDS(on) Si superjunction MOSFETs to form the line frequency slow switching leg. D1 and D2 are surge current diodes for soft start-up of the circuit. During the AC line positive half cycle, Q4 is always conducting the inductor current. The fast leg devices, Q2 and Q1, together with the input inductor and output capacitor form the simple boost converter topology. Q2 is the active switch and Q1 acts as the freewheeling boost diode. For the negative half cycle, Q3 is conducting the inductor current while Q2 and Q1 swap their functionality. To further boost efficiency, Q1, Q2, Q3, Q4 are all operating in synchronous conduction mode when possible. 3 Totem-Pole PFC Design Considerations The input inductor is designed to keep the current ripple under 20% of the maximum peak input current, I in_pk . The maximum peak input current occurs at low line and full load. Equation (1) gives the minimum inductance to operate in CCM at full load. D is the duty ratio of the active switch (Q1 or Q2) of the fast switching leg. Vout is the 400 V DC output voltage. Vin_min is the 115 Vac low line input voltage. Pout is the 1.5 kW rated output power. And fsw is the switching frequency of the fast leg. The minimum inductance value is therefore 271.1 µH. For fabrication simplicity, 300 µH is selected as the nominal design value for this boost inductor.
-
Upload
truongliem -
Category
Documents
-
view
215 -
download
0
Transcript of Totem-Pole PFC AppNotes - United Silicon Carbide Inc...
ApplicationNoteUSCi_AN0012–Oct.2016
1.5kWTotem-polePFCUsing650VUSCiSiCCascodesMikeZhu Totem-PolePFC
USCi_AN0012–Oct.2016 1.5kWTotem-polePFCUsing650VUSCiSiCCascodes 1UnitedSiliconCarbide
1 Introduction
ThelargereverserecoverychargeofconventionalSideviceslimitthetotem-polePFCincriticalconductionmode(CrM)whichsuffersfromlargeEMInoiseandaresuitableforlowpowerlevelalone.WithacombinationofaSiCJFETandaSiMOSFET inacascodestructure,USCi650VSiCcascodeprovidesveryfastswitchingspeed, lowonresistance,lowreverserecoverycharge(Qrr),lowcapacitance,standard12Vgatedriveandverygoodshortcircuitandavalanchecapability.AllthesefeaturesmaketheSiCcascodeidealtoenableacontinuousconductionmode(CCM) totem-pole PFC. The excellent Qrr and fast switching performance of USCi 650 V SiC cascodes achieves98.6%efficiencyathighline(230VAC)with400VDCoutput.
2 Totem-PolePFCTopology
Thegoalofatotem-polePFCistoreachandexceedTitaniumefficiencystandard.Generally,bridgelessPFChaslowerconductionlossthanconventionalPFCbyreducingthenumberofsemiconductordevicesinthecurrentpathfrom3to2.Totem-polebridgelesstopologyisknownforitslowerEMInoisewiththeleastamountofdeviceswhencomparedtootherbridgelesstopologies[1].
Cout
Q1
Q2
Q3
Q4
LAC
R
D1
D2
Cout
Q1
Q2
Q3
Q4
LAC
R
D1
D2
Figure1. CCMtotem-polePFCoperationinpositivehalfcyclewithanactiveswitchinconduction(top)andafreewheelingdeviceinconduction(bottom).Fig.1illustratestheoperationprincipleofaCCMtotem-polePFCduringthepositivehalflinecycle.Q1andQ2aretheSiCcascodestoformthe100kHzfastswitchingleg.Q3andQ4arelowRDS(on)SisuperjunctionMOSFETstoform the line frequency slow switching leg.D1 andD2 are surge current diodes for soft start-up of the circuit.DuringtheAClinepositivehalfcycle,Q4isalwaysconductingthe inductorcurrent.Thefast legdevices,Q2andQ1, togetherwith the input inductorandoutput capacitor form the simpleboost converter topology.Q2 is theactive switch and Q1 acts as the freewheeling boost diode. For the negative half cycle, Q3 is conducting theinductor current while Q2 and Q1 swap their functionality. To further boost efficiency, Q1, Q2, Q3, Q4 are alloperatinginsynchronousconductionmodewhenpossible.
3 Totem-PolePFCDesignConsiderations
Theinputinductorisdesignedtokeepthecurrentrippleunder20%ofthemaximumpeakinputcurrent,Iin_pk.Themaximum peak input current occurs at low line and full load. Equation (1) gives the minimum inductance tooperateinCCMatfullload.Disthedutyratiooftheactiveswitch(Q1orQ2)ofthefastswitchingleg.Voutisthe400VDCoutputvoltage.Vin_min isthe115Vac lowline inputvoltage.Pout isthe1.5kWratedoutputpower.And fsw is the switching frequency of the fast leg. Theminimum inductance value is therefore 271.1 µH. Forfabricationsimplicity,300µHisselectedasthenominaldesignvalueforthisboostinductor.
Totem-PolePFC www.unitedsic.com
2 1.5kWTotem-polePFCUsing650VUSCiSiCCascodes USCi_AN0012–Oct.2016UnitedSiliconCarbide
𝐿 ≥
𝐷 1 − 𝐷 𝑉!"#𝑉!"_!"#0.2 ∗ 2𝑃!"#𝑓!"
(1)
For thisprototype the inductor is fabricatedwith2 stacksofC055438A2MPPcores.Thewindingconsistsof25turnsof2-strandAWG-14magnetwires.Theinductanceis150µHatfullloadand350µHatnoload.TheinductorDCresistanceis14mΩ.
The output capacitance is determined based on two constraints, load hold-up time and output voltage rippleregulation.Inthisdesign,thehold-uptimeissettobeoneAClinecycle,theoutputvoltagepeaktopeakrippleissettobe10V.
𝐶!"# ≥
2𝑃!𝑡!!"#$%𝑉!! − 𝑉!_!"#! ; 𝐶!"# ≥
𝑃!2𝑉!𝜋𝑓!"#$𝑉!"##$%
(2)
Tomeetbothcriteria,two560µF,500Valuminumelectrolyticcapacitorsareusedinparallelforthisprototype.
The+12/-5Vgatedrive isdesignedwithisolatedDCDCpowersupplymodule,RP-1212D,and-5Vlinearvoltageregulator,LT1175CS8-5#PBF. It is importanttouse isolatedDCDCpowersupplymodulewithverysmall isolationcapacitancetoreducecommonmodenoisefromtheswitchnodefastdv/dttransients.
The zero-crossingcurrent spike isan inherent challengeof totem-polePFC.Thisphenomenonwill increaseTHDanddecreasepowerfactor. It iscausedbythesuddendischargeoftheparasiticoutputcapacitanceofQ3(frompositive to negative cycle zero-crossing) or Q4 (from negative to positive cycle zero-crossing) when thecorrespondingfastlegactiveswitchturnson.Forexample,duringazero-crossingfromnegativetopositivecycle,Q2becomestheactiveswitchinthefastleg.Sinceinputvoltageisnearlyzero,inordertooutput400VthedutyratioofQ2isalmost100%whileQ4wasblocking400Vduringthenegativehalfcycle.Therefore,whenQ2turnson, the charge stored in the parasitic output capacitance ofQ4will incur a positive current spike on the inputinductor.TograduallydischargetheparasiticoutputcapacitanceoftheslowlegSiMOSFETmultiplegatepulseswithsmalldutyratioareappliedafterablankingwindowatzero-crossing.Experimentresultsshowaverygoodmitigationofzero-crossingcurrentspikes.
4 ExperimentResult
Figure2istheprototypeofthe1.5kWhardswitchedCCMtotem-polebridgelessPFC.Noinputfilter isusedforthe measurement. Both AC input and DC output are floating. All voltage waveforms are obtained throughdifferentialprobes.Theinputpower,PFandTHDismeasuredbyaTektronixPA1000singlephasepoweranalyzer.TheoutputpowerismeasuredbytwoKeysight34465Adigitalmultimeters.
Figure2.1.5kWhardswitchedCCMtotem-polePFCprototype(left)andinputvoltage,inductorcurrentat230VAC,1.3kWload(right).
www.unitedsic.com Totem-PolePFC
USCi_AN0012–Oct.2016 1.5kWTotem-polePFCUsing650VUSCiSiCCascodes 3UnitedSiliconCarbide
Figure3shows theefficiencycurvemeasuredat230VACwith0Ω turn-ongate resistorand10Ω turn-offgateresistor for the UJC06505K. 98.6% peak efficiency and 1.83% THD is achievedwith 230 V AC input at 100 kHzswitchingfrequency.
Figure3.EfficiencyandTHDat230VACinput
Figure 4. Inductor current (light blue CH2) at zero crossing, from negative to positive (left), from positive tonegative(right).(CH1:VNpotentialtoDCoutputground;CH3:DSPgatesignalofQ4;CH4:DSPgatesignalofQ3)
AsshowninFigure4,withablankwindowandlowdutyratiogatepulsesoftheactivedeviceinthefastswitchingleg,currentspikesnearzero-crossingisgreatlyreduced.
5 Conclusion
AhardswitchedCCMtotem-polePFCisrealizedusingtheUSCiUJC06505K650VSiCcascodes.Withsynchronousswitchingimplementedtothefullbridge,98.6%peakefficiencyisachievedat100kHzswitchingfrequencyinthefastswitchinglegwith230Vhighlinecondition.ThelowRDS(on),lowQrrandfastswitchingcapabilitymake650VSiCcascodesidealforfull-bridgeandhalf-bridgehardswitchingapplications.Figure2demonstratesthattheinputinductorcurrentfollowstheinputACvoltageverywell.Figure4illustratesthatcurrentspikenearzero-crossingofinputACvoltageissubstantiallyalleviatedbyablankwindowandmultiplegatepulsesoftheactiveswitchinthefastlegwithsmalldutyratio.
0
2
4
6
8
10
12
14
0.972
0.974
0.976
0.978
0.980
0.982
0.984
0.986
0.988
400 600 800 1000 1200 1400
TH
D
Effi
cien
cy
Output Power (W)
UJC06505K Efficiency
UJC06505K THD
Totem-PolePFC www.unitedsic.com
4 1.5kWTotem-polePFCUsing650VUSCiSiCCascodes USCi_AN0012–Oct.2016UnitedSiliconCarbide
References[1] Q. Li, M. A. E. Andersen and O. C. Thomsen, “Conduction losses and common mode EMI analysis on bridgeless power factor correction,” 2009 International Conference on Power Electronics and Drive Systems (PEDS), Taipei, 2009, pp. 1255-1260.
