Tiva C Series TM4C123GH6PGE Microcontroller Data Sheet ... · PDF fileTableofContents...

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Tiva TM4C123GH6PGE Microcontroller DATA SHEET Copyright © 2007-2014 Texas Instruments Incorporated DS-TM4C123GH6PGE-15842.2741 SPMS375E TEXAS INSTRUMENTS-PRODUCTION DATA

Transcript of Tiva C Series TM4C123GH6PGE Microcontroller Data Sheet ... · PDF fileTableofContents...

  • Tiva TM4C123GH6PGE Microcontroller

    DATA SHEET

    Copyr ight 2007-2014Texas Instruments Incorporated

    DS-TM4C123GH6PGE-15842.2741SPMS375E

    TEXAS INSTRUMENTS-PRODUCTION DATA

  • CopyrightCopyright 2007-2014 Texas Instruments Incorporated. Tiva and TivaWare are trademarks of Texas Instruments Incorporated. ARM and Thumb areregistered trademarks and Cortex is a trademark of ARM Limited. All other trademarks are the property of others.

    PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standardwarranty. Production processing does not necessarily include testing of all parameters.

    Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductorproducts and disclaimers thereto appears at the end of this data sheet.

    Texas Instruments Incorporated108 Wild Basin, Suite 350Austin, TX 78746http://www.ti.com/tm4chttp://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm

    June 12, 20142Texas Instruments-Production Data

    http://www.ti.com/tm4chttp://www-k.ext.ti.com/sc/technical-support/product-information-centers.htm

  • Table of ContentsRevision History ............................................................................................................................. 39About This Document .................................................................................................................... 43Audience .............................................................................................................................................. 43About This Manual ................................................................................................................................ 43Related Documents ............................................................................................................................... 43Documentation Conventions .................................................................................................................. 44

    1 Architectural Overview .......................................................................................... 461.1 Tiva C Series Overview .............................................................................................. 461.2 TM4C123GH6PGE Microcontroller Overview .................................................................. 471.3 TM4C123GH6PGE Microcontroller Features ................................................................... 501.3.1 ARM Cortex-M4F Processor Core .................................................................................. 501.3.2 On-Chip Memory ........................................................................................................... 521.3.3 Serial Communications Peripherals ................................................................................ 541.3.4 System Integration ........................................................................................................ 581.3.5 Advanced Motion Control ............................................................................................... 641.3.6 Analog .......................................................................................................................... 661.3.7 JTAG and ARM Serial Wire Debug ................................................................................ 681.3.8 Packaging and Temperature .......................................................................................... 681.4 TM4C123GH6PGE Microcontroller Hardware Details ...................................................... 691.5 Kits .............................................................................................................................. 691.6 Support Information ....................................................................................................... 69

    2 The Cortex-M4F Processor ................................................................................... 702.1 Block Diagram .............................................................................................................. 712.2 Overview ...................................................................................................................... 722.2.1 System-Level Interface .................................................................................................. 722.2.2 Integrated Configurable Debug ...................................................................................... 722.2.3 Trace Port Interface Unit (TPIU) ..................................................................................... 732.2.4 Cortex-M4F System Component Details ......................................................................... 732.3 Programming Model ...................................................................................................... 742.3.1 Processor Mode and Privilege Levels for Software Execution ........................................... 742.3.2 Stacks .......................................................................................................................... 752.3.3 Register Map ................................................................................................................ 752.3.4 Register Descriptions .................................................................................................... 772.3.5 Exceptions and Interrupts .............................................................................................. 932.3.6 Data Types ................................................................................................................... 932.4 Memory Model .............................................................................................................. 932.4.1 Memory Regions, Types and Attributes ........................................................................... 962.4.2 Memory System Ordering of Memory Accesses .............................................................. 962.4.3 Behavior of Memory Accesses ....................................................................................... 962.4.4 Software Ordering of Memory Accesses ......................................................................... 972.4.5 Bit-Banding ................................................................................................................... 982.4.6 Data Storage .............................................................................................................. 1012.4.7 Synchronization Primitives ........................................................................................... 1012.5 Exception Model ......................................................................................................... 1022.5.1 Exception States ......................................................................................................... 103

    3June 12, 2014Texas Instruments-Production Data

    Tiva TM4C123GH6PGE Microcontroller

  • 2.5.2 Exception Types .......................................................................................................... 1032.5.3 Exception Handlers ..................................................................................................... 1082.5.4 Vector Table ................................................................................................................ 1082.5.5 Exception Priorities ...................................................................................................... 1092.5.6 Interrupt Priority Grouping ............................................................................................ 1102.5.7 Exception Entry and Return ......................................................................................... 1102.6 Fault Handling ............................................................................................................. 1132.6.1 Fault Types ................................................................................................................. 1142.6.2 Fault Escalation and Hard Faults .................................................................................. 1142.6.3 Fault Status Registers and Fault Address Registers ...................................................... 1152.6.4 Lockup ....................................................................................................................... 1152.7 Power Management .................................................................................................... 1162.7.1 Entering Sleep Modes ................................................................................................. 1162.7.2 Wake Up from Sleep Mode .......................................................................................... 1162.8 Instruction Set Summary .............................................................................................. 117

    3 Cortex-M4 Peripherals ......................................................................................... 1243.1 Functional Description ................................................................................................. 1243.1.1 System Timer (SysTick) ............................................................................................... 1253.1.2 Nested Vectored Interrupt Controller (NVIC) .................................................................. 1263.1.3 System Control Block (SCB) ........................................................................................ 1273.1.4 Memory Protection Unit (MPU) ..................................................................................... 1273.1.5 Floating-Point Unit (FPU) .................................................................