Three Phase 500W Inverter

As an Induction Motor Drive

By

Duke Gray

Nathan Brown

Quasar Hamirani

ECE 445, SENIOR DESIGN PROJECT

FALL 2004

TA: Chad Carlson

Date

11/22/2004

Project No. 3

ABSTRACT

A three-phase inverter was designed to drive an induction machine from a 200V DC bus as part of the

2005 Future Energy Challenge. The inverter needs to have the following specifications: load handling

of 50-500W to the motor’s shaft at nominal speed of 1500 RPM, efficiency greater than 70%, and mean

time before failure (MTBF) greater than ten years. The inverter portion of the design consists of a

MOSFET Hex-bridge, integrated gate drive, and additional related circuitry.

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TABLE OF CONTENTS

1. INTRODUCTION....................................................................................................................1

1.1 Purpose.............................................................................................................................................1

1.2 Description and Block Diagram.......................................................................................................1

1.3 Performance and Design Specifications...........................................................................................2

1.4 Subprojects.......................................................................................................................................2

2. DESIGN DECISIONS...........................................................................................................................3

2.1 Hex Bridge.......................................................................................................................................3

2.2 Gate Drive........................................................................................................................................4

2.3 Switching Signal Input.....................................................................................................................5

2.4 Design Simulation............................................................................................................................5

3. DESIGN DETAILS................................................................................................................................6

3.1 Hex Bridge and Gate Drive..............................................................................................................6

3.2 Circuit Schematic.............................................................................................................................7

3.3 PCB Layout and Implementation.....................................................................................................8

4. DESIGN VERIFICATION AND TESTING..........................................................................................9

4.1 Output Waveforms...........................................................................................................................9

4.2 Efficiency.......................................................................................................................................10

4.3 MTBF.............................................................................................................................................10

5. COST ANALYSIS................................................................................................................................11

5.1 Parts................................................................................................................................................11

5.2 Labor..............................................................................................................................................11

5.3 Total Cost........................................................................................................................................11

6. CONCLUSIONS..................................................................................................................................12

6.1 Future Work....................................................................................................................................12

REFERENCES.....................................................................................................................................13

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INTRODUCTION

1.1 Purpose:

This 500W Three-Phase Inverter is a project whose purpose is to support the University of Illinois

Future Energy Challenge (FEC) team. The purpose of said team is to develop a motor drive system

which is both highly efficient and cost effective. Successful implementation of such a design could

potentially reduce national overall energy consumption by 10% annually if widely used throughout

society (e.g. in household appliances and industry).1 These savings would greatly reduce CO2 released

into the atmosphere from the burning of fossil fuels, thus detracting from the greenhouse effect. This

three-phase inverter represents the final stage of the FEC motor drive circuit.

1.2 Description and Block Diagram:

The block diagram representing our project is shown in Figure 1. A speed command is given to the

controls team, and a digital switching signal is generated. These switching signals are sent to the hex-

bridge through a gate driver chip. The hex-bridge takes as input a 200V DC bus voltage and the

switching signals to produce a balanced three-phase sinusoidal output which drives the induction

machine.

Figure 1: Block Diagram

1

1.3 Performance and Design Specifications:

The three-phase inverter needs to be able to handle 200 volts DC ± 5V. At this voltage the inverter

must meet the following specifications:

Motor speed control between 150-5000 RPM

Drive a 50-500W load at nominal speed of 1500 RPM

Three-phase sinusoidal output current

At least 70% efficiency under all operating conditions

MTBF > 10 years1

1.4 Subprojects:

The overall project proceeded smoothly because the design was broken down into several smaller

tasks which were implemented by various combinations of team members. These subprojects are:

Hex-bridge circuitry

Gate drive circuitry

Switching signal implementation (waveform generator)

PCB layout

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2 DESIGN DECISIONS

2.1 Hex Bridge:

The standard three-phase inverter has as its genesis, the hex-bridge. The hex-bridge takes a DC bus

voltage and uses six switches (MOSFETS) arranged in three phase legs as shown in Figure 2. Each line

is then connected from the middle of each phase leg to the motor itself. The waveforms on these lines

must be a balanced three-phase sinusoidal waveform in order to drive the induction motor properly.

This is achieved by carefully controlling the switching waveforms at the gates of the switches. For each

leg, the two switches have a 50% duty cycle ensuring that there will be no DC component in the output

signal.

Figure 2: Hex-bridge

There are two kinds of switches that were considered for this range of power applications,

Insulated Gate Bipolar Transistors (IGBTs) or MOSFETs. To meet our specifications, the switch

needed ratings of 400V and 10A. In addition, we wanted a switch which minimized losses; therefore,

switches with lower on-state resistance are desirable. The IGBT considered for this design was the

HGTP12N60B3D, which has a small equivalent resistance of approximately 0.07Ω, but IGBTs also

have a voltage drop at all times due to the collector-emitter saturation voltage, which in this case is equal

to 1.7V. The MOSFET investigated was the FQP17N40, which has an on-state resistance of 0.27Ω.2

The power losses of the IGBT and the FET are plotted against the current (see Figure 3). The

IGBT has a fairly linear loss curve because the loss is mostly due to the IVsat, while the MOSFET

losses are due to the I2RDS(on) . The MOSFET losses increase faster with current, but the MOSFET losses

do not surpass the IGBT losses until I is approximately greater than 9A. The motor used in our project

3

is rated for 3A so the current will most likely operate in the ranges most likely conducive to MOSFET

implementation. 2

In addition to having smaller losses in our operating region, the FQP17N40 is cheaper. It is

$0.96 in a quantity of 1000, while the HGTP12N60B3D is $1.70 in the same quantity. The

HGTP12N60 is rated for 600V, which is the very low end of IGBT ratings. IGBTs are usually used in

higher power applications, so this part is not extremely common. The savings in losses and price

prompted us to choose the FQP17N40 as the switch to be implemented in the hex-bridge. 1

0 2 4 6 8 100

5

10

15

20

RMS current (A) [Single Frequency Sinusoid]

Av

era

ge

Co

nd

uc

tion

Ba

se

d P

ow

er

Lo

ss

FQP17N40HGTG12N60B3D

Figure 3: Power losses in IGBT vs. FET

2.2 Gate Drive:

The gate to source voltage needed for desired operation of the MOSFETs is on a 12V level. In

addition, the high side MOSFETs in the hex-bridge do not have the source connected to ground, so the

actual voltage needed to drive the gate depends on the varying voltage at the source. Dielectric isolation

is desired to protect the control hardware from the high-power hex-inverter. A single chip, the IR21362,

was found to have the desired functionality. It served to implement all six gate drives, including the

circuitry that takes into account the voltage biasing of the high side MOSFETs. There were other

options, such as the IR2121, consisting of a single gate drive on a chip, but when compared to the cost

of a single solution chip, in the interest of mean time before failure (MTBF) and price, the IR21362 was

chosen. 3 Another feature of the gate drive chip is its current trip input which allows for controllable

over-current protection.

4

2.3 Switching Signal Input:

To test the inverter, control signals need to be implemented. Three Agilent 33250A waveform

generators were used to provide these signals. A MATLAB script was used to generate a pulse width

modulated (PWM) waveform, and the data points of the waveform were programmed into the

generators. The generators were triggered off each other to separate their outputs by 120 degrees. The

generators allow the user to vary the fundamental frequency while maintaining a modulation frequency

of 10 kHz.

2.4 Design Simulation:

The initial hex-bridge circuit was modeled in Dymola 5. Once the model was simulated, it produced

three phase current waveforms as shown in Figure 4. This initial circuit simulation ensured that circuit

design was valid, and the project could be tested in the lab.

Figure 4: Current output in Dymola 5

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3 DESIGN DETAILS

3.1 Hex Bridge and Gate Drive:

As mentioned in Section 2.1, the FQP17N40 was chosen as the switch for the hex-bridge.

In addition, thermal issues needed to be taken into consideration. The FQP17N40 is rated for 10.1A

continuous at 100°C. Depending upon the motor design, this should not be a problem. The motor used

for the last FEC was rated for 3A, so for that project, the current was never greater than 5A

continuously. The final product is intended to be constructed on a printed circuit board (PCB) along

with the other components of the overall motor drive. Therefore, individual MOSFET heat sinks can be

used temporarily, and a more complete thermal analysis will be saved until a later stage of the FEC

project.

The IR21362 gate drive chip requires some external circuitry (see Figure 5). The gate resistors

(R1-R6), bootstrap capacitors (C1, C2, and C3), and decoupling capacitors (C5 and C6) were chosen

based on information found in [3]. The bootstrap capacitors provide a voltage of 12V above the source

of the high-side FETs while the decoupling capacitor is used to cancel inductance associated with the

wiring of the circuit. The gate resistors reduce the amplitude of a negative spike on the gate voltage that

occurs during switching as seen in Figure 8 of [3]. A resistor and capacitor (R9 and C4) were chosen to

provide a time constant which is used for the gate drive’s fault clearing time. A time constant of greater

than 1.5s was desired for visual confirmation of the fault, yet allowing for quick resetting, so values of

33kΩ and 47μF were chosen. The FAULT pin needs to be pulled high because it is active low. A LED

was added in for visual output in the case of a fault.

The protection circuitry, which includes R7, R8, is chosen based on the fact that a fault occurs if the

voltage on the ITRIP pin is larger than 0.46V. The variable resistor, R8, can be adjusted so that a fault

is given at a desired current value. The circuit was set to trip at a current of 8A, however, the

potentiometer will allow the circuit to be tuned to the specifications of the final design for the overall

FEC project.

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3.2 Circuit Schematic:

Figure 5: Hex-bridge and gate drive circuitry

Tit le

S ize D o c u m e n t N u m b e r R e v

D a t e : S h e e t o f

1 2

2 0 0 5 F E C Th re e -P h a s e I n v e rt e r

A

1 1Th u rs d a y , N o v e m b e r 0 4 , 2 0 0 4

+ 5 V

+ 1 2 V

R 1 05 0 0

D 4L E D

R 7

0 . 0 5

+ 2 0 0 V

C 51 u

C 61 u

R 85 0 0 k

MOTOR_BMOTOR_A MOTOR_C

R 93 3 k

C 4

4 7 u

V C C1

H I N 12

H I N 23

H I N 34

L I N 15

L I N 26

L I N 37

F A U L T8

I TR I P9

E N1 0

R C I N1 1

V S S1 2

C O M1 3

L O 31 4

V B 12 8

H O 12 7

V S 12 6

V B 22 4

H O 22 3

V S 22 2

V B 32 0

H O 31 9

V S 31 8

L O 11 6

L O 21 5

I R 2 1 3 6 2

M 1

F Q P 1 7 N 4 0

M 2

F Q P 1 7 N 4 0

M 3

F Q P 1 7 N 4 0

M 4

F Q P 1 7 N 4 0

M 5

F Q P 1 7 N 4 0

M 6

F Q P 1 7 N 4 0C TR L _ A

C TR L _ C

C TR L _ B

R 12 4

R 22 4

R 32 4

R 42 4

R 52 4

R 62 4

D 1

U F 1 0 0 5 -T

D 2

U F 1 0 0 5 -T

D 3

U F 1 0 0 5 -T

C 1

1 u

C 2

1 u

C 3

1 u

-R E F

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3.3 PCB Layout:

In order to begin the design for the PCB layout, we used the schematics which were drawn in Orcad

and modified them. All the inputs and outputs were replaced with pins on connectors. Next, each

component in the schematic was assigned a footprint for the board. One this was done all the parts were

placed on the board and the routing process began. Initially, the auto-route feature in Layout Plus was

used to route the board. Once that was done, each connection was checked and edited to eliminate

unnecessary long routes. All the low current traces on the board were kept to the standard route width of

12 mils. For the high voltage bus (200V), which had higher currents involved, a wider width of 48 mils

was assigned. An additional copper pour was also drawn around these high voltage traces to prevent

overheating of the copper wires due to the higher currents involved. The board was completed

successfully without any design check errors. The completed board can be seen in Figure 6 below.

Figure 6: Routed PCB board ready for manufacturing

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4 DESIGN VERIFICATION

4.1 Output Waveforms

The desired output current was obtained as seen in Figure 7. Channel 1 shows the PWM switching

signal of the first MOSFET. Channels 2-4 show the current being supplied from the hex-bridge to the

induction machine. Channels M and R1 show the Fourier Transforms of the Phase A current and

switching signal, respectively. The switching signal has a fundamental frequency component at 30Hz

along with switching harmonics at high frequencies. The induction motor acts as a low-pass filter,

attenuating the unwanted frequency components, as seen by the FFT of the current waveform. This

result justifies the decision to implement a PWM control signal, and eliminates the need for any

additional output filtering.

Figure 7: Three-phase induction motor current

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4.2 Efficiency:

The system was tested using at Dayton 3N843 Industrial Induction Motor rated for 208V at 60Hz. The

test motor’s characteristics do not provide an exact replica of the FEC motor being designed, and the

FEC speed control algorithms are beyond the scope of this project. Therefore, the circuit was tested at

900 RPM with no mechanical load applied. A more robust testing environment will be possible once the

FEC components are integrated. The test motor ran smoothly at 900 RPM, and a 96.3% average system

efficiency was achieved. Valhalla 2111A and 2101 watt meters were used to measure input and output

power, and thus the efficiency was computed.

4.3 MTBF:

The MTBF for each component is:

o ¼ Watt Resistors: 17,732 years

o Current sensing resistor: 13,946 years

o Diodes: 1,017 years

o Capacitors: 17,732 years

o IR 21362 Gate Driver: 327 years

o MOSFETS: 111 years

o LED: 18,253 years

Total MTBF: 72.85 years1

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5 Cost Analysis

5.1 Parts:

The electrical component cost for the inverter is summarized in Table 1.

Table 1: Component Cost Summary

Component Type Cost Each Quantity Needed Total Cost

.022 µF Capacitor 0.1 1 0.1

47 µF Capacitor 0.15 1 0.15

1 µF Capacitor 0.15 5 0.75

UF 1005 DICT-ND [1] Diode 0.35 3 1.05

Light Emitting Diode LED 0.1 1 0.1

33 kOhm Resistor 0.06 1 0.06

500 Ohm Resistor 0.06 1 0.06

100 Ohm Resistor 0.06 1 0.06

25 Ohm Resistor 0.06 6 0.36

.05 Ohm [2] Resistor 1.31 1 1.31

IR 21362 [3] Gate Driver Chip 4.63 1 4.63

FQP17N40 [4] MOSFET 0.96 6 5.76

         

Total Overall Cost       $14.39

5.2 Labor:

Labor cost for each partner was calculated based on the formula:

Labor Cost = (ideal salary)* (actual hours spent)*(2.5)

In addition, the labor cost for the PCB build was included. The totals are shown in Table 2.

Table 2: Labor Cost Summary

Duke Gray $30 150 $11,250

Nathan Brown $30 150 $11,250

Quasar Hamirani $30 150 $11,250

       

Total Labor Cost     $33,750

5.3 Total Cost:

The total estimated cost for this three-phase inverter project comes to: $33,764.39.11

6 Conclusions

The system component cost was kept relatively low, at $14.39. This was done by choosing cost

effective components as well as reducing the number of components used. A single IC which

incorporated six gate drives was used, and MOSFETs were used in the hex bridge for performance and

cost benefits. By making design decisions based upon cost and performance the project was able to be

completed for a reasonable price.

The efficiency and performance of the inverter meets the project specifications. It has been

determined that overall power loss in the MOSFETs accounts for the entire inverter power loss, and

power used by the gate drive and associated circuitry is negligible. Switching and conduction losses are

present in the semiconductors; however switching losses were found to be dominant in this application.

The high frequency necessary for PWM switching contributes significantly to these losses; however, the

ease in which unwanted harmonics are eliminated provides justification. Future efforts to increase the

inverter efficiency should be focused on the part selection and characteristics of the switches

themselves.

Low cost, high performance three phase inverters will soon be used in many household

appliances such as refrigerators and air conditioners. Currently the single phase motors in these

appliances are very inefficient, approximately 40%. The inverter implemented in the Future Energy

Challenge motor drive system would have an additional cost of $30 to $40 over the current inefficient

motors, when produced in large quantities. However, considering the cost savings associated with the

more efficient operation of the device, these savings will be recouped on the operational side. In fact,

the motor drive system has the potential to save $4 billion in national energy cost savings annually if

implemented in earnest.4

6.1 Future Work:

There is much work to be done in the future both on our portion and for the overall project. Part

of the failings of the 2003 project was its attempt to complete the work in too short a time frame. Much

work went into the individual components and little into the merging of said units. Thus, the inverter

team for next semester (of which we unfortunately will not be a part), shall have the task of finalizing a

PCB design which is in harmony with all other aspects of the total design framework, implement

thermal design additions, determine overall motor efficiency, and have fun accepting first prize in the

FEC 2005 contest.

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References:

[1] Jonathan Kimball, “Future Energy Challenge Fall 2004 Course Notes”, class notes for ENG 491 FEC, Depart. Of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Fall 2004.

[2] Fairchild Semiconductor, “FQP17N40 Datasheet”, December 2000, http://www.fairchildsemi.com/ds/FQ/FQP17N40.pdf

[3] International Rectifier, Appl. Notes 978 & 985.

[4] Energy Information Administration, “November 2004 Executive Summary”, December 2004, http://www.eia.doe.gov/cneaf/electricity/epm/epm_sum.html

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