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1 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
THREE DIMENSIONAL SIMULATION STUDY OF FULLY DEPLETED SILICON ON
INSULATOR MOSFET (SOI MOSFET) BY SEPARATION OF VARIABLE METHOD
Neha Goel1, Manoj Kumar Pandey
2, Bhawna agarwal
3
1(Research Scholar,SRM University NCR Campus Ghaziabad, India,[email protected])
2(Department of ECE , SRM University NCR Campus Ghaziabad,India,)
3(Assistant prof. Birla Instt of Tech. Mesra. Ext(jaipur)
)
ABSTRACT A three dimensional fully depleted Silicon-On-Insulator (SOI MOSFET) device is developed, based
on the numerical solution of three dimensional Poisson’s equation, is presented in this paper.
Separation of variable method is used to solve the three dimensional Poisson’s equation analytically
with necessary boundary conditions. In this Paper, Variation of Front Surface potential wrt channel
Length, channel Width are presented. In Addition to that threshold voltage , Electric Field and
Mobility Profiles wrt channel length and channel Width are also presented,
Keywords:
Silicon on insulator (SOI), Poisson’s Equation with boundary conditions, Front surface potential,
Threshold voltage. Mobility, Gate Width, Gate Length, Gate Oxide Thickness.
INTRODUCTION
Gain in integrability and speed are the main reason for the continuous improvements through scaling
in metal oxide semiconductor field effect transistors (MOSFETs), However Bulk CMOS will remain
as the main technology for submicron gate ULSI systems. Thin film fully depleted silicon on
insulators (SOI) MOSFETs have superior electrical performances due to better control of short
channel effects, excellent Latchup immunity, improved isolation & reduced parasitic capacitances
compared to bulk silicon technology[1].
In this paper, an analytical three dimensional model for small geometry SOI MOSFET is presented
by solving 3D poissons equation. The model is used to predict the subthreshold behavior of small
geometry MOSFET as the degradation of threshold voltage and the increase of sub-threshold swing,
are the dominant small geometry effects limiting the scaling of channel dimensions and to give
insights into device design and their scaling limits. In this paper, 3D poissons equation is solved by
separation of variables method.
SILICON ON INSULATOR (SOI) MOSFET
2 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
There are various characteristics of SOI MOSFET due to which it would be beneficial to switch to
SOI MOSFET technology. The main advantages of SOI technology are the following.
Due to insulation layer, there is no parasitic bipolar devices, As a result, latch up can be
totally eliminated.
SOI MOSFETs are having higher radiation tolerance.
Due to the insulation layer above the substrate, these devices have smaller leakage current.
These devices have high speed of operation due to the lower capacitance between device and
substrate.
Power dissipation of SOI MOSFET is small, because operated at lower voltages and current
levels [2].
There is a need to develop numerical device models for SOI-based MOSFETs as these are
suitable for circuit simulation. The analytical modeling of the threshold voltage of FD SOI
MOSFETs has already been reported by numerous authors [3]-[5].
Small device structures are difficult to described by one-dimensional or even two-dimensional
(2D) models, that’s why 3D numerical device models are developed for study of the accurate
electrical characterization of small geometry devices [7] – [8].
Fig; 1 Cross sectional view of SOI MOSFET along channel Length
Now, In order to analyze the structure shown in Fig. 1, we need to solve both Poisson’s equation and
current continuity equation. In this paper, we consider a fully depleted (FD) SOI film. The 3-D
Poisson’s equation in the FD SOI film region is given by,
2x
x y z( )d
d
2
2y
x y z( )d
d
2
2
z
x y z( )d
d
2
q Na
si
-------------------------------------------------(1)
where NA is the doping concentration and ψ(x,y,z) is the potential at a particular point (x,y,z) in the
SOI film.
The 3-D Poisson’s Equation is numerically solved by using Separation of Variable method. The
boundary conditions used for the solution of Poisson’s equation are applicable only for bulk
MOSFETs. David Esseni [9] described a mobility model also for SOI MOSFET using solution of 1D
Poisson’s equation.
3 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
POISSON’S EQUATION WITH BOUNDARY CONDITIONS
Fig. 1 illustrates a three-dimensional view of a typical MOSFET structure with corresponding device
dimensions. The source–SOI film and drain–SOI film junctions are located at y=0 and y=Leff,
respectively,where, Leff is the effective channel length. The front and back Si–SiO interfaces are
located at x=0 and x=ts, where ts is the SOI film thickness. toxf and toxb are the front and the back gate
oxide thicknesses, respectively, where the applied potential to the front and back gates are Vgf and
Vgb.The vertical and the lateral directions are defined as x and y, respectively, while the direction
along the width of the transistor is defined as z. The sidewall Si–SiO interfaces are located at z=0 and
z=W.
In general, in order to analyze this structure, we need to solve the Poisson’s equation. In this paper,
we consider a fully depleted (FD) SOI film. The Separation of variables technique is used to solve the 3D poisson’s equation analytically with appropriate boundary conditions. The 3-D Poisson’s
equation in the FD SOI film region is given by:
2x
x y z( )d
d
2
2y
x y z( )d
d
2
2
z
x y z( )d
d
2
q Na
si
------------------------------------------------------------------(1)
In order to solve equation (1), it is separated into 1D Poisson’s equation, 2-&3-D Laplace equation as :
2x
l x( )d
d
2 q Na x( )
si
----------------------------------------------------------------------------------(2)
2x
x y( )d
d
2
2y
s x y( )d
d
2
0
-----------------------------------------------------------------------------------(3)
2x
v x y z( )d
d
2
2y
v x y z( )d
d
2
2
z
v x y z( )d
d
2
0
----------------------------------------------------------------(4)
Where, Ψi=Ψl(x)+Ψs(x,y)+Ψv(x,y,z) ---------------------------------------------------------------------------------------(A)
A: Solution of Ψl(x)
li sb Esb ts xi
q
2siNa ts x
i
2
---------------------------------------------------------------(5)
B: Solution of Ψs(x,y)
s j( )1
sinh Leffj
Vs sinh y Vr sinh Leffj
y
sin x si
oxtoxf cos x
--------------(6)
4 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
Vs Vr
Vds1
1 cos ts
si
oxtoxf sin ts
iDnum
------------------------------------------------------(7)
Vr
inum1si
oxtoxf inum2
iDnum
-------------------------------------------------------------(8)
iDnum1
4 2ts sin 2ts
si
oxtoxf
21
4 2ts sin 2ts
si toxf
2 ox1 cos 2ts
-------(9)
inum1q Na
si3
1 cos ts Esbsin ts
2
Vbi sb Esb tsq
2siNa ts
2
1
Vbi sb cos ts
-----(10)
inum2q Na
si3
sin ts Esb costs
2
Esbq Na ts
si
1
2
Vbi sb sin ts
------------------(11)
C: Solution of Ψv(x,y,z)
v Psr sinh sr W Z( ) sinh sr Z sin s y Leff( )
cos s Leff sin r x si
oxtoxf r cos r x
------------(12)
PsrNsr
1 cosh sr W
-----------------------------------------------------------------------------(13)
Nsr
inum
iDnum1 cosh sr W
si
oxtoxw sr sinh sr W
sinh sr W 2si
ox toxw sr cosh sr W
si
oxtoxw sr
2
sinh sr W
----------------------------(14)
inumcos s Leff 1
s cos s Leff i1
si
oxtoxf r i2
1
cos s Leff i3
sinh r Leff Vs i4 Vr i5( )
-------------------(15)
5 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
iDnum1
4 r2 r ts sin 2 r ts
si
oxtoxf r
21
4 r 2 r ts sin 2 r ts
si toxf
2 ox1 cos 2 r ts
1
2 cos2
s Leff
Leffsin 2 s Leff
2 s
--------------------------(16)
i1q Na
si r3
1 cos r ts Esbsin r ts
r2
Vgf Vfb sb Esb tsq
2 siNa ts
2
1
r Vgf Vfb sb cos r ts
r
i2q Na
si r3
sin r ts Esbcos r ts
r2
Esbq Na ts
si
1
r2
Vgf Vfb sb sin r ts
r
i31
4 r2 r ts sin 2 r ts
si
oxtoxf r
21
4 r 2 r ts sin 2 r ts
si toxf
2 ox1 cos 2 r ts
i4
sin s Leff
r
s
r2
sinh r Leff
1s
r
2
i5
s
rcosh s Leff sinh r Leff
sin s Leff cosh r Leff
r
1s
r
2
Main Equation of Surface Potential (Ψi) can be calculated by putting values of Ψl,Ψs and Ψv in Equation A.
RESULTS
Variation of Surface Potential, Threshold Voltage, Electric Field and Mobility with respect to Channel Length
and width can be seen as below.
SURFACE POTENTIAL
The basic 3D Poisson’s equation (1) is solved using Separation of Variable Method to determine the surface
potential for fixed value of gate voltage and assumed value of the drain voltage.
The variation of front surface potential at the front Si-SiO2 interface (i.e., x=0) of a uniformly doped SOI
MOSFET for different values of channel length is shown in fig.2a.
In this figure, we determine the Variation of front surface potential for n-channel SOI MOSFETs along the
different values of channel length at the front Si-SiO2 interface and z=w/2. The values we have taken here
are: toxf=3nm ,ts=70nm, toxb=400nm, NA=1×1017/cm3 at Vgf=Vgb=0 & Vds=1.5V
6 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
0 2 108
4 108
6 108
8 108
0.6
0.8
1
1.2
1.4
Fig. 2(a)
position along channel length (y/Leff)
fron
t sur
face
pot
entia
l
i
y i
Fig.2a. Variation of the front Surface Potential along different values of the channel length at the front Si-
SiO2 interface
From this graph we found that the front surface potential decreases linearly near the source end and
increases linearly near drain end. This is due the fact that the high electric field near the drain causes
the conductivity rapidly. Due to this it is expected that the electric field near the drain end reaches
the critical field for high drain voltage and hence causes the velocity saturation.
Similarly, the variation of front surface potential at the front Si-SiO2 interface of a uniformly doped SOI
MOSFET for different values of channel width is shown in fig.2b.
In this figure, we determine the Variation of front surface potential for n-channel SOI MOSFETs along the
different values of channel width at the front Si-SiO2 interface and z=w/2. The values we have taken here
are: for toxf=3nm,ts=70nm,toxb=400nm,NA=1×1017/cm3 at Vgf=Vgb=0 & Vds=50mV
0 2 107
4 107
6 107
8 107
1 106
0
0.1
0.2
Fig.2(b)
position along the channel width (z/W)
front su
rfac
e pote
ntial
i
Zi
Fig.2b. Variation of the front Surface Potential along different values of the channel width at the front Si-
SiO2 interface
7 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
THRESHOLD VOLTAGE OF A SMALL GEOMETRY FDSOI MOSFET
The threshold voltage of the short channel MOSFET[5,11] is defined as the gate voltage at which the
minimum surface potential in the channel is the same as the channel potential at threshold for a long
channel device, i.e., at threshold.
The variation of threshold voltage with respect to Channel length and Channel Width is shown in Fig
3(a),3(b) resp,
Fig 3(a). shows the variation of threshold voltage for n-channel SOI MOSFETs with different values
of channel length having these values: Leff=1µm,toxf=10nm,toxb=400nm,toxw=15nm, for
Vds=50mV and Vgb=0V.
Fig 3(b). shows the variation of threshold voltage for n-channel SOI MOSFETs with different values
of channel width having these values: W=1.2µm,toxf=10nm,toxb=400nm,toxw=15nm, for Vds= 50
mV and Vgb=0V .
VTF of a small geometry SOI MOSFET is defined as:
VTF=Vgf when Ψ(0,y,W/2) =2φb --------------------(B)
Now, putting (B) in main Equation of surface potential, and using (5), (6)–(15), we have
VTFi
VTFO VTF1 VTFWi
---------------------------------------------------------------------------------------------(17)
Where,
VTFO Vfb 1Cs Cit
Coxf
2 bCs
Coxfsb
q Na ts
2Coxf
VT F1si
Coxf
sinh Leff Vs sinh y Vr sinh Leff y( )
VT FWi
2si
CoxfPsr sinh
sr Wi
2
sin s y Leff( )
cos s Leff r
8 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
0 2 108
4 108
6 108
8 108
0.11166
0.11168
0.1117
0.11172
0.11174
0.11176
Fig. 3(a)
channel Length
fro
nt th
resh
old
vo
ltag
e,V
TF
VTF i
y i
Fig.3(a) Variation of threshold voltage for n-channel SOI MOSFETs with respect to channel length.
Here Fig 3(a) shows that Threshold Voltage Increases linearly near the source end and Decreases
linearly near drain end.
0 5 107
1 106
1.5 106
2 106
1.5
1
0.5
0
0.5
Fig.3(b)
Channel Width
fron
t cha
nnel
thre
shol
d V
olta
ge(V
TF
)
VTF i
Wi
Fig.3(b). Variation of threshold voltage for n-channel SOI MOSFETs with respect to channel length.
9 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
ELECTRIC FIELD:
The electric field distribution along the channel length and width is also obtained and it is shown in
figures 4(a),4(b). The electric field along the length of the channel (Ey) is dominant over the electric
field along channel width (Ez)
The electric field increases rapidly near the drain end. This is due to the fact that the carrier density
near the drain end experiences a rapid decrease in surface concentration which calls for a rapid
increase in the electric field to maintain the constant drain current.
.
0 2 108
4 108
6 108
8 108
3 106
4 106
5 106
6 106
7 106
Fig. 4(a)
channel Length
Ele
ctri
c F
ield
,E
Eyi
y i
Fig.4(a).Variation of Electric Field along the length of channel
0 2 107
4 107
6 107
8 107
1 106
0
5 104
1 105
Fig. 4(b)
Channel Width
Ele
ctri
c F
ield
,E
Ezi
Zi
Fig.4(b).Variation of Electric Field along the width of channel
10 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
MOBILITY:
The value of mobility (velocity per unit electric field) is influenced by several factors. The
mechanisms of conduction through the valence and conduction bands are different, and so the
mobility associated with electrons and holes are different. As the density of dopants increases, more
scattering occurs during conduction. Mobility therefore decreases as doping increases. At low
temperatures, electrons and holes gain more energy than the lattice with increasing T, therefore
mobility increases. At high temperatures, lattice scattering dominates, and thus mobility falls.
We can find out the mobility of charge carriers from the electric field values. The mobility along
channel length & channel width is given by,
y Ey si ox --------------------------------------------------------------------------(18)
&
z Ez si ox --------------------------------------------------------------------------(19)
Where, Ey=Electric field along channel length
Ez=Electric field along channel width
εsi=silicon permittivity
εox=oxide permitivity
The mobility variation along the channel length & channel width is shown in Fig 5(a) & 5(b) resp.
Mobility is directly proportional to the electric field. So the shape of the mobility curve along the
channel length and width is same as that of the electric field curve along channel length and width
resp.
11 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
0 2 108
4 108
6 108
8 108
3 1017
4 1017
5 1017
6 1017
Fig. 5(a)
channel Length
Mo
bility
y i
y i
Fig. 5(a) Variation of mobility with respect to length of channel
0 2107
4107
6107
8107
1106
0
51019
Fig. 5(b)
Channel Width
Mob
ility
zi
Zi
Fig. 5(b) Variation of mobility with respect to width of channel
Conclusion:
A threshold voltage model for fully depleted (FD) SOI MOSFET based on numerical solution of 3-D
Poisson’s equation is presented by using Separation of variables method. The Study of Surface
potential distribution, Threshold Voltage, electric Field and Mobility is done with respect to channel
length and width in this paper.
12 Neha Goel, Manoj Kumar Pandey, Bhawna Agarwal
International Journal of Electronics, Electrical and Computational System
IJEECS
ISSN 2348-117X
Volume 3, Issue 9
November 2014
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