R970 Philips Res. Repts 32,322-337,1977

THIRTY LED POINTER-DISPLAY RIGFET CHIP

M. V. WHELAN *) and L. A. DAVERVELD

AbstractUsing the resistive-insulated-gate technique we made a steering circuitsuitable for operating a pointer display of 30 LEDs from a 16 pinpackage. The chip was made using standard n-channel silicon-gatetechnology and is only 2.2 X 1.2 mmê, The chip consists of a poly-silicon resistive steering gate, a chain of 31 Schmitt triggers, a decodingunit and 11 output IGFETs: these latter are arranged in a matrix of5X 6 and drive the LED display. A convenient method is presented foreliminating the hysteresis in the Schmitt triggers without reducing thesensitivity of the amplifiers. Results are presented on the linearity andtemperature sensitivity ofthe display. The display operated satisfactorilyfrom -80 oe to +85 oe. Results are also presented which show howthe the doping level of the resistive gate (varied using ion implantation)can be used to control the temperature sensitivity ofthe steering circuit.

1. Introduetion

There is a growing interest in simple electronic equivalents of galvanie-typemeters. These electronic meters can be divided roughly into two types, calledpointer and bar type. The first display consists for example of a row of tenor more LEDs. Only one LED lights up at any instant, its position with respectto one end of the row is proportional to an analog signal which is applied toa steering circuit connected to the LED array. The other type of display alsoconsists of a row of LEDs, but now several LEDs light up, the number beingproportional, to an analogue signal applied via some steering circuit to the rowof LEDs. In earlier work 1,2)we indicated how standard silicon-gate technologyyields very simple and attractive steering circuits which allowan analog voltageto steer either a pointer or bar display. In our previo~s work 1.2) we consideredmore or less explorative types of devices. In this present work we consider anIC we developed using the resistive-gate technique. It is suitable for a pointertype of display of up to 30 LEDs. The chip size is relatively small, includingbonding pads roughly 2.6 mm", Apart from the resistive-gate technique thechip contains a number of novel features, such as a method of eliminatinghysteresis in Schmitt trigger amplifiers without loss of sensitivity.

In section 2 we explain the layout of the chip and explain some of its salientfeatures. The next section is concerned with measurements of performance, andamong other things it will be shown that satisfactory operation is obtained from

*) Present address: Video Division, N.V. Philips' Gloeilampenfabrieken, Eindhoven, TheNetherlands.

THIRTY LED POINTER-DISPLAY RIGFET CHIP

-80°C to +85 °C. In a final section we discuss the performance and considerfuture possibilities.

2. Chip layout and principle operation

2.1. Basic elements

The basic elements of our pointer IC are shown schematically in fig. 1.Beforeconsidering the various sections in more detail, let us first consider the generalworking principle. As the input or control voltage Vin changes, the circuit allowsus to trace a path through the matrix arrangement of LEDs so that only oneLED lights up at any given instant. For example, at a certain value of Vin

the LED at the cross point of lines A and a lights up. When Vin decreasesslightly, the LED (A,a), goes out and LED (A,b) lights up; as Vin is furtherdecreased LEDs light up in the order Ac, Ad, Ae, Be, Bd, Be, Bb, Ba, Ca etc.The LEDs can in fact be arranged in a row and thus behave as a pointer display.The foregoing operation is achieved as follows. The resistive-gate electrode

has for instance 31 equally spaced tap points. Each tap point is connected toone of the chain of amplifiers. A voltage VG is applied across the resistive gate.Because of this each of the tap points is at a different potential. The amplifiersare connected in such a way that once the potentialof the tap point to the

resistive gate

I- -Idecoder output IGFETs and LED display

Fig. 1. Basic elements of pointer circuit.

323

+V

324----------------------------------------------------M_ V. WHELAN AND L. A. DAvERVELD

resistive gate drops below a certain value the output of the amplifier suddenlyswitches to a high voltage. Thus, if the input voltage Vin is monotonicallyreduced from a certain value, beginning at one end of the chain, the chain ofamplifier outputs becomes successively high. The opposite occurs when Vin isagain increased. The outputs of the amplifier chain are fed into a decoder unit:this, as we show further on, consists of a collection of IGFETs connected ina certain manner between the amplifier outputs. A number of leads continueout of the other side of the decoder and are connected to the gates of therelatively large IGFETs which in turn, are connected to the LEDs via the leadsA, B, C, D, E, F, a, b, c, d, e. As Vin changes, the sequential change of theoutputs of the chain of amplifiers is converted by the decoder into a patternwhich causes the IGFETs A,B,C,D,E,F,a,b,c,d,e to turn on, so that we are ableto traverse the matrix arrangement of LEDs in the manner described above.For instance as Vin changes, the lead to the gate of IGFET A remains highwhile the line to the gate of IGFET a becomes high; the latter becomes lowwhile the lead to the gate of IGFET b becomes high; this in turn becomeslow as IGFET c is turned on etc. In the following we consider in more detailthe arrangement of amplifiers, the decoding circuit, and finally the matrixarrangement of output IGFETs.Before explaining the type of amplifier we used in the chain connected to the

resistive gate, we shall first explain the necessity for sensitive ampifiers andshow how this is directly related to the voltage across the resistive gate and theinput-voltage change needed to traverse all positions of the pointer array. Letus define a voltage VIr such that when the potentialof the tap point on theresistive gate passes through this value the output ofthe amplifier correspondingto this tap point will change from high to low or viceversa. Let us consider twoadjacent amplifiers one has its tap point at for instance potential VIr+ ~VG,the other at VIr' For satisfactory operation of the pointer array we requirethat the one output is low and the other high. The magnitude of ~VG neededto cause an amplifier output to change state is directly related to the sensitivityof an amplifier. The potential difference between each pair of tap points on theresistive gate is alike, so that the total voltage across the resistive gate forn amplifiers is n~VG' The total change in input voltage (applied to one endof the resistive gate) to cause all the amplifier outputs to change condition isn~VG'

2.2. Schmitt trigger operation

The sensitive amplifier we chose was a Schmitt trigger. The configurationwe used is shown in fig. 2: the gate of IGFET M3 is connected to a tap pointon the resistive gate. We shall consider how the amplifier operates. The IGFETM1 behaves as a feedback resistance; M3 is much larger than M4 and M, isequal to or larger than M3' Because of the small size of M4' the current that

THIRTY LED POINTER-DISPLAY RIGFET CHIP 325

+V

Fig. 2. Layout of a Schmitt trigger amplifier using IGFETs.

can flow in the branch M4' M3' will always be much smaller than that whenM2 is on. This dissymmetry in current is essential for proper operation.Suppose that M3 is turned on so that M2 is turned off. Because of the small

current in branch M4' M3' a small voltage will be developed between the drainand source of M r- Let us now gradually decrease the potentialof M3; at acertain moment current will begin to flow through M2• Because of the largesize of M2 this current raises the potentialof the source of M3 which furtherincreases the current through M2• Thus once the potentialof the gate of M3decreases below a certain value a very rapid change will occur in the potentialof point 2.Let us now start with M3 turned off. The IGFET M2 is now fully on. As

the potentialof the gate of M3 is increased, a value will be reached when M3begins to cond uct. Because of the relatively high voltage drop across M 1 (a largecurrent flows through M2), the gate voltage of M3 will be much larger thanwhen M3 was being turned off. Once M3 begins to conduct the potentialofpoint 2 begins to drop, the current through M2 decreases, the potentialofpoint 1 decreases; this causes a further decrease in the potentialof point 2,and a rapid change of the potentialof point 2 but now from high to low willagain occur.To summarize, the output voltage of the Schmitt trigger undergoes a rapid

change, when the input voltage is increased or decreased below certain values.The difference (hysteresis) between these values and the sensitivity are inter-related; the larger M2 and/or the smaller MI the greater the sensitivity but thelarger the hysteresis.Using an inhouse 3) IGFET computer model we made computer simulations

of the Schmitt trigger configuration of fig. 2. An example together with thedevice dimensions used is shown in fig. 3. The threshold voltage (0.3 V), gateoxide thickness (0.1 [Lm),source-to-drain distance (6 [Lm)are typical for then-channel process we use. The curves of fig. 3 confirm our earlier explanation.

326 M. V. WHELAN AND L. A. DAVERVELD

8Va (v)

17

6

5

4

3

2

O2•5I

3

hysteresis

r I

3.5 4--Vi (V)

1

IGFET channel channellength(llm) width (um)

M, 6 15M2 6 60MJ 6 75M, 20 la

4.5

Fig. 3. Calculated curves for the input versus output voltage of the Schmitt trigger con-figuration shown. The IGFET parameters are given in the table in the same figure. Notethe hysteresis in the characteristics.

Although not illustrated, we found that increasing the width of M1 decreasedthe hysteresis but also reduced the sensitivity.

2.3. Elimination of hysteresis in Schmitt triggerThe arrangement shown in fig. 4 is the same as that in fig. 2 except for the

extra IGFET Ms. We will explain that when M, is turned on and off at arate rapid compared to that at which VI changes then the Schmitt trigger willonly switch about the lower of the two switching levels, for instance 2.57 Vin fig. 3.Consider a value of VI smaller than the lower switching level (i.e. VI < 2.57,

see fig. 3). Let us now momentarily turn on Ms. The output voltage Vo is now

+V

Fig.4. Configuration of a Schmitt trigger also including a reset IGFET M, used to eliminatehysteresis in the input-output to the unit.

THIRTY LED POINTER-DISPLAY RIGFET CHIP 327

low. The IGFET M3 remains switched off because the voltage on its gate isstill too small to turn it on. When we reduce the voltage on the gate of M,to its original value, IGFET M2 will turn on and the output voltage will revertto the high value it had before M, was turned on. •

Consider now VI to have a value in excess of the lower switching level. Letus again turn M, heavily on. Again the output voltage will be reduced to alow value. The feedback voltage across M1 is now also small and thus IGFETM3 will turn on, since its gate voltage is in excess of the lower switching level.When M, is turned off M3 remains conducting and IGFET M2 remains turnedoff and the output potential will remain low.To summarize, by momentarily turning on M, the upper switching level of

the Schmitt trigger is eliminated. The voltage peak applied to M, must belarger than the upper switching level (4.27 V in fig. 3) and its minimum valuemust be smaller than the lower switching level (2.57 V in fig. 3).The foregoing proposal was confirmed using a computer simulation, using

the same IGFET parameters as indicated in fig. 3, and the configuration offig. 4. IGFET M, had a gate width of 20 {Lmand a source-to-drain distanceof 6 {Lm. After momentarily turning on M, the output voltage Va returned to8V with 2.5V on the gate of M3 (lower switching level is 2.57V in fig. 3) andthe output voltage Va remained at a low level of 1.7 V with 2.6 V on the gateofM3'

2.4. Decoding circuit

In section 2.1 we have already explained the function of the decoder section.We will now consider its layout. The underlying principle can be understoodby referring to fig. 5. Shown are two units (C( and fJ) of a chain of Schmitt triggerunits which have their inputs connected to the resistive gate. Also shown arethe reset IGFETs considered earlier, and three decoding IGFETs. Let us assumethat the gates of the IGFETs M3a and M3/J are sufficiently high so that theseare conducting and the output voltages Voa and Va/J are low. Let us changethe input voltage applied to one end of the resistive gate and assume that thechange is sufficient to turn off M3a. Because of the voltage gradient along thegate the potential of the gate at the tap point for M3/J is still not sufficientlylow to cause M31l to turn off. The voltage Vaa will now be high and will turnon one of the IGFETs connected to the LEDs, for instance in fig. 1 any ofthe IGFETs A,B,C,D,E,F, or a,b,c,d,e, say IGFET a. Let us now change again,in the same direction as before, the input voltage applied to one end of theresistive gate, so that IGFET M31l can also be turned off. The output voltage Vallbecomes high. But when Vall is high IGFET M6a will be turned on; this causesthe output voltage Vaa to drop to a low value. It should be noticed that M6ain fact forms part of the Schmitt trigger cell C(; this ensures a rapid changeof Vaa• For example Vall becoming high and Voa becoming low could correspond

328 ---------------------------------------------------M. v. WHELAN AND L. A. DAVERVELD

Schmitt triggers Ireset ]GFET~ decoder

+V

Ol

+v

(3

resistive ga te

Fig. 5. Two of a chain of Schmitt trigger units with their inputs connected to a resistivegate. Also shown are reset IGFETs and decoding IGFETs.

to IGFET a in the matrix arrangement in fig. I turning off and b turning on.The other IGFETs M7a and M6P cause V02 and Vop to be reduced to zero whenanother output voltage in the chain becomes high as Vin is further changed.The actual decoding circuit we used is shown in fig. 6. With this arrangementthe inputs to the chain of Schmitt triggers starting at end 1 become sequentiallylow, then the LEDs in the arrangement in fig. 1, light up in the sequence, none,Aa, Ab, Ac, Ad, Ae, Be, Bd, Bc, Bb, Ba, Ca, Cb, Cc, Cd, Ce, De, Dd, Dc,Db, Da, Ea, Eb, Ec, Ed, Ee, Fe, Fd, Fc, Fb, Fa, none. The IGFETs used inthe decoding circuit had a gate width of 20 [Lm,and a source-to-drain distanceof 6 [Lm.The remaining part of the pointer circuit consists of the matrix arrangement

of output IGFETs which control the current through the LEDs of the display(see fig. I). The IGFETs in fig. 1 connected to the lines a,b,c,d,e, have a gatewidth of 60 urn, and a source-to-drain distance of 6 [Lm.The IGFETs con-nected to the lines A,B,C,D,E,F, have twice the gate width of the foregoing.

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THIRTY LED POINTER-DISPLAY RIGFET CHIP 329

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330 M. V. WHELAN A:ND L. A. DAVERVELD

This was done because the sources of these latter will be at a certain potentialwith respect to the substrate. For example, when current flows through aLED via IGFET A and a the potentialof the source of IGFET A will beequal to the voltage drop between the drain and source of IGFET a, plus thevoltage drop across the LED. For a supply voltage of 12 V it was estimatedthat the IGFETs a.b, etc. and A,B etc. with the foregoing dimensions wouldbe able to deliver about 4 mA to a LED.

3. Technology

. The pointer circuit described was made with an n-channel silicon gatetechnology. The polysilicon resistive gate was doped simultaneously with thesource and drain regions. Using a standard diffusion method the sheet resistivitywas chosen between 20 and 200 0/0. Figures concerning spread of the sheetresistivity were given in earlier work 1.2). Samples were also made using ionimplantation; this offered a smaller spread in the sheet resistivity of the gateacross a slice. Using ion implantation, we also made samples with sheet resis-tivities in the range from 1000 to 8000 0/0. Above 1000 % the spreadbegan to increase and became greater than 6% across three-inch slices.The higher values of sheet resistivity allowed lower values of current along

the gate. Control of the doping level offered the advantage, as we show later,of being able to control the temperature coefficient of the resistive gate, whichcould be made positive, zero, or negative.

4. Measurements

A photograph of a complete pointer chip according to the layout in fig. lisshown in fig. 7. The left side of the chip contains the resistive gate which iscoupled to a chain of 31 Schmitt triggers. The center part of the chip containsthe reset and decoding IGFETs, the right side the output IGFETs. The lattercan be divided into one group of five and another of six; these six have twicethe gate width of the others. The group of five corresponds to the a.b.c.d,e,lines in fig. 1, and the other to the lines A,B,C,D,E,F. A total of 16 bondingpads are needed to drive the chip. The bulk contact and the negative supplyleads are connected together during mounting. Using an 18 pin package wehave also done some experiments with uncoupled bulk and negative supplylead. This allows via the bulk contact additional control of the output lightlevel of the display.The photograph in fig. 7 in fact is that of a newly modified chip which was

completed during the preparation of this manuscript. This chip can operate a5 mA LED display from a 9 V supply. The set of larger output IGFETs has awidth-to-Iength ratio of 100, the set of smaller output IGFETs a ratio of 50.The bonding pads were arranged to conform to a standard factory pattern,so that the chip size is larger than necessary being 2.9x 2.2 mm. The actual

THIRTY LED POINTER-DISPLAY RIGFET CHIP

Fig. 7. Photograph of pointer chip.

331

332 M. V. WHELAN AND L. A. DAVERVELD

working chip area even with the enlarged output IGFETs is practically thesame size as that of the original chip.The original pointer circuit was combined with a number of external com-

ponents, including 30 LEDs, to yield a pointer display. The circuit layout andcomponent values are shown in fig 8. The element BZX75C2V 1 is used toraise the potentialof the chip 2.1 V with respect to ground. This enablesone end of the resistive gate to become negative with respect to the substrate.The free-running flip-flop shown inside the dotted region has one of its outputsapplied to the common reset gate ofthe Schmitt triggers. The wave-form appliedis also shown in fig. 8. As indicated, a 5 V signal is sufficient. The gate is steeredby a current source formed by the field-effect transistor BC 264 A and theresistor RI. The current can be varied by changing the value of RI' The cur-rent that flows along the gate also flows through the linear potentiometer R2•

By changing the value of R2 the potentialof the resistive gate can be variedand thus the number of inputs to the chain of Schmitt triggers which are highor low (see fig. I). This in turn regulates the position of the luminant LED inthe display. In the following sections measurements using the arrangement offig. 8 will be presented.When voltages of 2.5 V and higher were applied across the ends of the

resistive gate the behaviour of the display was extremely satisfactory. Only onelamp lit up at any time and no hysteresis was evident when the steering voltageapplied to the resistive gate was increased or decreased. The relationship be-

15 15 14 13 12 11 10 9

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I=0.75mA

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12 (D) 11 te) 10(F}"

'7 '7 ~t~~ '7 ~ ~,t ~ 't LéDdisplay

(a) 2(b) I(c) 15(d) 15(e) 14-

Fig. 8. Practical circuit layout using the pointer chip to yield a 30 LED display.

THIRTY LED POINTER-DISPLAY RIGFET CHIP 333

tween the display and the input steering voltage (potential across R2 in fig. 8)was of a staircase type, i.e. a LED remained lit up upon a certain change ininput voltage, and upon a small change 30 mV of input voltage the LED wentout and the neighbouring one lit up.An idea of the spread and the linearity of different display chips can be

obtained by referring to fig. 9. For a voltage of 5.2 V across the resistive gatethis shows the dependence of lamp position on input voltage. The results forsix arbitrary samples from the same slice are given.The linearity and temperature dependence for a single sample can be seen

by referring to figs 10 and 11. Figure 10 also shows a plot of position in the

r ..,.......:..

location ofilluminating lampin display

.~..........

...I ••:..

°0~--~---2~---3~--~4----5~--~6

_ input confrol voltage (V)

Fig. 9. The dependence of lamp position on input voltage with 5.2 V across the resistive gate.The circuit layout of fig. 8 was used. The combined results for six different samples are shown.

30

la

location ofilluminating lamp

1 20

°O~--L_--~--_L--_L--~--~2 3 4 5 6

- input cimtrol voltage (V)

Fig. 10. Plots for a single sample and two different values of voltage across the resistive gate.The circuit layout of fig. 8 was employed.

334 M. V. WHELAN AND L. A. DAVERVELD

display versus input steering voltage (voltage across R2 in fig. 8) for a voltageof 2.5 V across the resistive gate.

Somewhat more detailed measurements on a resistive gate were also done,but using a device which consisted of a resistive gate with 12 tap-off pointsfor 12large IGFETs. (The length ofthe gate across which the voltage is appliedwas 1870 !Lm and its width was 8 !Lm.) This device was described earlier 1).Table I shows the resistance measured between the gate ends on samples in

1position in display ofilluminating lamp

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Fig. 11. Behaviour of the pointer chip at different temperatures.

TABLE I

Influence of temperature on threshold voltage VT and resistivity R; of theresistive gate for a thermally diffused (no. 1) and four (nos 2, 3, 4, 5) ion-im-planted samples

resistivity s, (kQ) threshold voltage VT(V)

sample process 25°C 85 °C D..Rg 25°C 85 °C D..VTco (%)

1 thermal diffusion 8.4 8.8 5 -0.28 -0.4 -120

2 1 X 1015jcm2 ion impl. 295 253 13 +0.03 -0.08 -110

3 4 X 1015jcm2 ion impl. 34.2 33.9 1 -0.16 -0.25 - 90

4 8 X 1015jcm2 ion impl, 11.3 11.6 3 -0.22 -0.35 -130-

5 1 X 1016jcm2 ion impl, 18.1 18.3 1 +0.06 -0.1 -160

THIRTY LED POINTER-DISPLAY RIGFET CHIP

which the gate was doped using the chemical deposition and thermal diffusionstep, which defined the source and drain regions, and on four samples madeusing ion implantation. The resistivity versus ion-implantation dose (phos-phorous, 100 keV) is plotted in fig. 12. After ion implantation the samples wereannealed for 10 minutes at 1000 °C in N2 gas. This was followed by a furtherhigh-temperature gettering step and drive-in of 20 minutes at 1050°C and alow temperature (500°C) anneal step to remove surface states. As expected,the larger the dose the lower the resistivity, except for the dose of 1016/cm2,

when the resistivity again increased. We cannot explain this latter effect. Theinfluence of temperature on resistivity and threshold voltage VT( measured usingthe 12 IGFETs) for both the ion-implanted and thermally diffused samples isshown in table I. The resistivity of the thermally diffused sample exhibits apositive temperature coefficient, similar to that for bulk monocrystalline silicon.The ion-implanted samples for the two doses of 1015 and 4x 101s/cm2 exhibita negative temperature coefficient.The other two ion-implanted samples exhibita positive coefficient. It would appear possible to obtain a zero temperaturecoefficient for a dose between 4 and 8X 1015/cm2• The foregoing dependenceof its temperature coefficient of resistivity on doping level of the polycrystallinesilicon has already been reported in the literature 4.5). The effect has beenbasically explained as follows. In heavily doped polycrystalline silicon the con-duction mechanism is determined by the bulk properties of the monocrystallinegrains of silicon. The doping level is so high that the influence of surface space-charge barriers between the grains is no longer important. As the doping level

103r-------------- ~

resistivity Rg(k.t1)

I

__ implantation dose / cm2

Fig. 12. The variation of resistivity of the polysilicon resistive gate versus ion implantationdose/ern".

335

336 -------------------------------------------------------M. v. WHELAN AND L. A. DAVERVELD

is reduced the surface space-charge regions become wider and begin to influencethe current that can flow from one grain to another. It is this influence whichis assumed to be responsible for the negative temperature coefficient of theresistive gate. We measured the temperature dependence of the pointer circuitand found it was due mainly to the temperature dependence of the resistivegate. In view of foregoing results a judicial choice of doping level should eliminatethis temperature dependence. In fact since a resistive gate is the central elementin various steering circuits, by controlling the doping level of the resistive gatewe have a means of cancelling temperature dependences of the remainder ofthe IC. For instance if a resistive gate is steered by a current source in themanner of fig. 8, a judicial choice of negative temperature coefficient of theresistive gate will lead to a cancellation of the change with temperature (e.g.reduction with increasing temperature) of the threshold voltage of say a chainof IGFETs steered by the gate as for instance in fig. 4 reference 1.

5. Discussion of results

On the basis of the foregoing results the pointer array behaves satisfactorilyas far as linearity and temperature are concerned. One problem, however, hasbeen brought to our attention *). This relates to the fact that the setting of thedisplay changes with the supply voltage. For instance, in the circuit arrangementshown in fig. 8, the LED indication changes by four positions when the supplyvoltage changes from 18 to 16 V. We attribute this effect to the fact that thegate of the IGFET MI (see fig. 5) is connected directly to the supply voltage.When the latter changes, so also does the voltage across the drain and sourceof M1. This automatically alters the switching level of each Schmitt trigger, ascan be understood by referring to section 2.2. This problem can be overcomein a future design by using a polysilicon resistor instead of M1• Ion implantationallows a large value of sheet resistivity to be used, so that the space occupiedby the resistor can still be small.

We have pointed out that the temperature dependence of the display isdirectly related to the doping level of the polysilicon resistive-gate electrode.By a judicial choice of doping level (ion implantation) it should be possible toobtain display circuits capable of temperature independent operation from-90°C to +90 °C.

In a follow-up to the device described in the foregoing sections a numberof other improvements are possible. The free-running flip-flop together withcurrent sources and source followers needed to steer the resistive gate could beincluded on the same chip as the pointer, with a negligible increase in thealready relatively small chip size (2.2x 1.2 mm"), In a follow-up device **) just

*) Private communication, J. Gillian, C. A. L. Mullard Micham, England.**) In fact the photograph in fig. 7 is of this improved chip.

THIRTY LED POINTER-DISPLAY RIGFET CHIP 337

completed, the size of the output IGFETs connected to the LEDs has beenincreased by a factor of 5. This allows a smaller supply voltage to be used andalso yields a larger output current to the LEDs. Another improvement beingconsidered eliminates the need for a reset signal, which is required with theSchmitt triggers while allowing a smaller chip size and an adjustable overlapbetween the LEDs that light up in the display.With the Schmitt trigger amplifiers and the type of decoding circuit described

in the foregoing sections it is possible to select one and only one of a numberof outputs line. This characteristic could be advantageously applied in ananalog-digital converter of the type we described in earlier work. The con-verter was based on the capability of selecting a position in a read-only memorythe position being determined by an analog voltage. The output of the memoryis a combination of ones and zeros related to the analog voltage. Due to certainlimitations the arrangement described previously employed a Gray code in thememory. The Schmitt trigger arrangement and the type of decoding-circuitmethod used in the pointer circuit, however, would allow the direct use of thebinary rather than a Gray code in the memory.To conclude, we feel that this communication together with earlier ones

indicates the attractive possibilities offered by the resistive-insulated-gate tech-nique. These include a controllable temperature sensivitity, simplicity of designand a high packing density.

Acknowledgements

The authors are considerably indebted to A. P. M. van 't Hof who suggestedthe possibility of using Schmitt triggers as sensitive amplifiers. They are alsovery grateful to A. M. Velders for his help with the circuitry external to thepointer chip, and to W. D. Kasperkovitz for many helpful discussions.

Philips Research Laboratories Eindhoven, June 1977

REFERENCES1) M. V. Whelan, L. A. Daverveld and J. G. de Groot, Philips Res. Repts 30, 436-482,

1975.2) M. V. Whelan, L.A. Daverveld and J. G. de Groot, Electronics, March 18, 111-118,

1976.3) F. M. Klaassen, Philips Res. Repts 31, 71-83, 1976.4) F. D. King and J. Shewchun, D. A. Thompson, H. D. Barber, W. A. Pieczouka,

Solid-State Electronics 16, 701-708, 1973.5) J. Y. W. Seto, J. Appl, Phys, 46, 5247-5254, 1975.