Thin Gate Oxides for Improved Device Performanceneil/SiC_Workshop... · Sonrisa Research, Inc. 13th...
Transcript of Thin Gate Oxides for Improved Device Performanceneil/SiC_Workshop... · Sonrisa Research, Inc. 13th...
SonrisaResearch, Inc.
13th Annual ARL SiC MOS Workshop
Thin Gate Oxidesfor Improved Device Performance
James A. Cooper
President, Sonrisa Research, Inc.
Jai N. Gupta Professor Emeritusof Electrical & Computer Engineering
Purdue University
Dallas T. Morisette
Research Assistant Professorof Electrical & Computer Engineering
Birck Nanotechnology CenterPurdue University
SonrisaResearch, Inc.
13th Annual ARL SiC MOS Workshop
Short-Circuit Withstand Time
RL
VDDVDS
MOSFET OFF
MOSFET ON
ID
VLOAD = VDD-VDS
SonrisaResearch, Inc.
13th Annual ARL SiC MOS Workshop
Reducing the Saturation Current
RCH ,SP
=LCH
WS( )mCHW
CHCOX
VG
-VT( )
JD ,SAT
=1
2
mCHW
CHCOX
VG
-VT( )
LCH
WS( )
é
ë
êê
ù
û
úúVG
-VT( ) =
VG
-VT( )
2RCH ,SP
QN
=COX
VG
-VT( )
QN
= eOXEOX ,MAX
-QD
-QF-Q
IT
Fixed Quantities
EOX
=QSEMI
/eOX
= QN
+QD
+QF+Q
IT( )/eOX
=COX
VG
-VT( )
£ 4MV/cm= EOX ,MAX
SonrisaResearch, Inc.
13th Annual ARL SiC MOS Workshop
RCH ,SP
=LCH
WS( )mCHW
CHCOX
VG
-VT( )
JD ,SAT
=1
2
mCHW
CHCOX
VG
-VT( )
LCH
WS( )
é
ë
êê
ù
û
úúVG
-VT( ) =
VG
-VT( )
2RCH ,SP
QN
=COX
VG
-VT( )
So Here’s the Plan...
QN
= eOXEOX ,MAX
-QD
-QF-Q
IT
Fixed Quantities
EOX
=QSEMI
/eOX
= QN
+QD
+QF+Q
IT( )/eOX
=COX
VG
-VT( )
£ 4MV/cm= EOX ,MAX
• Reduce tOX and (VG– VT) by the same factor, say 4x.This keeps QN = COX (VG– VT) constant and RCH,SP constant.
• The 4x lower (VG– VT) makes the saturation current 4x lower.
• 4x lower saturation current means 4x less heat flux, so it takes4x longer to reach the same temperature during a shorted-load event.
SonrisaResearch, Inc.
13th Annual ARL SiC MOS Workshop
Bulk-Charge MOSFET Equation
VG = 23 V
19 V
15 V
11 V
7 V
5 V
LCH = 0.5 µm
SonrisaResearch, Inc.
13th Annual ARL SiC MOS Workshop
Bulk-Charge MOSFET Equation
SonrisaResearch, Inc.
13th Annual ARL SiC MOS Workshop
2-D Sentaurus Simulation
4.7x
LCH = 0.5 µm
SonrisaResearch, Inc.
13th Annual ARL SiC MOS Workshop
K F Schuegraf and Chenming Hu 1994 Semicond. Sci. Technol. 9 989
Reliability of thin SiO2
SonrisaResearch, Inc.
13th Annual ARL SiC MOS Workshop
A Simple Idea...
• Reducing the oxide thickness and gate drive voltage increasesthe short-circuit withstand time of SiC power MOSFETs withoutincreasing their on-resistance.
• Reducing the oxide thickness also reduces drain-induced barrierlowering (DIBL). This may allow the use of shorter channels(≤ 0.5 µm), reducing MOSFET channel resistance.
• What is the breakdown field, leakage current, interface statedensity, and long-term reliability of 10 – 15 nm oxides on 4H-SiC?
• How thin can we go?