Thin Film Process - Universiti Tunku Abdul Rahmanstaff.utar.edu.my/limsk/Microelectronic...

Chapter 7 UEEP2613

Microelectronic Fabrication

Thin Film Process

Prepared by Dr. Lim Soo King 23 Jul 2012

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Chapter 7 Thin Film Deposition ....................................................123

7.0 Introduction ............................................................................................ 123

7.1 Chemical Vapor Deposition .................................................................. 123 7.1.1 Kinetic of Chemical Vapor Deposition ......................................................... 126 7.1.2 Methods of Chemical Vapor Deposition ....................................................... 128

7.2 Physical Vapor Deposition .................................................................... 128 7.2.1 Evaporation ..................................................................................................... 129

7.2.2 Sputtering Deposition ..................................................................................... 134

7.3 Silicon Nitride Deposition ...................................................................... 134 7.4 Polysilicon and Epitaxial Silicon Depositions ...................................... 135

7.5 Titanium and Titanium-Tungsten Alloy Depositions ......................... 136

7.6 Tungsten Deposition............................................................................... 136

7.7 Titanium Nitride Deposition ................................................................. 137 7.8 Salicidation .............................................................................................. 138

7.8.1 Titanium Silicide and Tungsten Silicide Deposition .................................... 139

7.8.2 Tantalum Silicide Deposition ......................................................................... 140 7.8.3 Local Interconnect .......................................................................................... 141

Exercises ........................................................................................................ 142 Bibliography ................................................................................................. 142

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Figure 7.1: An atmospheric pressure chemical vapor deposition ..................................... 124

Figure 7.2: Steps involved in a chemical vapor deposition .............................................. 125

Figure 7.3: A low pressure chemical vapor deposition system ........................................ 125

Figure 7.4: Wafer surface region in CVD process showing concentrations and fluxes of reactant species .............................................................................................. 126

Figure 7.5: Schematic of an evaporation equipment ........................................................ 130

Figure 7.6: Geometry of flux and deposition from a point source on a small area of a flat wafer .............................................................................................................. 131

Figure 7.7: Deposition rate of evaporated film as a function of position on substrate for point and surface sources ............................................................................... 132

Figure 7.8: Geometry of flux and deposition from a small planar source on a small area of a flat wafer ..................................................................................................... 133

Figure 7.9: Position of placing wafer and positions of source for both point source type and surface source type .................................................................................. 134

Figure 7.10: Salicidation of titanium or cobalt ................................................................... 138 Figure 7.11: Process steps of fabricating molybdenum polycide gate ............................... 140

Figure 7.12: TiN is used to provide local short connection from diffusion region of MOSFET to a polysilicon gate ...................................................................... 142

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Chapter 7

Thin Film Deposition _____________________________________________ 7.0 Introduction Methods of thin film deposition are usually separated into two main categories, which are chemical vapor deposition CVD and physical vapor deposition PVD. In each case the silicon wafer is placed in a deposition chamber and the constituents of the film are delivered through the gas phase to the surface of the substrate where they form the film. In the case of CVD, the reactant gases are introduced into the deposition chamber and chemical reactions between the reactant gases on the substrate surface are used to produce the film. In the case of PVD, physical methods are used to produce the constituent atoms which pass through a low pressure gas phase and then condense on substrate. The methods used to produce atom flux in PVD include heating solid or molten source until it vaporized called vaporization and bombarding a solid source with energetic ion formed in plasma called sputter deposition. PVD is sometimes called vacuum deposition since very low pressure environments are required for the transport of the gaseous species from the source to the film surface. The third category for the thin film deposition is the technique of coating a wafer with liquid film that forms a solid film when heated. A fourth category includes electrolytic deposition techniques. This technique has historically been used for printed circuit board fabrication but have been extended to the deposition of copper interconnect layers. In this chapter, let’s discuss the methods of deposition, which are chemical vapor deposition and physical vapor deposition. A number of film type depositions like silicon nitride, epitaxial silicon/polysilicon, and salicidations will be discussed in details.

7.1 Chemical Vapor Deposition Chemical vapor deposition CVD is a process in which the gaseous chemical has a chemical reaction on the surface of wafer, depositing a solid byproduct on the surface as a layer of thin film. The other byproducts are gaeses that can be tapped away. CVD process is widely used in semiconductor industry for various thin film deposition such as epitaxial silicon deposition, polysilicon deposition, dielectric thin film deposition, and metal thin film deposition.

07 Thin Film Deposition

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The simplest CVD process uses an atmospheric deposition chamber and no plasma enhanced processes are used. This is approapriately called atmospheric pressure chemical vapor deposition or APCVD. The system schematic is shown in Fig. 7.1.

Figure 7.1: An atmospheric pressure chemical vapor deposition

The system is particular suitable for doped or updoped epitaxial silicon deposition, and silicon dioxide. The wafers are heated by the graphite susceptor and the susceptor is heated by RF induction coil. However, now a day low pressure CVD or LPCVD and plasma-enhanced CVD or PECVD are commonly used methods.

Although APCVD system is not commonly used in today. However, the basic CVD steps can be described using APCVD, There is a number steps, which illustrated by Fig 7.2. The steps are

1. Transport of reactant by forced convection to the deposition region. 2. Transport of reactant by diffusion from the main gas stream through the

boundary layer to the wafer surface. 3. Absorption of reactant on the wafer surface. 4. Surface processes including chemical decomposition or reaction, surface

migration to attachment sites (such as atomic level and kink), site incorporation and other surface reactions.

5. Desorption of byproduct from the surface. 6. Transport of byproduct by diffusion through the boundary layer and back

to the main gas stream.


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7. Transport of byproduct by forced convection away from the deposition region.

Figure 7.2: Steps involved in a chemical vapor deposition

Figure 7.3 shows a low pressure chemical vapor deposition system LPCVD. The wafer is stack upright and the deposition is performed at a reduced pressure. Heating is accomplished using resistive heating element wrapped around the tube, which is a hot wall reactor.

Figure 7.3: A low pressure chemical vapor deposition system


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7.1.1 Kinetic of Chemical Vapor Deposition To understand the kinetic of CVD thin film deposition would involve all the steps that already discussed earlier. However, step 2 to step 5 are usually the most important because they used to determine the rate of growth. Step 2 is a mass transfer of reactant through the boundary layer. Step 3 to step 5 can be combined together as surface reaction. Thus, one needs to consider two important processes which are the mass transfer and surface reaction and equate them under steady state condition. Figure 7.4 shows the surface region of the depositing film with appropriate concentration and fluxes in the gas phase boundary and at the surface of wafer.

Figure 7.4: Wafer surface region in CVD process showing concentrations and fluxes of

reactant species The flux of reactant species from the gas phase to wafer surface through the boundary layer F1 in molecule cm-2s-1 can be described by equation (7.1). F1 = hG(CG – CS) (7.1) (CG – CS) is the difference in concentration of the reactant species in molecule cm-3 between main gas flow and the surface of wafer. hG is the main transfer coefficient in cms-1. This flux represents the gas phase diffusion through the stagnant boundary layer that forms between a flowing gas and solid object. F2 is the flux of reactant consumed by the reaction at the surface. Assuming first order reaction kinetic, F2 can be written as


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F2 = kSCS (7.2) where kS is the chemical surface reaction rate in cms-1 and CS is the concentration of the reacting species at the surface in molecule cm-3. Under steady state reactant flux F1 is equal to F2. i.e. F = F1 = F2. Thus, the concentration of reactant species at the surface of wafer is equal to

1

G

SGS h

k1CC

−

+= (7.3)

The deposition rate ν of the film is given by equation (7.4).

N

C

hk

hk

N

F G

GS

GS ⋅+

==ν (7.4)

The deposition rate is measured in cms-1. N is the number of atoms in one unit volume of thin film. For the case of silicon deposition, the number of atom per cm3 is 5.0x1022 atom cm-3.

The mole fraction Y of the incorporating species in the gas phase is defined as

T

G

C

CY = (7.5)

CT is the concentration of all molecules in the gas phase. One example is the case of epitaxial silicon deposition by the reaction of SiCl4 and hydrogen. )g()g()g(2)g(4 HCl4SiH2SiCl +⇔+ (7.6)

Here the incorporating species is silicon Si. CG is the number of molecules of SiCl4 per cm3 in the gas phase and CT would correspond to the total number of SiCl4, H2 molecules, and any other species per cm3. Y is also equal to the partial pressure of the incorporating species PG, divided by the total pressure PTotal. Mathematically, it can be expressed by equation (7.7).

.....PP

P

P

P

C

CY

'GG

G

Total

G

T

G

++=== (7.7)


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In the example case PG is the partial pressure of SiCl4, while PG’ is the partial pressure of hydrogen H2. The partial pressure of any other gas species present such as nitrogen N2 or argon Ar used as carrier of dilute gases and any byproduct gases would also have to be added to the total pressure. Thus, the equation of the rate of thin film deposition becomes

YN

C

hk

hk T

GS

GS ⋅+

=ν (7.8)

7.1.2 Methods of Chemical Vapor Deposition There are a number of ways for CVD. Examples are low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, high density plasma chemical vapor deposition HDPCVD etc. Let’s let the student to take his/her own initiative to learn these methods.

7.2 Physical Vapor Deposition Instead of depending on chemical reaction to produce reacting species to form thin film like the case of chemical vapor deposition, physical vapor deposition can be used to deposit the film. PVD technique is generally more versatile than CVD method because it allows deposition of almost any material. The continuent species is individual atom or molecule produced by either evaporation of solid or molten source or by using energetic gaseous ion in a plasma to knock off or sputter atoms from a source target. This atom or molecule then travels though a vacuum or very low pressure gas phase, impinges on the wafers, and condenses on the surface to form film. In PVD process very few, if there is chemical reaction occurred. An exception to this is in reactive sputtering, in which a species is sputtered in the presence of a reactive gas such as nitrogen N2 and compound is formed and deposited. But in general, physical processes dominates in PVD.

Owing to very low pressure in the system, very few gas phase collision occurs. In addition, the surface reaction occurs very rapidly and very little rearrangement of atoms usually occurs on the surface of wafer. As the result, the thickness uniformity shadowing by surface topography and step coverage can be very inportant issues in PVD deposition.

Both PVD tecniques, evaporation and sputter deposition, have a long

history. Both have been used for over 100 years to coat objects with metal thin


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films. Today sputtering is dominant PVD technique but evaporation technique is still in used for some special applications.

Although evaporation and sputtering processes are physically very

different, certain behavors of the species in the gas phase are governed by the same principles. One is the phenomenon of atomic or molecular scattering and randomization during travel from the source to the substrate. Scattering occurs due to collision with atoms or molecules of vapor species and residual gas molecules in the chamber. The scattering is related to density or pressure of atoms or molecules in the gas phase and is defined by the mean free path MFP λ. From the kinetic theory of gas, the mean free path λ is defined as

2P

kT2πσ

=λ (7.9)

or

P

455.1=λ cm at room temperature and σ = 3.0o

A (7.10)

where σ is the molecular diameter, which is typically equal to 3.0o

A . P is the pressure. For typically evaporation chamber the pressure is 10-5 torr. The mean free path is long. Thus, most of atoms/molecules travel a long distance before they get scattered. For sputtering process, the pressure is typically a 0.5 torr. Thus, the atoms/molecules could get several scattering before they reach the substrate.

The scattering probability, which is also equals to fraction of atoms/molecules n/no, is fraction that scattered in a distance d during their travel in the chamber to substrate. This fraction n/no is equal to

)/dexp(1n

n

o

λ−−= (7.11)

7.2.1 Evaporation A schematic of a simple evaporator is shown in Fig. 7.5 In this process the source material is heated in a vacuum chamber which has initially been pump down to less than 10-5 torr pressure. Evaporated atom from the source condenses on the surface of the wafer. The heater can be resistance type using tungsten filament which heats up when current passes through it. More popular for


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microlectronics uses is an e-beam heater in which high energy electron beam is focused onto the source material in the crucible by magnetic field. e-beam heater is better because it has no contaminant introduce to the wafer when depositing aluminum. Tungsten filament has sodium and potassium contaminants because theses elements are used in production of tungsten filament.

Figure 7.5: Schematic of an evaporation equipment

The evaporated atom is transported through a high vacuum atmosphere. Thus, there is a little gas phase scattering. The mean free path of the atom is long and essentially the atom travels in straight line. As shown in Fig. 7.5, since the source is small, one can consider it as a point source. Thus, the evaporation rate is equal in all directions and a contour of equal flux in atom per unit area per unit time would a circular type in two dimensions or spherical type in three dimensions.

For point source, one can derive an expression for the deposition rate or growth velocity ν of the film deposited on a flat surface as a function of distance along the surface. Let’s consider the geometry of flux and deposition of a small area on the flat surface of wafer as shown in Fig. 7.6.


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Figure 7.6: Geometry of flux and deposition from a point source on a small area of a flat

wafer If Revap is the evaporation rate from a point source, r is the distance from the point source to the spot on the surface, and P

kA is the projected area of Ak facing the source, then the flux PkF that strikes the projected area is equal to

2

evapPk r

RF

Ω= (7.12)

Ω is the solid angle over which the source emits evaporated material. For a source emitting in all directions, the angle would be equal to 4π. For the source emitting only upward, the angle would be equal to 2π.

If one considers the angle of emission θi, the incoming flux PkF is normal to

the flat area Ak, the flux that strikes on this flat area is kPk cosF θ , which can be

denoted as Fk. Thus, the amount of material deposited per unit time per unit surface area is equal to equation (7.13).

k2

evapk cos

r

RF θ

Ω= (7.13)


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For a large angle, the material that is coming through the cone to strike the area P

kA must be deposited over a larger surface area Ak and the amount striking Ak per unit area is thereby decreased by cosθ. Thus, the deposition rate on the surface will decrease as the area is tilted from an orientation facing the surface.

The deposition rate or velocity on area Ak is then just the flux Fk as expressed by equation (7.13) divided by the density of the material being deposited N so that the rate of deposition for point source is equal to

k2

evap cosrN

Rθ

Ω=ν (7.14)

Equation (7.14) can be plotted as the relative or normalized deposition rate versus l/h as shown in Fig. 7.7 where l is the distance from the center of the wafer holder and h is the length of the surface normal. The graph clearly shows that the rate of deposition decreased as l/h increases.

Figure 7.7: Deposition rate of evaporated film as a function of position on substrate for point

and surface sources It is obvious that the thickest deposition is at l is equal to zero where the rate of deposition is maximum.

Evaporation is usually modeled better as a small surface area source instead of a point source. Evaporation from a small surface area behaves like the effusion of gas out a small opening from can. The outward or emitted flux is not uniform in all directions as the case of point source but is more directed and


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dependent on the projected area of the small source area toward the flux direction. Thus, the emitted flux is largest in the direction perpendicular to the source surface and less to the side. Figure 7.8 illustrates the flux to be received by a flat area on a wafer and the projected flux from the surface source. Thus, the deposition rate ν for planar source is equal to

ik2

evap coscosrN

Rθθ

Ω=ν (7.15)

Figure 7.8: Geometry of flux and deposition from a small planar source on a small area of a

flat wafer To achieve thickness uniformity over many wafers for either type source, the wafers obviosuly cannot be placed on a flat holder. The wafers are normally placed in spherical or hemispherical holder with all wafers facing inward toward the center. For point source type, the source is placed at the center of spherical or hemispherical holder. This is because θk and r will be constant giving a uniform deposition rate. For surface source, it is placed at bottom end of the spherical shape. Figure 7.9 illustrates how the wafers are being placed and the position of point source and surface source.


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Figure 7.9: Position of placing wafer and positions of source for both point source type and

surface source type 7.2.2 Sputtering Deposition Sputtering deposition requires less requirement for vacuum. It is in 1-100 mtorr for sputtering compared to < 10-5 torr for evaporation. High pressure means higher contamination, it was not commonly used method in the earlier microelectronic device. With ultra high purity of source gases and use of initial low pressure pump down, gas incorporated in sputter film was found to be greatly reduced and contamination became much less of a problem with sputtered film. It is also because inability to develop CVD method for some materials, sputter depostion is commonly used in today’s semiconductor industry.

There are a number of sputtering methods. They are dc sputter deposition, reactive sputter deposition, RF sputtering deposition, bias sputtering, magnetron sputter deposition, collimated sputtering deposition and ionized sputter deposition, high temperature or hot sputtering deposition, and etc. We shall let the student to take the initiative to study them.

7.3 Silicon Nitride Deposition Silicon nitride Si3N4 film is used primarily for two purposes namely as a mask against oxidation because diffusion of oxygen through it is very slow and as a final passivation layer on integrated circuit because it is a very good barrier against contaminants like water and sodium ion. Generally silicon nitride is not directly deposited in contact with silicon due to poor interface properties especially with regard to fixed or interface trapped charges and stress. It is normally deposited on silicon dioxide.


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Reactive sputtering of ammonia or nitrogen is the most common way to deposit this type of film. The chemical reactions are shown in equation (7.16) and (7.17). 3SiH4 + 4NH3 → C900~ 0

Si3N4 + 12H2↑ (7.16) or 3SiCl4 + 4NH3 → C1200~C550 00

Si3N4 + 12HCl ↑ (7.17) To ensure the proper stoichiometry of the film, an excess of ammonia in the ratio as much as 20:1 over the chloride or silane is used. Nitrogen can also used in place of ammonia.

Silicon nitride Si3N4 used for final passivation film must be deposited at temperature of 4500C because plasma enhanced chemical vapor deposition PECVD technique is commonly used.

7.4 Polysilicon and Epitaxial Silicon Depositions Epitaxial silicon is crystalline silicon that is deposited on top of single crystal material usually the silicon substrate. The epitaxial silicon atoms arrange themselves following the crystal arrangement of the substrate. If there is no underlying crystalline silicon is present or if the deposition conditions are not right, then amorphous or polycrystalline silicon will be formed. Epitaxial silicon is commonly deposited and used as the base of npn bipolar junction transistor in junction isolation fabrication process.

One of the processes of deposition of epitaxial silicon is deposition by chemical vapor deposition process CVD using tetrachloride SiCl4 with the necessary dopant gas. Silicon tetrachloride reacts with hydrogen to form crystalline silicon, which has chemical equation shown below.

SiCl4 + 2H2 → C12000

Si + 4HCl (7.18) Deposition of epitaxial silicon can be also achieved using low pressure chemical vapor deposition LPCVD process by thermal decomposition of silane SiH4 in hydrogen environment.

SiH4 → C600atmpshereH 02 Si + 2H2↑ (7.19)


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Polycrystalline silicon or polysilicon is the most common used material to form gate and local interconnection. It has replaced aluminum as the gate material for MOS device since the introduction of ion implantation technology in the mid 1970s. This is because polysilicon has high temperature stability, which is necessary for self aligned source/drain implantation and post implantation high temperature annealing process. An aluminum gate cannot sustain high temperature, which is more than 1,0000C, the temperature required for annealing.

Polysilicon can be deposited on arbitrary substrate and does not require exposed silicon underneath. Polycrystalline silicon is characterized by low resistivity of doped silicon. It is a process of growing another layer of doped silicon on the existing silicon dioxide or other materials. The process involved for making polycrystalline silicon is similar to that of epitaxial silicon growth. Polycrystalline silicon can be deposited using sputtering process.

7.5 Titanium and Titanium-Tungsten Alloy Depositions Titanium is often used as an under layer for contacts, vias, and interconnects because of its good adhesion to other materials. It has the ability to reduce native oxides and has good electrical contacting properties. It is usually deposited by sputtering, either using standard magnetron sputtering or by using collimated or ionized sputtering for good coverage in contact or via bottom.

Titanium-tungsten alloy Ti-W is used as the barrier metal in contact and as under layers and as anti-reflective layer in the interconnect metal. However, TiN is more commonly used today because of better thin film and barrier properties. Ti-W is deposited using magnetron sputtering usually from a single target.

7.6 Tungsten Deposition As the device shrank, the connecting via becoming too narrow that aluminum will not be able sputtered to fill the via without having void. Thus, tungsten is commonly used as contact or via metal called tungsten plug or in some cases it is used as the first level metal interconnect. However, before filling the tungsten, titanium or titanium nitride is necessary to be deposited as the barrier/adhesion layer between tungsten and silicon dioxide to prevent tungsten diffusion and film peeling.

Tungsten is usually deposited by chemical vapor deposition CVD due to very good filing ability and conformal coverage in hot wall and low pressure


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system. The temperature of the deposition is ranged from 2500C – 5000C and total pressure in 0.1 – 0.2 torr range.

Tungsten deposition can also be done by either hydrogen or silane following chemical equations.

WF6 + 3H2 → W + 6HF (7.20)

or 2WF6 + 2SiH4 → 2W + 3SiF4 + 6H2↑ (7.21)

7.7 Titanium Nitride Deposition Titanium nitride TiN is used as barrier layers in contact and as the under layers and antireflective layers in interconnects. They have mostly replaced Ti-W in the application due to better barrier and film qualities. TiN is normally deposited or formed on top of Ti film which has better contact and adhesion properties to the films underneath. TiN is normally deposited reactive sputtering method, which involves sputtering a metal in the presence of a reactive gas such as nitrogen or oxygen to form the metal oxide or nitride. High temperature CVD method can be used to deposit TiN film with titanium tetrachloride TiCl4 and ammonia NH3 at temperature 400 to 7000C via reaction shown in equation (7.22). 6TiCl4 + 8NH3 →≈ C7000

6TiN + 24HCl + N2↑ (7.22) Alternatively, titanium nitride can be deposited using low temperature metal organic CVD MOCVD process at temperature ∼3500C with tetrakis dimethylamino titanium TDMAT Ti[N(CH3)2]4.

Titanium nitride TiN deposited at higher temperature has better quality, lower resistivity, and better coverage. However, it cannot be used for via application since the process temperature is higher than the melting point of aluminum line. It can melt the already deposited aluminum line on the wafer.

Titanium nitride can also be formed by nitridation of titanium surface with

ammonia in a rapid thermal annealing RTA process.


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7.8 Salicidation Salicidation is a self align silicidation. The process covers the entire source, drain region and the top of polysilicon gate of a MOS device. This process is necessary because in the case of high speed VLSI device, the drain and source are shallow and the gate is thin. In order to reduce parasitic resistance, self-aligned silicidation process is applied to the gate electrode, and source and drain diffused layers. Moreover, even the heavily doped polysilicon has fairly high resistivity, which is about a few hundred µΩ-cm. When the dimension shrinks, the resistance of polysilicon local interconnection increases, which causes more power consumption and larger RC constant, thus, it is necessary to reduce the resistance and increase the speed. It can be done by self aligned silicidation. Figure 7.10 illustrates the process of salicide structure with titanium or cobalt.

(a) MOSFET structure

(b) Titanium or cobalt depositon

(c) Annealing to form salicide

(d) Etch to remove unreacted titanium or cobalt Figure 7.10: Salicidation of titanium or cobalt


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In the earlier day, titanium silicide TiSi2 is widely used as a silicide in VLSI integrated circuit. However, in the case of ultra-small geometry MOS device of VLSI design, using titanium silicide TiSi2 has several problems. In order to achieve low contact resistance, the grain size of titanium silicide has to be larger than 0.2µm. However, when the titanium silicide TiSi2 is made thick, a large amount of silicon is consumed during silicidation, and this causes the problems of junction leakage at the source or drain. On the contrary, if a thin layer of titanium silicide TiSi2 is deposited, agglomeration of the film occurs at higher silicidation temperature. To resolve these problems, cobalt silicide CoSi2 is chosen, which has a large silicidation temperature window for low sheet resistance and it is now widely used as silicidation material for advanced VLSI integrated circuit fabrication. 7.8.1 Titanium Silicide and Tungsten Silicide Deposition Titanium silicide TiSi2 and tungsten silicide WSi2 are common silicides used today in silicon microelectronics. Other commonly silicides include cobalt silicide CoSi2, molybdenum silicide MoSi2, nickel silicide NiSi2, and platinum silicide PtSi2. Silicides are used in CMOS technology extensively with the purpose to reduce the sheet resistance of polysilicon and n+ contact region. Silicides are often as part of the contact structure that can be on top of gate, source, and drain or in the contact hole. Silicide can also be used as local interconnects.

Cobalt silicide CoSi2 is very reactive and it forms cobalt oxide easily when it is exposed to air or moisture. Titanium nitride TiN is necessary to cap the cobalt silicide to prevent it from contacting air.

Silicide can be formed either by direct deposition of silicide or by deposition metal on top of silicon followed by the reaction between the metal and silicon to form silicide.

Direct deposition method can be done by sputtering from composite target,

co-sputtering from two targets of metal and silicon, co-evaporation of the metals, and chemical vapor deposition.

The reaction method is a commonly method used today. The metal such as

titanium is deposited by sputtering process on the exposed gate and/or source/drain regions, which are silicon. The wafer is then annealed and silicide is formed. The un-reacted metal is then etched away.


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7.8.2 Tantalum Silicide Deposition Like other metal silicide, sputtered tantalum silicide TaSi2 is also used for foming polycide gate (polysilicon-silicide) structure, which forming polysilicon gate structure and silicide at the same time. Figure 7.11 illustrates the process of forming polycide gate with molybdenum.

(a) Gate oxide

(b) Polysilicon and molybdenum silicidation

(c) Pattern polycide

(d) Salicide structure

Figure 7.11: Process steps of fabricating molybdenum polycide gate CVD tantalum silicide TaSi2 is a lower cost replacement but has not been used widely because of its complex CVD behavior. CVD TaSi2 can be deposited at 6000C using the silane reduction of TaCl5. 2TaCl5 + 4SiH4 → C6000

2TaSi2 + 3H2↑ (7.23) There is an intermediate reaction that forms Ta5Si3 when TaCl5 with silane following equation (7.23).


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10TaCl5 + 6SiH4 + 13H2 → C6000

4Ta5Si3 + 50HCl (7.24) Ta2Si3 is then reacts with silicon at TaSix-polysilicon interface to form tantalum silicide TaSi2 following chemical equation shown in equation (7.25). Ta5Si3 + 7Si → C6000

5TaSi2 (7.25) TaCl5 can also react rapidly with silicon through displacement reaction following equation (7.25). 4TaCl5 + 13Si → C6000

4TaSi2 + 5SiCl4 (7.26) This reaction is self-limiting at 150 to 250nm when silicon diffusion through the TaSi2 is insufficient to support the reaction. The displacement reaction deposits TaSi2 non-uniformly resulting jagged silicide/polysilicon interface, which causes gate oxide breakdown. In practice, a polysilicon layer of approximately 150nm is deposited first and followed by the silane reduction process, and finally annealed at temperature > 6000C so that it converts Ta-rich silicide to TaSi2.2.

LPCVD of TaSi2 can also be achieved by dichlorosilane reduction at 6500C, which is 2TaCl5 + 4SiH2Cl2 + 5H2 → C6500

2TaSi2 + 18HCl (7.27) This reaction suffers from the same silicon displacement reaction as the silane reduction. Consequently, the same three step process, which silicon deposition plus reduction reaction plus sintering is needed. 7.8.3 Local Interconnect Local interconnect that derived from salicidation described in previous section can be used to replace buried contact by making direct contact from the diffusion to the polysilicon gate forming local short interconnection. During silicidation using titanium, titanium silicide is deposited on the diffusion region and at the same time titanium nitride TiN is deposited on the exposed surface of the polysilicon gate, silicon dioxide SiO2, and TiSi2. TiN is a conductor that can be used to provide short local connection between components like the structure illustrated in Fig. 7.12. Not to forget that titanium nitride TiN is also used as a barrier material to prevent diffusion of tungsten into silicon dioxide and peeling of tungsten during via filling.


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Figure 7.12: TiN is used to provide local short connection from diffusion region of

MOSFET to a polysilicon gate Exercises 7.1. Name the two commonly methods used for thin film deposition.

7.2. Calculate the fraction of atoms/molecules suffer scattering in a chamber

of pressure 10-3 torr and travelling distance of 50cm. 7.3. Calculate the deposition rate for a CVD system I which hG = 1.0cms-1, ks

= 10cms-1, partial pressure of incorporating species = 1 torr, total pressure 760 torr, total concentration in gas phase CT = 1.0x1019cm-3, and density of depositing film N = 5x1022cm-3.

7.4. As the critical dimension of a device shrank, state the reason why aluminium is no longer suitable for contact via filling.

7.5. State the reason why cobalt silicide is a better contact material between drain/source of the MOS device not titanium silicide when the critical dimension of the device shrank to sub-micron size.

Bibliography 1. JD Pummer, MD Del, and Peter Griffin, “Silicon VLSI Technology”

Fundamentals, Practices, and Modeling”, Prentice Hall, 2000.

2. Hong Xiao, “Introduction to Semiconductor Manufacturing Technology”, Pearson Prentice Hall, 2001.

3. CY Chang and SM Sze, “ULSI Technology”, McGraw-Hill Companies

Inc., 1996.


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A

Aluminum ................................... 130 Ammonia ............................. 135, 137 APCVD

Atmospheric pressure chemical vapor deposition .................... 124

Atmospheric pressure chemical vapor deposition ....................... 124

B

Bias sputtering ............................. 134

C

Chemical vapor deposition . 123, 136 Cobalt oxide ................................ 139 Cobolt silicide ............................. 139 Collimated sputtering deposition 134

D

Dichlorosilane ............................. 141

E

e-beam ......................................... 130

H

High density plasma chemical vapor deposition ................................. 128

Hot sputtering deposition ............ 134

I

Ion implantation .......................... 136 Ionized sputter deposition ........... 134

J

Junction isolation fabrication process ...................................... 135

K

Kinetic theory of gas ................... 129

L

Low pressure chemical vapor deposition ......................... 125, 135

LPCVD Low Pressure chemical vapor

deposition .............................. 125

M

Magnetron sputter deposition ..... 134 Mean free path ............................ 129 Molybdenum silicide .................. 139

N

Nickel silicide ............................. 139 Nitrogen .............................. 128, 135 npn bipolar junction transistor .... 135

P

Physical vapor deposition ... 123, 128 Plasma enhanced chemical vapor

deposition ......................... 128, 135 Platinum silicide .......................... 139 Polycide gate ............................... 140 Polysilicon ................................... 136 Potassium .................................... 130

R

Rapid thermal annealing ............. 137 Reactive sputtering ...................... 135 RF sputtering deposition ............. 134

S

Self align silicidation .................. 138 Silane ................................... 135, 140 Silicon dioxide ............................ 141 Silicon nitride .............................. 134 Sodium ........................................ 130 Sputtering deposition .................. 134


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T

Tantalum silicide ......................... 140 TDMAT See Tetrakis dimethylamino

titanium Tetrachlorosilane ......................... 135 Tetrakis dimethylamino titanium 137 Titanium .............................. 136, 137

Titanium nitride................... 139, 141 Titanium silicide ......................... 139 Titanium tetrachloride ................. 137 Titanium-tungsten alloy .............. 136 Tungsten ...................... 129, 130, 136

V

VLSI ............................................ 139

Thin Film Process - Universiti Tunku Abdul Rahmanstaff.utar.edu.my/limsk/Microelectronic...

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