Thermal Imaging Test Chip
description
Transcript of Thermal Imaging Test Chip
Thermal Imaging Test ChipThermal Imaging Test Chip
Justin I. QuesnelJustin I. Quesnel
08/18/0508/18/05
ObjectiveObjective
Previous WorkPrevious Work
Chip DesignChip Design
Chip Test and ResultsChip Test and Results
PhotosPhotos
Q & AQ & A
OutlineOutline
Project ObjectiveProject Objective
To develop an ideal test structure to prove To develop an ideal test structure to prove the theoretical limits of subsurface thermal the theoretical limits of subsurface thermal imaging resolution with a Numerical imaging resolution with a Numerical Aperture Increasing Lens (NAIL).Aperture Increasing Lens (NAIL).
Numerical Aperture Increasing Numerical Aperture Increasing Lens (NAIL) backgroundLens (NAIL) background
Plano-convex lens of the same materialPlano-convex lens of the same material Silicon, n = 3.5Silicon, n = 3.5
Without a NAIL, 2.5um Without a NAIL, 2.5um
With a NAIL, .73um With a NAIL, .73um Lateral Resolution increaseLateral Resolution increase
by a factor of n = 3.5by a factor of n = 3.5
10X w/NAILBoston Univ.
100X objectiveConventionalState-of-the-art
Previous WorkPrevious Work
First experiment with NAIL enhancementFirst experiment with NAIL enhancement Lateral Resolution of 1.4 um Lateral Resolution of 1.4 um
LimitationsLimitations Feature size not fine enough Feature size not fine enough ElectromigrationElectromigration Unknown maximum current densityUnknown maximum current density Environment not easily controlled/measuredEnvironment not easily controlled/measured
New Chip RequirementsNew Chip Requirements
Test structuresTest structures Different materials/emissivitiesDifferent materials/emissivities Crossing and vertical lines Crossing and vertical lines Varying widthsVarying widths
Internally controlled excitationInternally controlled excitation Frequency and Pulse-widthFrequency and Pulse-width
Temperature ControlTemperature Control
Fabrication SitesFabrication Sites
TradeoffsTradeoffs Cost vs. Feature LengthCost vs. Feature Length Proprietary InformationProprietary Information Submission DatesSubmission Dates
Final DecisionFinal Decision AustriaMicrosystems AustriaMicrosystems
.35 um feature length.35 um feature length 4 metal layers, 2 poly4 metal layers, 2 poly
Software Software
CadenceCadence Design and Electrical SimulationDesign and Electrical Simulation
FemlabFemlab Thermal simulationsThermal simulations
Chip OverviewChip Overview
Chip SectionsChip Sections Samples Samples Pulse GeneratorPulse Generator Thermal NetworkThermal Network PassivesPassives
SpecificationsSpecifications 3.3mm x 3.3mm3.3mm x 3.3mm ~37,000 transistors~37,000 transistors 80 pins80 pins
Sample OverviewSample Overview
TemplateTemplate
Test structuresTest structures M1-M4, P1,P2, M1-M4, P1,P2,
DiffusionDiffusion Crossing, VerticalCrossing, Vertical
Sample – Test Structures Sample – Test Structures
Test StructuresTest Structures Varying Widths Varying Widths
Heating resistorsHeating resistors
Thermal sensorThermal sensor
Sample - ControlSample - Control
Transmission GatesTransmission Gates
Digital Control LogicDigital Control Logic
Driving TransistorsDriving Transistors Max Current DensityMax Current Density
Operating ModesOperating Modes
Pulse GeneratorPulse Generator
Frequency controlFrequency control
Pulse Width Pulse Width ModulationModulation
Test/Bypass Test/Bypass pointspoints
Thermal NetworkThermal Network
Temperature SensingTemperature Sensing Voltage and temperature Voltage and temperature
are linear with a constant are linear with a constant currentcurrent
Biasing and sensingBiasing and sensing Current MirrorsCurrent Mirrors Large mux for toggling Large mux for toggling
between thermal sensorsbetween thermal sensors
Advantage of Temperature ControlAdvantage of Temperature Control
Voltage ControlledVoltage Controlled Heating Resistors in Heating Resistors in
parallelparallel
Ambient temperature Ambient temperature Larger Blackbody Larger Blackbody
RadiationRadiation
Advantage of Pulsed ExcitationAdvantage of Pulsed Excitation
DC vs PulsedDC vs Pulsed
Varying Varying PulsewidthPulsewidth
Fault ToleranceFault Tolerance
Backup structuresBackup structures Completely isolatedCompletely isolated
Test and Bypass Test and Bypass points placed points placed around chiparound chip
Passive StructuresPassive Structures
Microscope Microscope CalibrationCalibration
All layers All layers
Pad Ring DesignPad Ring Design
Flip chip bondingFlip chip bonding Special ConstraintsSpecial Constraints Limited # of pinsLimited # of pins
Two Concentric CirclesTwo Concentric Circles AccessibilityAccessibility
Pad Design and Pad Design and ProtectionProtection
Chip TestingChip Testing
PackagingPackaging Dual Inline Packaged Dual Inline Packaged
Electrical TestingElectrical Testing WirewrappedWirewrapped Digital toggle switchesDigital toggle switches
Sample<0:3>Sample<0:3>First_res<0:3>, First_res<0:3>, Second_res<0:3>Second_res<0:3>Mode_bits<0:1>Mode_bits<0:1>Enable and control bitsEnable and control bitsAnalogAnalog
ResultsResults
Sample - TestSample - Test Passive Resistor TestingPassive Resistor Testing
Toggling through samples and resistorsToggling through samples and resistors Active Resistor TestingActive Resistor Testing
Exciting internally, viewing externallyExciting internally, viewing externally
Varying pulsesVarying pulses
Exciting externallyExciting externally
ResultsResults
Function Generator - TestFunction Generator - Test Ring Oscillator and CounterRing Oscillator and Counter Pulse-Width ModulatorPulse-Width Modulator
Bypassed using external ICsBypassed using external ICs Test and Bypass PointsTest and Bypass Points
ResultsResults
Temperature Network - TestTemperature Network - Test Individual diodeIndividual diode
Varying voltageVarying voltage
~5 Celsius delta~5 Celsius delta Diode networkDiode network
Gradient detected Gradient detected
Susceptibility to neighborsSusceptibility to neighbors
Heat sinks (~2C delta) Heat sinks (~2C delta)
Chip Testing ConclusionChip Testing Conclusion
All units functioningAll units functioning Pulse width modulator is malfunctioningPulse width modulator is malfunctioning
Easily Bypassed with external ICEasily Bypassed with external IC
Ready for next phaseReady for next phase Flip-chip bonding on a PCBFlip-chip bonding on a PCB
Near Infrared ImagesNear Infrared Images
Indium Gallium Arsenide CameraIndium Gallium Arsenide Camera 1200 nm LED array source1200 nm LED array source
Near Infrared ImagesNear Infrared Images
Metal 4 Sample ViewMetal 4 Sample View Top SideTop Side
Obstructed viewObstructed view FlippedFlipped
Near Infrared ImagesNear Infrared Images
Top View of Metal 4 lines Top View of Metal 4 lines
Near Infrared ImagesNear Infrared ImagesSubsurface view of Calibrating LinesSubsurface view of Calibrating Lines
Future Work on ChipFuture Work on Chip
Preparation for thermal imagingPreparation for thermal imaging Die polishingDie polishing Flip-Chip bondingFlip-Chip bonding Thermal image data acquisitionThermal image data acquisition
LimitationsLimitations
Potential enhancements Potential enhancements Larger die = more IO PinsLarger die = more IO Pins More elaborate temperature networkMore elaborate temperature network
Dedicated voltage control pinsDedicated voltage control pins
Wider voltage control netsWider voltage control nets
SummarySummary
Thermal Test ChipThermal Test Chip Consists of ~150 different resistive structuresConsists of ~150 different resistive structures
Digitally ControlledDigitally ControlledControllable frequency/pulsewidthControllable frequency/pulsewidthSeveral Modes of operationSeveral Modes of operationTemperature controlTemperature control
Testing and ResultsTesting and ResultsFully operationalFully operationalReady for thermal imagingReady for thermal imaging
QuestionsQuestions
Near Infrared ImagesNear Infrared ImagesSub surface Analog Section Sub surface Analog Section Current Mirrors and OpampCurrent Mirrors and Opamp
Near Infrared ImagesNear Infrared Images
Top Level Polysilicon Layer 1 SampleTop Level Polysilicon Layer 1 Sample
Near Infrared ImagesNear Infrared ImagesSubsurface view - Digital Control Subsurface view - Digital Control ~2500 transistors~2500 transistors
Near Infrared ImagesNear Infrared Images
Subsurface view Driving PMOS transistors Subsurface view Driving PMOS transistors
Near Infrared ImagesNear Infrared Images
Subsurface view Frequency Control Unit Subsurface view Frequency Control Unit