THE HONG KONG POLYTECHNIC UNIVERSITYeeserver.ee.polyu.edu.hk/FYP/FYP_201718/FT/FYP_23/FYP_23...of...

THE HONG KONG POLYTECHNIC UNIVERSITY

DEPARTMENT OF ELECTRICAL ENGINEERING

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Project ID: FYP_23

High frequency power conversion and drive for future high speed operation

by

Cheung Yan Wai

16037993D

Final Report

Bachelor of Engineering (Honours)

in

Electrical Engineering

Of

The Hong Kong Polytechnic University

Supervisor: Prof. Eric K. W. Cheng Date: 31 March 2018



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Abstract

High frequency alternating current (HFAC) has already become more popular in power

distribution systems. There is a tendency to increase the level of frequency due to its outstanding

merit. HFAC has the advantages that significant saving in component count and size, improvement

in the system response time, flexible conversion between different voltage level, and improved

efficiency. In future, the switching speed and voltage rating of IGBT and MOSFET will be further

improved, HFAC system will make the power conversion and transmission better performance.

This project proposed to simulate and construct a HFAC inverter which would be the power

source for future high-speed electric vehicles. During the process of building an HFAC inverter,

the theories such as sinusoidal pulse-width modulation (SPWM) and harmonics analysis would be

introduced and assist in calculating the voltage level and value of passive components. The details

of designing the gate drive signals, filter values, H-bridge, snubber circuit, and the selection of

power electronic components would be introduced in this report. Finally, measurements of the

circuits would be introduced and analyzed.

For further development of this project, the methods and concepts of close-loop controlled

HFAC inverter would be introduced.

In summary, this project demonstrates the design method of a HFAC inverter through theories,

calculations and simulation.



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Acknowledgement

The authors would like to thank Prof. Eric K. W. Cheng to initialize, supervise and provide

professional suggestions towards the project. Prof. Eric K. W. Cheng gave valuable comments and

suggestions related to power electronics theories on the topic.



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Table of Content

Abstract ........................................................................................................................................... 2

Acknowledgement .......................................................................................................................... 3

Table of Content ............................................................................................................................. 4

1. Introduction ............................................................................................................................. 6

1.1. Merits of HFAC system .............................................................................................. 6

1.2. Challenges to be addressed ......................................................................................... 7

1.3. Overview of the report ................................................................................................ 8

2. Objectives ............................................................................................................................... 9

3. Background ........................................................................................................................... 10

3.1. Literature review ....................................................................................................... 10

3.2. Theories..................................................................................................................... 12

3.2.1. Sinusoidal Pulse-width Modulation (SPWM) .............................................. 12

3.2.2. Harmonic Analysis........................................................................................ 14

4. Methodologies....................................................................................................................... 15

4.1. Pulse width modulation............................................................................................. 16

4.1.1. Phase correct PWM mode ............................................................................. 16

4.1.2. Fast PWM mode ........................................................................................... 17

4.2. Gate Driver Design ................................................................................................... 18

4.2.1. Bootstrap capacitor ....................................................................................... 19

4.2.2. Gate resistor .................................................................................................. 21

4.2.3. Pull-down resistor ......................................................................................... 23

4.3. Filter Design.............................................................................................................. 23

4.3.1. LC Filter ........................................................................................................ 23

4.4. Snubber circuit .......................................................................................................... 24

4.5. Simulation using PSIM ............................................................................................. 25

4.5.1. Square wave PWM inverter .......................................................................... 25

4.5.2. SPWM inverter ............................................................................................. 27

5. Results ................................................................................................................................... 31



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5.1. Square wave single phase HF inverter ...................................................................... 31

5.1.1. PWM signals from Arduino UNO ................................................................ 33

5.1.2. Measurements ............................................................................................... 34

5.1.3. Compared to simulation using PSIM ............................................................ 37

5.2. SPWM single phase HF inverter............................................................................... 38

5.2.2. Measurements ............................................................................................... 41

5.2.3. Compared to simulation using PSIM ............................................................ 45

5.3. PCB Board ................................................................................................................ 46

6. Conclusions and discussion .................................................................................................. 47

6.1. Objectives achieved .................................................................................................. 47

6.2. Further developments................................................................................................ 48

6.2.1. Closed-loop control ....................................................................................... 48

6.2.1.1. One-cycle control .......................................................................................... 48

6.2.1.2. One-cycle controlled HFAC inverter ............................................................ 49

7. References ............................................................................................................................. 51

8. Appendix ............................................................................................................................... 53

A1. Circuit diagrams ....................................................................................................... 53

A2. List of figures ........................................................................................................... 55

A3. List of Tables ........................................................................................................... 57



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1. Introduction

High frequency alternating current (HFAC) has already become more popular in power

distribution systems. For examples, the HFAC power distribution systems proposed by NASA for

space station and aerospace, HFAC replacing the traditional dc distribution system in computer

and telecommunication, electric vehicle, and renewable energy microgrid. [1] There is a tendency

to increase the level of frequency due to its outstanding merit.

1.1. Merits of HFAC system

Comparing to traditional DC power distribution system, HFAC architectures benefit from more

lightweight and compact components. The high frequency power transformer and other passive

power components are smaller than DC and line frequency AC components. The compact high

frequency transformers also provide effective electrical isolation. Furthermore, high frequency

distribution system needs fewer power conversion stages, hence lower components needed and

lower cost of power distribution circuit.

Due to high frequency of the network, the response time is shorter than lower frequency and there

is improvement in the system dynamic response. For example, comparing a 50kHz high frequency

AC to 50Hz line frequency AC, the response time of HFAC is 1000 times faster than the line

frequency. It performs faster and more accurate in controlling the electric vehicle.

In general, AC system has flexible conversion of different voltage level. An AC system leads to

simpler transformations since transformer is more straightforward than a DC-DC converter. In an

electric vehicle, there is always multiple voltage level applications. For examples, lighting system

and air conditioning. It is believed that there would be increasingly electric devices in an



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automobile in the future. Therefore, to achieve different voltage level in an automobile, AC system

is the best solution.

Since its convenience of voltage level transformation, if the selected link voltage should be higher.

Increasing the transmission voltage, which is independent of battery voltage, leads the decrease in

the machine copper volume but increase the iron volume. The machine becomes more economical

and efficient due to saving in copper wire and balance of iron loss and copper loss. The increase

of voltage rating and decrease of current rating will also economize the converter cost.

To conclude, HFAC has the advantages that significant saving in component count and size,

improvement in the system response time, flexible conversion between different voltage level, and

improved efficiency. In future, the switching speed and voltage rating of IGBT and MOSFET will

be further improved, HFAC system will make the power conversion and transmission better

performance.

1.2. Challenges to be addressed

However, there are some disadvantages of HFAC system. The power transistors and diodes need

higher switching speed. In high frequency power converter, the switching speed can be 1000 times

faster than line frequency power converter. Especially when achieving soft switching (Zero

Voltage Switching “ZVS” or Zero Current Switching “ZCS”) in the HFAC inverter, fast switching

speed is essential and one of the difficulties to design a HFAC inverter.

Another disadvantage of HFAC is the electromagnetic interference (EMI) problem will worsen.

Electromagnetic interference also called radio frequency interference when in the radio frequency

spectrum. It is a disturbance generated by external source that interferes an electrical circuit by

electromagnetic induction, electrostatic coupling, or conduction. In short, electromagnetic



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radiation is generated by any change in the flow of electric current. The noise disturbance would

affect the performance of the HFAC inverter.

Considering an AC system, skin effect is always a consideration during design stage. Skin effect

is the tendency of an AC current flows mainly at the outer side of the conductor. Skin effect is also

called the AC resistance, which only consists in AC conductor. The loss in skin effect is

proportional to the AC frequency. Therefore, it is important to choose appropriate transmission

wire in the HFAC bus.

To conclude, there are some disadvantages of HFAC and challenges to be encountered when

designing the HFAC system. The switching speed of power semiconductors, the electromagnetic

interference and selection of transmission wire are the main consideration of HFAC design.

1.3. Overview of the report

In this report, Chapter 2 introduces the objectives of project. Chapter 3 explains the literature

review and how other people implement a HFAC system. There are some theories related to the

topic would be explained. Chapter 4 would introduce the process of designing and calculating the

power electronics components. Chapter 5 is the results and measurements of implemented HFAC

inverter. The results are then compared to simulation and analyzed. Chapter 6 would be discussed

with the achieved objectives and further developments.



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2. Objectives

This project is proposed to build a high frequency alternating current power source for future high-

speed electric vehicles. The project is mainly focused on building a HFAC inverter and improving

the efficiency and stability of the system.

The following are the objectives of this project:

To develop a high frequency inverter

Input voltage: 150V

Output voltage: 100Vrms

Output frequency: 80kHz

Power rating: 100W

To simulate a single-phase inverter

To study characteristic of high frequency AC system

To analyze power efficiency

To design a control circuit and mathematical model for analysis



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3. Background

3.1. Literature review

High frequency alternating current has already been discussed in many journal articles due to its

outstanding merits.

Liu, Cheng, and Zeng [1] invent a new modulation control method for optimized synchronization

of parallel resonant inverters in high frequency power system called as unified phase-shift

modulation (PSM). It is proposed to integrate the regulations of magnitude and phase. The unified

PSM in steady state completely removes the modulation coupling between magnitude and phase

so that the controllers of magnitude and phase can be independently accomplished without

interactions. [1] Phase Shift Modulation is one of the technique dealing with the transistor gate

control signals. In this journal, it introduces the different PSM methods, including Traditional PSM,

Symmetrical PSM, and Unified PSM proposed by the authors. The article also provides the method

of synchronization of two parallel inverter output waveform.

In these years, connecting resonant inverters in series or parallel is common in many high

frequency power sources. However, these topology design and control scheme are complicated.

Liu and Cheng [2] presented a modified input-parallel-output-series (IPOS) topology with the

unified resonant tank to boost output capacity and optimize synchronization. The input parallel

design meets the high power capacity in vehicle application. The series output design is an

effective alternative to increase output power. The main feature of the proposed IPOS topology

improves output synchronization, eliminates circulation current, and reduces the transmission

losses. The IPOS topology is a suitable solution to relatively long distance transmission wire inside

an electric vehicle since it boosts the output voltage.



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Figure 3.1 - Modified IPOS topology of interleaved circuit [2]

Apart from those newly invented topologies and control methods, Antaloae, Marco, and Vaughan

[3] introduce the normal HFAC power source concept for electric vehicle auxiliary electrical

systems. In Figure 3.2, the schematic represents a HFAC power generation system. It includes the

alternator, auto battery, resonant network, MOSFET H-bridge, resonant tank and the MOSFET

gate control circuit.

Figure 3.2 - Proposed power supply for vehicle auxiliaries [3]



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In the article, it discusses about the analysis methods of each network. For example, it represents

the resonant network to a Laplace domain transfer function of second order system. The

mathematical model is used to determine the capacitor value and inductor value. To conclude, the

authors introduced the design and control method of HFAC inverter using Laplace domain analysis

and transfer functions.

Figure 3.3 - Simplified representation of resonant circuitry and transfer function [3]

There are also some journal articles which compare the merits and disadvantages of HFAC. Bose,

Kim, and Kankam [4] introduce a comprehensive analysis between traditional DC distribution

system and HFAC system for future advanced electric vehicle. Masrur, Sitar, and Sankaran [5]

compared the issues of various tradeoffs, which are related to cost, size, and overall system

performance to the existing DC system in automobile.

In conclusion, HFAC benefits more than the traditional DC system in existing automobile. The

increasing level of technology on semiconductor, speed of vehicle, and power demand of electric

vehicle auxiliary system leads a trend to implement HFAC power system in electric vehicle in the

future.

3.2. Theories

3.2.1. Sinusoidal Pulse-width Modulation (SPWM)

Figure 3.4 – General SPWM waveform



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SPWM is the most popular method to control inverter transistor switches. Using SPWM technique,

the output voltage is not only varied but also modulated be sinusoidal so that the low order

harmonics of the output voltage are eliminated. SPWM for single phase inverters can be achieved

by comparing a sinusoidal modulation signal and a carrier signal which is a sawtooth or triangular

wave. Comparing these two signals, gate signal of the inverter transistor switch, which are

MOSFETs or IGBTs, are generated. The frequency of the modulation signal should equal to the

frequency of output voltage. The carrier signal frequency should be over 20 times higher than the

modulation frequency. The modulation signal and carrier signal are connected to a comparator.

To calculate SPWM output voltage waveform, the amplitude modulation ratio of the inverter is

the ratio between output voltage to input voltage and the ratio between modulation peak voltage

to carrier peak voltage. The amplitude modulation ratio, M, is defined as:

M = 𝑀

𝐶

= 𝑂

𝑉𝑖𝑛

where 𝑀 is the peak voltage of modulation signal,

𝐶 is the peak voltage of carrier signal, and

𝑂 is the peak value of output voltage of inverter.

The frequency modulation ratio, 𝑀𝑓, of the inverter is defined as:

𝑀𝑓 = 𝑓𝐶

𝑓𝑀

where 𝑓𝐶 is the carrier frequency, and

𝑓𝑀 is the modulation frequency.



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The instantaneous output voltage of the inverter is:

𝑣𝑜 = 𝑀𝑉𝑖𝑛sin𝜔𝑀𝑡 + ℎ𝑖𝑔ℎ 𝑜𝑟𝑑𝑒𝑟 ℎ𝑎𝑟𝑚𝑜𝑛𝑖𝑐𝑠

To conclude, the amplitude modulation ratio (M) is used to define the modulation voltage and

carrier voltage. The frequency modulation ratio (𝑀𝑓) is an index to determine the harmonics of

output voltage. The higher frequency modulation ratio gives the lower harmonic distortion. Finally,

the instantaneous output voltage is composed of the fundamental component, which its frequency

is equal to the modulation frequency, and high order harmonics.

3.2.2. Harmonic Analysis

The instantaneous output voltage of the inverter has the equation that, 𝑣𝑜 = 𝑀𝑉𝑖𝑛sin𝜔𝑀𝑡 +

ℎ𝑖𝑔ℎ 𝑜𝑟𝑑𝑒𝑟 ℎ𝑎𝑟𝑚𝑜𝑛𝑖𝑐𝑠, which can be analysed by Fourier series. Fourier series is the way to

represent a periodic function into sum of sinusoidal function. The Fourier series of a function 𝑓(𝑥)

can be represented by:

𝑓(𝑥) = 𝑎0

2+ ∑ 𝑎𝑛 cos(𝑛𝑥) + ∑ 𝑏𝑛sin (𝑛𝑥)

∞

𝑛=1

∞

𝑛=1

Applying Fourier series to electrical voltage waveform, 𝑎0 is the DC offset value, 𝑎1and 𝑏1 are the

fundamental components, and 𝑎𝑛, 𝑛 ≠ 1 are the nth harmonic components.

Another commonly used measure of harmonic distortion of a waveform is called the total harmonic

distortion (THD), which is defined as the ratio of total rms value of harmonic components to the

rms value of the fundamental component:



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THD =

√∑ 𝑉(𝑛)2∞

𝑛=2

𝑉(1)

4. Methodologies

The proposed system can be represented by the schematic diagram in Figure 4.1. The high

frequency power conversion system is composed of a DC bus, H-bridge, Filter, HFAC bus, and

the load.

The system is supplied by a 150V DC source, which is the automobile battery. H-bridge DC/HFAC

inverter is connected between the DC source and the HFAC bus. The high order harmonics of

switching waveform are filtered by the inverter output low-pass filter. The HFAC bus voltage can

be stepped down and rectified to different voltage level for different load.

Figure 4.1 – Schematic of HFAC system

In table 4.1, here is the proposed specification of the DC/HFAC inverter and list of components.

The proposed input voltage in 150VDC. The rating of the DC/HFAC inverter are designed to be

100W power rating with 100Vrms, 80kHz output. The parameters such as the frequency of control



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signals, the modulation ratios, and the capacitors and inductors values are determined in the

simulation section.

Specifications

Input voltage: Vin = 150VDC

Output voltage: Vo = 100Vrms

Operation frequency: fo = 62.5kHz

MOSFET Driver IR2110

MOSFETs 2SK3567

Bootstrap diode 1N4148

Bootstrap capacitors 4.7uF, 0.3nF

Filter inductor 4.7uH

Filter capacitors 33nF x4, 4.7nF

Table 4.1 - Specifications of DC/HFAC inverter and list of components

4.1. Pulse width modulation

4.1.1. Phase correct PWM mode

The pulse width modulation signals are generated by Arduino UNO microcontroller board. There

are three timers in ATmega328P. The program used timer 2 in phase-correct PWM mode to

generate high frequency PWM signals. Timer 2 manage pin3 and pin 11 and the specific registers

for Timer 2 are TCCR2A, TCCR2B, OCR2A, and OCR2B.

TCCR2A is used to choose the mode of PWM, for examples fast PWM mode and phase correct

PWM. TCCR2B is the register to choose the prescaler of the timer which is used to calculate the

frequency of PWM signals. The highest frequency can be achieved by Timer 2 in phase correct

PWM mode is 16MHz/ 256/ 1 = 62500Hz. The prescaler is 1. Finally, OCR2A and OCR2B are

used to set the duty ratio of Pin 3 and Pin 11 signal. Since Timer 2 is a 8-bit timer, the values of

OCR2A and OCR2B are 0 to 255.



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Therefore, the switching frequency can be set to 7 different values,

Setting Divisor Frequency

0x01 1 16MHz/ 256/ 1 = 62500Hz

0x02 8 16MHz/ 256/ 8 = 7812.5Hz

0x03 32 16MHz/ 256/ 32 = 1953.13Hz

0x04 64 16MHz/ 256/ 64 = 976.56Hz

0x05 128 16MHz/ 256/ 128 = 488.28Hz

0x06 256 16MHz/ 256/ 256 = 244.14Hz

0x07 1024 16MHz/ 256/ 1024 = 61.04Hz

Table 4.2 – Divisor setting and corresponding frequencies

Figure 4.2 – PWM signal generation program in phase correct PWM mode

4.1.2. Fast PWM mode

Although phase correct PWM mode can generate two anti-phase PWM signals, it has the limitation

that the highest switching frequency is only 62500Hz. There is another mode of Arduino timer

called fast PWM mode which allows user to set the prescaler of timers to 1. The maximum

switching frequency can be up to 16MHz. In figure 4.3, there is the code which utilized Timer0



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and Timer2 to generate two different switching frequency PWM signals. Timer0 is used to

generate a 769kHz PWM signal and Timer2 is used to generate an 80kHz PWM signal.

Figure 4.3 - PWM signal generation program in fast PWM mode

4.2. Gate Driver Design

Gate driver is an essential component in a MOSFET control circuit. As the MOSFET requires

certain level of gate-to-source voltage to switch in high speed, the voltage level from a control

circuit (typically 5V or 3.3V) may not be enough to drive the MOSFET. Therefore, a gate driver

is connected between the control signal and the gate.

Apart from amplifying the control signal, the gate driver also provides galvanic isolation to avoid

electrical contact between control circuit and power circuit.



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In this project, IR2110 high and low side driver is used. IR2110 is a combined high and low side

gate driver, which provides floating channel for bootstrap operation. It can be used to drive N-

channel power MOSFET or IGBT up to 500V.

Figure 4.4 - Typical connection of IR2110 high and low side driver

4.2.1. Bootstrap capacitor

The bootstrap capacitor CBOOT is connected to the high side floating supply pin of gate driver. It is

charged every time the low side driver is on and the output pin is below the logic supply voltage,

VDD of the gate driver. The bootstrap capacitor is discharged when the high side MOSFET is turned

on. To calculate the bootstrap capacitance, it is needed to first determine the maximum voltage

drop when the high side MOSFET is ON.

The maximum allowable voltage drop is calculated by,

𝛥𝑉𝐵𝑂𝑂𝑇 = 𝑉𝐷𝐷 – 𝑉𝐹 – 𝑉𝐺𝑆,𝑀𝐼𝑁

where 𝑉𝐷𝐷 is the logic supply voltage, 𝑉𝐹 is the bootstrap diode forward voltage drop, and 𝑉𝐺𝑆,𝑀𝐼𝑁

is the minimum gate-to-source voltage of the MOSFET.

The value of bootstrap capacitor is calculated by the total amount of charge supplied by the

capacitor, 𝑄𝑇𝑂𝑇𝐴𝐿 divided by the maximum allowable voltage drop, 𝛥𝑉𝐵𝑂𝑂𝑇,



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𝐶𝐵𝑂𝑂𝑇 = 𝑄𝑇𝑂𝑇𝐴𝐿

𝛥𝑉𝐵𝑂𝑂𝑇

and the total amount of charge supplied by the capacitor, 𝑄𝑇𝑂𝑇𝐴𝐿 is calculated by,

𝑄𝑇𝑂𝑇𝐴𝐿 = 𝑄𝐺𝐴𝑇𝐸 + (𝐼𝐿𝐾𝐶𝐴𝑃 + 𝐼𝐿𝐾𝐺𝑆 + 𝐼𝑄𝐵𝑆 + 𝐼𝐿𝐾 + 𝐼𝐿𝐾𝐷𝐼𝑂𝐷𝐸) × 𝑡𝑂𝑁 + 𝑄𝐿𝑆

where 𝑄𝐺𝐴𝑇𝐸 is total gate charge, 𝐼𝐿𝐾𝐶𝐴𝑃 is bootstrap capacitor leakage current, 𝐼𝐿𝐾𝐺𝑆 is switch

gate-to-source leakage current, 𝐼𝑄𝐵𝑆 is bootstrap circuit quiescent current, 𝐼𝐿𝐾 is bootstrap circuit

leakage current, 𝐼𝐿𝐾𝐷𝐼𝑂𝐷𝐸 is bootstrap diode leakage current, 𝑡𝑂𝑁 is high side switch on time, and

𝑄𝐿𝑆 is charge required by the internal level shifter.

Gate Driver IC = IR2110

Switching Device = 2SK3567

Bootstrap Diode = 1N4148

VDD = 5V

VF = 1V (1N4148)

VGS,MIN = 2V (2SK3567 Minimum gate threshold voltage)

QGATE = 10nC (2SK3567)

ILKCAP = 3µA (Rubycon YXA Series Electrolytic Capacitor)

ILKGS = 100nA (Typical)

IQBS = 120µA (Typical)

ILK = 50µA (Typical)

ILKDIODE = 25nA (1N4148)

tON = 50% × 1 / 62500 = 8µs

QLS = 3nC (Set to 3nC for all HV gate drivers)



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𝛥𝑉𝐵𝑂𝑂𝑇 = 𝑉𝐷𝐷 – 𝑉𝐹 – 𝑉𝐺𝑆,𝑀𝐼𝑁 = 5 - 1 - 2 = 2V

𝑄𝑇𝑂𝑇𝐴𝐿 = 𝑄𝐺𝐴𝑇𝐸 + (𝐼𝐿𝐾𝐶𝐴𝑃 + 𝐼𝐿𝐾𝐺𝑆 + 𝐼𝑄𝐵𝑆 + 𝐼𝐿𝐾 + 𝐼𝐿𝐾𝐷𝐼𝑂𝐷𝐸) × 𝑡𝑂𝑁 + 𝑄𝐿𝑆

= 10nC + (3µA + 100nA + 120µA + 50µA + 25nA) × 8µs + 3nC

= 14.385nC

CBOOT = QTOTAL / ΔVBOOT = 14.385nC /2V = 7.1925nF

Therefore, a minimum 7.1925nF capacitance is required to charge the bootstrap circuit. The actual

capacitance value should be tested by simulation or trial and error. In practice, the larger bootstrap

capacitance gives a better performance of the bootstrap circuit.

4.2.2. Gate resistor

A gate resistor should be located between the output of the gate driver and the input of the

MOSFET. The gate resistor limits the gate charging and discharging current. The gate resistor will

influence the switching speed of the MOSFET. Besides, a gate resistor is necessary in a gate drive

circuit since it limits peak gate current to protect the driver output stage, prevent gate ringing, and

avoid parasitic turn-on by carefully choosing gate resistance.

Figure 4.5 - Equivalent circuit of gate resistor and stray capacitors



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The average gate current, 𝐼𝑔(𝑎𝑣𝑔) and turn-on gate resistor, 𝑅𝑔(𝑜𝑛) are calculated by,

𝐼𝑔(𝑎𝑣𝑔) = 𝑄𝑔𝑠 + 𝑄𝑔𝑑

𝑡𝑆𝑊(𝑜𝑛)

𝑅𝑔(𝑜𝑛) = 𝑉𝐷𝐷 + 𝑉𝑔𝑠

𝐼𝑔(𝑎𝑣𝑔)

where 𝑄𝑔𝑠 is gate-source charge, 𝑄𝑔𝑑 is gate-drain charge, and 𝑡𝑆𝑊(𝑜𝑛) is turn on switching time.

Qgs = 10nC (2SK3567)

Qgd = 6nC (2SK3567)

tsw(on) = 45ns (2SK3567)

VDD = 5V

Vgs = 4V (2SK3567)

Ig(avg) = (Qgs + Qgd) / tSW(on) = (10n + 6n) / 45n = 0.3556A

Rg(on) = (VDD + Vgs) / Ig(avg) = (5 + 4) / 0.3556 = 25.3125Ω

Therefore, the minimum turn-on gate resistor is 25.3125Ω. Apart from considering the MOSFET

gate charge and charging current, the ringing effect and the switching speed are also the

consideration of sizing a gate resistor. The actual value of gate resistor should be confirmed after

simulation and trial and error of the circuit.



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4.2.3. Pull-down resistor

Figure 4.6 – Gate resistor and pull-down resistor

After determining the value of gate resistor, the value of pull down resistor which is connected

between gate and source of the MOSFET needed to be determined. In case of ideal MOSFET,

there should be zero current flows while the transistor is off. However, there is leakage current

which could charge the gate capacitance of the MOSFET and affects the operation of it. To avoid

this, a pull-down resistor, Rgs, is connected between gate and source. The value of pull-down

resistor should be much higher than the gate resistor, Rg, since to minimize the gate drive voltage

supplied from the gate driver. The gate-to-source voltage is calculated by,

𝑉𝑔𝑠 = 𝑉𝑜𝑢𝑡,𝑑𝑟𝑖𝑣𝑒𝑟 × 𝑅𝑔

𝑅𝑔 + 𝑅𝑔𝑠

As the gate resistor value will be chosen less than 100Ω, the pull-down resistor is designed to be

22kΩ.

4.3. Filter Design

4.3.1. LC Filter

To eliminate the high order harmonic of the HFAC output voltage, a LC low-pass filter is added

to the inverter output terminals. A low-pass filter passes signals with a frequency lower than a



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certain cut-off frequency and eliminates signals with frequencies higher than the cut-off frequency,

which is determined by values of L and C. The effect of the resistance is damping. For the proposed

LC low-pass filter, the cut-off frequency is defined as,

𝑓𝐶 = 1

2𝜋√𝐿𝐶

In the experiment, the switching frequency is 62.5kHz and 4.7µH inductor is used.

𝐶 < 1

(2𝜋𝑓𝐶)2 × 𝐿=

1

(2𝜋 × 62.5𝑘)2 × 47𝜇= 137.97𝑛H

Therefore, the filter capacitance value should be smaller than 137.97nH to achieve the LC filter

cut-off frequency.

4.4. Snubber circuit

Figure 4.7 – MOSFET connected with RC snubber

A snubber is usually installed in switching circuit to eliminate the transient states. In the case of

switching H-bridge MOSFET configuration, the source and drain parasitic inductance has negative

effect on the switching waveform, especially in high frequency switching signal (impedance of an

inductor is jωL). Since this project is working on high frequency, the parasitic inductance on

jumper wire, connection wire, and the bread board may affect the performance of inverter. The



25

stray inductance would induce reverse recovery current and voltage overshoot while the

MOSFETs are switched in high speed.

To eliminate the voltage overshoot, a RC snubber is installed near each MOSFET. The snubber

capacitor value and resistor value are selected to be 33nF and 470Ω respectively.

4.5. Simulation using PSIM

4.5.1. Square wave PWM inverter

Figure 4.8 - Single phase full-bridge inverter with square wave PWM

Input voltage 15V

Input capacitor 47µF

Rds(on) of MOSFET 1.7Ω

Filter inductor 47µH, ESR = 0.5Ω

Filter capacitor 33nF

Load 100Ω

Switching frequency 62500Hz

Duty ratio 0.5

Table 4.3 – Specifications of square wave PWM inverter simulation



26

A single phase full-bridge inverter with square wave gate drive signal is simulated using PSIM.

The circuit consists of a square wave which connected to the MOSFETs through on/off controllers.

The circuit also considered the drain-source turn-on resistance of 2SK3567 and the equivalent

series resistance of 47µH inductor. In figure 4.5, there are the waveform of output voltage, filtered

output voltage, input current, and output current. Finally, a 100Ω load resistor is connected parallel

to the capacitor.

Figure 4.9 - Simulation results: (a) Output voltage and Filtered output voltage, (b) Input

current, (c) Output current

Figure 4.10 – Average value and RMS value of the waveforms



27

As a result of simulation, Vin = 15V, Iin,avg = 0.2077A which is a pulsating DC current, Vout,rms

= 15.55V, and Iout,rms = 0.1555A.

4.5.2. SPWM inverter

An open-loop DC/HFAC inverter is simulated by PSIM. A 60Vp-p, 30VDC offset, 800kHz carrier

signal and a 20Vpeak, 80kHz modulation signal are connected to two op-amp comparators. The

comparators are then connected to the gate drivers of 4 MOSFETs respectively.

While the sinusoidal modulation signal is larger than the triangular, the first comparator outputs a

high voltage and vice versa. The first comparator generates the gate drive signal of T1 and T2. The

output signal of second comparator is complement inverse of the first comparator and it is

connected to the gate driver of T3 and T4.

To design the simulation parameters, there are some calculations based on the inverter

specifications. The input DC voltage is 150V and the proposed output HFAC voltage is 100Vpk,

80kHz.

Apply the formula of amplitude modulation ratio,

M = 𝑀

𝐶

= 𝑂

𝑉𝑖𝑛=

100

150= 0.6667

Therefore, the ratio of modulation signal peak voltage to carrier signal peak voltage should be

0.6667. In the following simulation, 20Vpk sinusoidal modulation signal and 30Vpk triangular

carrier signal are applied.

To design the frequency of modulation and carrier signal, it is known that the modulation

frequency is equal to the output frequency of inverter. Therefore, modulation frequency, fc, is

equal 80kHz. The typical frequency modulation ratio is larger than 20 for eliminating the low order



28

harmonics. Since extremely high frequency signal is difficult to implement in reality, assume

frequency modulation ratio, Mf = 10 in the simulation. Apply the formula of frequency modulation

ratio,

𝑀𝑓 = 𝑓𝐶

𝑓𝑀

𝑓𝐶 = 10 × 80𝑘 = 800𝑘𝐻𝑧

To reduce harmonics of the output voltage, SPWM method with two modulation signals is applied.

In figure 4.11, the modulation signals V_mod1 and V_mod2 have 180-degree phase difference

which also implies that V_mod1 is an inverse of V_mod2.

Using this SPWM method, the output voltage has two voltage pulses in one switching period. In

figure 4.12(a), two modulation signals and the carrier signal are shown. Figure 4.12(b) and (c)

show the gate drive signals of T1 & T2, and T3 & T4 respectively. As a result, figure 4.12(d)

shows that the output voltage of the inverter is unipolar and has double switching frequency

compare to carrier signal.

Finally, to further eliminate the high order harmonic of the HFAC output voltage, a RLC low-pass

filter is added to the inverter output terminals. A low-pass filter passes signals with a frequency

lower than a certain cut-off frequency and eliminates signals with frequencies higher than the cut-

off frequency, which is determined by values of L and C. The effect of the resistance is damping.

For the proposed RLC low-pass filter, the cut-off frequency is defined as,

𝑓𝐶 = 1

2𝜋√𝐿𝐶

In the simulation, the cut-off frequency should be a little larger than 80kHz.



29

Assumed C = 4.7uF,

𝐿 < 1

(2𝜋𝑓𝐶)2 × 𝐶=

1

(2𝜋 × 80𝑘)2 × 4.7𝜇= 842.1𝑛𝐻

Therefore, the 820nH filter inductor is used in the simulation.

Input DC Voltage 150V

Carrier Signal, VC 30Vpk, 800kHz

Modulation Signal, VM 20Vpk, 80kHz

Modulation Index, M 0.6667

Frequency Modulation Ratio, Mf 10

Transformers 100:12, 100:5

Input DC Link Capacitor Cin = 330uF

Output DC Link Capacitor Cout = 220uF

RLC Filter Lf = 1.38µH, Cf = 4.7uF, Rf = 0.8Ω

Table 4.4 - Specifications of SPWM inverter simulation

Figure 4.11 - Single phase full-bridge inverter with SPWM



30

Figure 4.12 - Simulation results: (a) Carrier signal and Modulation signals, (b) Gate drive

signals of MOSFET 1 and 2, (c) Gate drive signals of MOSFET 3 and 4, (d) Filtered HFAC

voltage, (e) Rectified 12VDC output, (f) Rectified 5VDC output

Figure 4.13 - Simulated HFAC voltage in frequency domain



31

5. Results

5.1. Square wave single phase HF inverter

Figure 5.1 –Circuit diagram of square wave PWM HFAC inverter

Element Value Units Number of units Reference

Capacitors 4.7 µF 2 Electrolytic, 100V

47 µF 2 Electrolytic, 100V

0.3 nF 2 Ceramic

20 µF 2 Ceramic

33 nF 5 Metalized polyester, 250V

Inductors 47 µH 1 2A

Resistors 1000 Ω 2

100 Ω 4

22 kΩ 4

470 Ω 4

Diode 2 1N4148

4 FR107

MOSFET 4 2SK3567

Driver 2 IR2110

Table 5.1 – Resume of components



32

Figure 5.2 –Square wave PWM HFAC inverter circuit implemented on breadboard

To begin with, the HFAC inverter circuit is implemented on a breadboard. The value of gate

resistor, pull-down resistor, RC snubber, and filter are first designed.

Gate resistor: 100Ω

Pull-down resistor: 22kΩ

Snubber resistor: 470Ω

Snubber capacitor: 33nF

Filter inductor: 47µH

Testing conditions: Input voltage: 10V

Figure 5.3 – Testing input voltage = 10V

Besides, the input of IR2110 gate driver is connected to the Arduino UNO, which generates

controllable PWM signals to drive the MOSFETs.



33

5.1.1. PWM signals from Arduino UNO

Figure 5.4 – (a) 61Hz PWM signals from Arduino UNO, 50% Duty Ratio (Left),

(b) 61Hz PWM signals from Arduino UNO, 25% Duty Ratio (Right)

A pair of PWM signals are generated by Arduino UNO. In Figure 5.4(a), 61Hz, 50% duty ratio

PWM signal is generated by setting the TCCR2B register to 0x07, which indicates the divisor

equals to 1024, and setting the OCR2A and OCR2B register to 128, which indicates the duty of

signals are 128 out of 256. In figure 5.4(b), the duty ratio is changed to 25% by setting the OCR2A

and OCR2B to 64.

Figure 5.5 – (a) 62.5kHz PWM signals from Arduino UNO (Left),

(b) 62.5kHz PWM signals from Arduino UNO, amplified time axis (Right)

In figure 5.5(a), a pair of 62.5kHz PWM signals are generated by setting the TCCR2B register to

0x01. Here is an observation that the switching noise causes nearly 50% overshoot while it is

working on high frequency. The reason is the electromagnetic interference from parasitic

inductance of the microcontroller and connection wire. The overshoot voltage can be eliminated

by connecting an additional damping resistor in series with the Arduino output.



34

Figure 5.6 – (a) HIN and LIN input of IR2110 (Left),

(b) HIN and LIN input of IR2110, amplified time axis (Right)

Here are the damped waveforms of PWM signals. A 1kΩ damping resistor is connected in series

with the Arduino outputs. The voltage overshoot is eliminated. However, there are disadvantages

of adding damping resistor, which are the rise time and fall time will be slower than the original

one and an additional power loss on the resistors.

5.1.2. Measurements

Figure 5.7 – Gate voltage of high side and low side MOSFETs

In figure 5.7, here are the waveform of gate voltage of both high side and low side MOSFET. Since

the Vcc supplied to IR2110 gate driver is 12V, the low side gate voltage is 12V and the high side

voltage is 24V which is double of low side voltage. Therefore, it is observed that the bootstrap



35

circuit is operating in normal condition. The value of bootstrap capacitor is high enough to supply

the high side gate voltage in a cycle.

Figure 5.8 – Gate-to-source voltage of high side and low side MOSFETs

In figure 5.8, the waveforms of gate-to-source voltage are shown. The turn-on voltage is nearly

12V. Since the signal is high frequency, there is some switching noise caused by parasitic

inductance

In figure 5.9, the output voltage waveform of the square wave single phase inverter is shown. It is

observed that the overshoot and ringing problem is severe. If the full load voltage is applied, the

switching transient may damage the MOSFETs. To eliminate the switching noise and

electromagnetic interference, proper filter design will be the solution.

In figure 5.10, the filtered output voltage waveform is shown. It is observed that the output voltage

is now nearly sinusoidal, which means that most of the high frequency harmonics are filtered out

by the LC filter.



36

Figure 5.9 – Output voltage of single phase full bridge inverter

Figure 5.10 – Filtered output of voltage of single phase full bridge inverter



37

5.1.3. Compared to simulation using PSIM

Figure 5.11 – Simulation output voltage and actual output voltage

Compared to the simulation using PSIM, the actual filtered output voltage waveform is similar to

the simulated waveform. With the same input voltage and filter value, the peak output voltages of

both waveform are near 16V.

On the other hand, the actual unfiltered square wave output has severe ringing effect and overshoot.

This is caused by the resonant between parasitic inductance and the MOSFET charging

capacitance. The parasitic inductance may come from the connection wire. The ringing effect may

moderate if the circuit is constructed on PCB board instead of bread board.



38

5.2. SPWM single phase HF inverter

Figure 5.12 - Circuit diagram of SPWM HFAC inverter

Figure 5.13 – SPWM HFAC inverter circuit implemented on breadboard



39

Element Value Units Number of units Reference

Capacitors 4.7 µF 2 Electrolytic, 100V

47 µF 2 Electrolytic, 100V

0.3 nF 2 Ceramic

20 µF 2 Ceramic

33 nF 7 Metalized polyester, 250V

47 nF 1 Ceramic

0.47 nF 2 Ceramic

Inductors 47 µH 1 2A

Resistors 1000 Ω 1

100 Ω 5

22 kΩ 4

470 Ω 4

Diode 2 1N4148

4 FR107

MOSFET 4 2SK3567

Driver 2 IR2110

Op-amp 1 LF347N, Quad

NAND gate 1 74HC00, Quad

Table 5.2 - Resume of components

After implementing the square wave PWM HFAC inverter on breadboard, an SPWM HFAC

inverter is constructed on a breadboard. The input signal of gate driver is connected to a logic

circuit, which compares the 80kHz and 800kHz digital signals filtered by RC filter. Although the

modulation signal is not pure sinusoidal, the signal can pretend SPWM to generate similar gate

drive signals.

Testing conditions: Input voltage: 10V

Figure 5.14 - Testing input voltage = 15V



40

5.2.1. SPWM signals from Arduino UNO

Figure 5.15 – 80kHz PWM signal and 714kHz PWM signal

In figure 5.15, there are two PWM signals generates from Arduino UNO. The program utilized

two timers to generate signals with different frequency. The switching frequency are 80kHz and

714kHz. It is observed that the switching noise problem is critical. The overshoot noise from

714kHz signal influence the 80kHz signal. This is one of the disadvantage using microcontroller

to generate high frequency PWM signals. The overshoot problem is caused by parasitic inductance.

Since the circuit is now implemented on bread board using connection wires, this problem may be

reduced after the circuit soldered on PCB board.

Figure 5.16 – 80kHz PWM signal and 714kHz PWM signal filtered by RC filter



41

In figure 5.16, there are the PWM signals filtered by RC filter. By connecting these two signals to

the input of an op-amp comparator, a switching waveform similar to SPWM can be achieved.

5.2.2. Measurements

Figure 5.17 – Gate driver input signals

In figure 5.17, here shows the SPWM signal which pass through inverter logic gate from the

comparator output. These two waveforms are inverted to each other and can be applied to the gate

driver.

Figure 5.18 – Gate-to-source voltage of high side and low side MOSFETs



42

In figure 5.18, here is the gate-to-source voltage of high side and low side MOSFETs. The

overshoot ringing effect has been eliminated by the gate resistor, but the waveform is not ideal

since the switching speed is not fast enough to respond to some switching cycles.

Figure 5.19 – SPWM HFAC inverter output voltage

In figure 5.19, here is the inverter output voltage waveform. The output waveform has overshoot

problem in each cycle. These electromagnetic interferences can also be filtered by the LC filter.

Figure 5.20 - Filtered SPWM HFAC inverter output voltage

In figure 5.20, the filtered SPWM HFAC inverter output voltage is shown. The input voltage is

15V which is 10% of proposed rated input voltage. From the oscilloscope, the peak output voltage

is 15V, which means that the root-mean-square output voltage is,



43

Vout,rms = Vout,pk

√2 =

15

√2 = 10.6V

The value of Vout,rms is nearly equal to 10% of the proposed rated output voltage, 100V.

Here is the table of measurements of the inverter. The output is connected to an 1000Ω load resistor.

Vin Iin Vout,pp Vout,rms Pin Vo/Vin

5 0.17 14.4 4.72 0.85 0.944

6 0.19 16 5.21 1.14 0.868333

7 0.23 17.6 5.75 1.61 0.821429

8 0.29 19.6 6.09 2.32 0.76125

9 0.3 20.4 6.39 2.7 0.71

10 0.33 23.2 7.44 3.3 0.744

11 0.37 26.4 8.37 4.07 0.760909

12 0.36 27.6 8.98 4.32 0.748333

13 0.41 34.4 10.9 5.33 0.838462

14 0.44 37.8 12.2 6.16 0.871429

15 0.47 40 13 7.05 0.866667

16 0.49 41.2 13.5 7.84 0.84375

17 0.51 43.6 14.2 8.67 0.835294

18 0.54 47.2 14.9 9.72 0.827778

19 0.58 48 15.3 11.02 0.805263

20 0.61 46.4 14.9 12.2 0.745

Table 5.3 – Measurement data of the inverter



44

Figure 5.21 – Vo/Vin versus Input power

Figure 5.22 – Vo versus Vin



45

5.2.3. Compared to simulation using PSIM

Figure 5.23 - Simulation output voltage and actual output voltage

Compared to the computer simulation results, the shape of output voltage in similar to each other.

Except there is some switching cycle affected by noise. In Fast Fourier Transform (FFT), the

simulation shows clearly the frequency of high order harmonics, while the actual FFT graph shows

there are severe harmonics problem in frequency higher than the fundamental frequency.

Figure 5.24 - Filtered Simulation output voltage and actual output voltage

Finally, the simulated and actual filtered output voltage waveform shows that the waves are

concentrated at the fundamental frequency, 80kHz and the waveform is pure sinusoidal. To

conclude, the filter is designed properly and SPWM HFAC inverter is implemented successfully.



46

5.3. PCB Board

Figure 5.25 – Square PWM HFAC inverter implemented on PCB

In figure 5.23, the first trial of soldering the inverter on PCB board is shown. Since the author did

not have enough jumper wire, signal wire is used for connection. For the final results, the

electromagnetic interference problem is still not solved. The reason may be poor connection wire

and PCB board planning. Therefore, another circuit would be constructed.



47

6. Conclusions and discussion

6.1. Objectives achieved

HFAC inverter is developed

In this project, a square wave PWM HFAC inverter and a SPWM HFAC inverter are developed

on breadboard. The switching waveform, gate drive signals, and output waveform is shown in

above chapters. Finally, the SPWM HFAC inverter is developed on PCB board.

Single phase inverter is simulated

Single phase inverter is simulated by PSIM with different topologies, such as square wave PWM,

SPWM. The actual results are similar to the simulated results. PSIM has the convenience that the

value of passive components can be determined on computer by simulation.

The characteristic of HFAC system is studied

The characteristic of HFAC including the merits of HFAC system and the challenges of developing

a high frequency system are studied in this project. Through completing the simulation and

constructing the circuit, it is discovered that the passive power component values are smaller than

passive components in line frequency AC inverter. During the process of measuring results, it is

discovered that the electromagnetic interference problem is severe in high frequency system and

the EMI would affect the quality of power conversion.



48

6.2. Further developments

6.2.1. Closed-loop control

The output characteristics of DC/HFAC converter are under steady state condition with open-loop

control.

However, practical converters are usually controlled in closed-loop to maintain the output

parameters to desire values. Closed-loop control is effective in countering the change of conditions

such as variation of load, input voltage, and voltage drop from power loss.

6.2.1.1. One-cycle control

One-cycle control is firstly introduced by Smedley and Cuk [7], and it is a nonlinear control

technique to control the duty ratio of the switch in real time such that the average value in each

cycle is modulated according to the control reference.

Figure 6.1 – One-cycle control of buck converter [7]



49

The one-cycle control scheme is explained by buck converter since it is the simplest switched

mode converter. The output voltage of a buck converter is the average value of diode voltage, and

it is defined as,

𝑉𝑂 = 𝑉𝑆 = 1

𝑇𝑆∫ 𝑣𝑠 𝑑𝑡

𝑇𝑆

0

=1

𝑇𝑆∫ 𝑣𝑔 𝑑𝑡

𝑑𝑇𝑆

0

where 𝑣𝑔 is the input voltage, 𝑣𝑠 is the diode voltage, and 𝑣𝑜 is the output voltage.

The diode voltage is then integrated to 𝑣𝑖𝑛𝑡 and compared to the control reference 𝑣𝑟𝑒𝑓 . The

controller uses constant frequency pulses to simultaneously turn on the transistor and activate the

integrator. When the integrated diode voltage 𝑣𝑖𝑛𝑡 reached the control reference, the transistor is

turned off and the integrator is reset. With this control scheme, the duty ratio is determined by,

1

𝑇𝑆 ∫ 𝑣𝑔𝑑𝑡

𝑑𝑇𝑆

0

= 𝑣𝑟𝑒𝑓

One-cycle control scheme has the advantage that the duty ratio is controlled in each cycle. This

nonlinear control scheme rejects the input voltage perturbances and follows the control reference

quickly. Therefore, one-cycle control scheme is suitable for high frequency power conversion

which requires a fast response to the system.

6.2.1.2. One-cycle controlled HFAC inverter

The next step of proposed project is to apply one-cycle control scheme to the HFAC inverter. Mei,

Jain, and Zhang [8] have designed a feedforward and feedback control loops for high frequency

resonant inverter. They also measure the dynamic performance through simulation and

experimental results.



50

Here is the typical block diagram of the closed-loop controlled HFAC inverter. The filtered high

frequency voltage is sensed by a voltage sensor with transfer function 𝐾𝑆(𝑠). The voltage is

compared to a control reference 𝑣𝑟𝑒𝑓. The output of comparator is connected to a voltage feedback

controller with transfer function 𝐾𝑉(𝑠). Finally, the modulated control signal with certain duty

ratio is determined after the one-cycle controller 𝐹𝑂𝐶𝐶 and applied to the H-bridge through a gate

driver.

Figure 6.2 – Block diagram of closed-loop controlled HFAC inverter

To design the parameter of the feedback control loop, the conventional approach is to analyze the

small-signal model that relates the output voltage to the modulation signal. A method called

sampled-data modelling has been proposed by Brown and Middlebrook [9], while there are much

of design using the generalized averaging method [10]-[11]. These are possible methods to deal

with the closed-loop control scheme.



51

7. References

[1] Junfeng Liu, K.W.E. Cheng, and Jun Zeng, “A Unified Phase-Shift Modulation for

Optimized Synchronization of Parallel Resonant Inverters in High Frequency Power

System,” IEEE Trans. Industrial Electron., vol. 61, pp. 3232-3247, July 2014.

[2] Junfeng Liu, Ka Wai Eric Cheng, “New power sharing scheme with correlation control for

input-parallel-output-series-based interleaved resonant inverters,” IET Power Electron., vol.

7, pp.1266-1277, May 2014.

[3] C. Antaloae, J. Marco, N. D. Vaughan, “High Frequency Alternating Current Power Supply

for Automobile Auxiliary Electrical Systems,” Power Electronics Electrical Drives

Automation and Motion (SPEEDAM), 2010 International Symposium, June 2010.

[4] Bimal K. Bose, Min-Huei Kim, M. David Kankam, “High frequency AC vs. DC distribution

system for next generation hybrid electric vehicle,” Industrial Electronics, Control, and

Instrumentation, 1996., Proceedings of the 1996 IEEE IECON 22nd International

Conference, Aug. 1996.

[5] M. Abul Masrur, Daryl S. Sitar, and V. A. Sankaran, “Can an AC (Alternating Current)

Electrical System Replace the Present DC System in the Automobile? An Investigative

Feasibility Study—Part II: Comparison and Tradeoffs,” IEEE Trans. Vehicular Tech., vol.

47, no. 9, pp. 1081-1086, Aug 1998.

[6] Zhongming Ye, John C. W. Lam, Praveen K. Jain, and Paresh C. Sen, “A Robust One-Cycle

Controlled Full-Bridge Series-Parallel Resonant Inverter for a High-Frequency AC (HFAC)

Distribution System,” IEEE Trans. Power Electron., vol. 22, no. 6, pp. 2331-2343, Nov.

2007.



52

[7] Keyue M. Smedley, Slobodan Cuk, “One-Cycle Control of Switching Converters,” IEEE

Trans. Power Electron., vol. 10, no. 6, pp. 625-633, Nov. 1995.

[8] Q. Mei, P.K. Jain, and H. Zhang, “Dynamic performance of an APWM resonant inverter for

high frequency AC power distribution system,” IEEE Trans. Power Electron., no. 99, 2006,

accepted for publication.

[9] A. R. Brown and R. D. Middlebrook, “Sampled-data modelling of switching regulators,” in

Proc. IEEE Power Electronics Specialists Conf., Jun. 1983, pp. 23-37.

[10] S. R. Sanders, J. M. Noworolski, X. Z. Liu, and G. C. Verghese, “Generalized averaging

method for power conversion circuits,” IEEE Trans. Power Electron., vol. 6, no. 2, pp.

251–259, Apr. 1991.

[11] C. T. Rim and G. H. Cho, “Phasor transformation and its application to the dc/ac analyses

of frequency phase-controlled series resonant converters (SRC),” IEEE Trans. Power

Electron., vol. 5, no. 2, pp. 201–211, Apr. 1990.



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8. Appendix

A1. Circuit diagrams

Circuit diagram of square wave PWM HFAC inverter



54

Circuit diagram of SPWM HFAC inverter



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A2. List of figures

3.1 Modified IPOS topology of interleaved circuit [2]

3.2 Proposed power supply for vehicle auxiliaries [3]

3.3 Simplified representation of resonant circuitry and transfer function [3]

3.4 General SPWM waveform

4.1 Schematic of HFAC system

4.2 PWM signal generation program in phase correct PWM mode

4.3 PWM signal generation program in fast PWM mode

4.4 Typical connection of IR2110 high and low side driver

4.5 Equivalent circuit of gate resistor and stray capacitors

4.6 Gate resistor and pull-down resistor

4.7 MOSFET connected with RC snubber

4.8 Single phase full-bridge inverter with square wave PWM

4.9 Simulation results: (a) Output voltage and Filtered output voltage, (b) Input current,

(c) Output current

4.10 Average value and RMS value of the waveforms

4.11 Single phase full-bridge inverter with SPWM

4.12 Simulation results: (a) Carrier signal and Modulation signals, (b) Gate drive signals of

MOSFET 1 and 2, (c) Gate drive signals of MOSFET 3 and 4, (d) Filtered HFAC voltage,

(e) Rectified 12VDC output, (f) Rectified 5VDC output

4.13 Simulated HFAC voltage in frequency domain

5.1 Circuit diagram of square wave PWM HFAC inverter

5.2 Square wave PWM HFAC inverter circuit implemented on breadboard

5.3 Testing input voltage = 10V

5.4 (a) 61Hz PWM signals from Arduino UNO, 50% Duty Ratio (Left), (b) 61Hz PWM

signals from Arduino UNO, 25% Duty Ratio (Right)



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5.5 (a) 62.5kHz PWM signals from Arduino UNO (Left), (b) 62.5kHz PWM signals from

Arduino UNO, amplified time axis (Right)

5.6 (a) HIN and LIN input of IR2110 (Left), (b) HIN and LIN input of IR2110, amplified time

axis (Right)

5.7 Gate voltage of high side and low side MOSFETs

5.8 Gate-to-source voltage of high side and low side MOSFETs

5.9 Output voltage of single phase full bridge inverter

5.10 Filtered output of voltage of single phase full bridge inverter

5.11 Simulation output voltage and actual output voltage

5.12 Circuit diagram of SPWM HFAC inverter

5.13 SPWM HFAC inverter circuit implemented on breadboard

5.14 Testing input voltage = 15V

5.15 80kHz PWM signal and 714kHz PWM signal

5.16 80kHz PWM signal and 714kHz PWM signal filtered by RC filter

5.17 Gate driver input signals

5.18 Gate-to-source voltage of high side and low side MOSFETs

5.19 SPWM HFAC inverter output voltage

5.20 Filtered SPWM HFAC inverter output voltage

5.21 Vo/Vin versus Input power

5.22 Vo versus Vin

5.23 Simulation output voltage and actual output voltage

5.24 Filtered Simulation output voltage and actual output voltage

5.25 Square PWM HFAC inverter implemented on PCB

6.1 One-cycle control of buck converter [7]

6.2 Block diagram of closed-loop controlled HFAC inverter



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A3. List of Tables

4.1 Specifications of DC/HFAC inverter and list of components

4.2 Divisor setting and corresponding frequencies

4.3 Specifications of square wave PWM inverter simulation

4.4 Specifications of SPWM inverter simulation

5.1 Resume of components

5.2 Resume of components

5.3 Measurement data of the inverter

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