The Gigabit Link Interface Board (GLIB)

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The Gigabit Link Interface Board (GLIB) Opto Working Group Mini Workshop, 2012.06.08 Paschalis Vichoudis, PH-ESE-BE

description

The Gigabit Link Interface Board (GLIB). Paschalis Vichoudis, PH-ESE-BE. Opto Working Group Mini Workshop, 2012.06.08. CONCEPT. THE GLIB IS: an evaluation platform and an easy entry point for users of high speed optical links THE GLIB IS TARGETED FOR: - PowerPoint PPT Presentation

Transcript of The Gigabit Link Interface Board (GLIB)

Page 1: The Gigabit Link Interface Board (GLIB)

The Gigabit Link Interface Board

(GLIB)

Opto Working Group Mini Workshop, 2012.06.08

Paschalis Vichoudis, PH-ESE-BE

Page 2: The Gigabit Link Interface Board (GLIB)

THE GLIB IS: an evaluation platform and an easy entry point for users of high speed optical links

THE GLIB IS TARGETED FOR: optical link evaluation in the laboratory control, triggering and data acquisition from remote modules in beam or irradiation

tests GBT

Versatile Link

TIA

LD

PD

LaserGBT13

TRx

FPGA

Payload

GBT GLIB

E-Link

FE

CONCEPT

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MMC mezzanine

Commercial 4ch SFP+ FMC

Pluggable Optics (SFP+)

HARDWAREOVERVIEW

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AMC edgeconnector

Port [0:1]

Port [4:7] MGT quad

CLK1/TCLKA

JTAG circuitry(CPLD-based)Module Management

Controller (MMC)IPMI

JTAG

FPGA

GbE

Port [12:15]

4x SFP+

4

SRAM

I/O

CLK

JTAG

FMC#2

FMC#1

I2C

ClockDistribution

Circuitry

GbEPHY

20

I/O

CLK

JTAGI2C

TRx

4

160

160

SRAM

4

4

CLK2/TCLKBCLK3/FCLKA

Port [2:3]

Port [8:11] MGT quad

M-LVDS TRx

Port [17:20]MGT quad

MGT quad

Diff. I/O pairs

HARDWAREARCHITECTURE

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FIRMWARE

INCLUDES

COMPATIBLE

more info

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FIRMWAREUSER LOGIC EXAMPLE

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FIRMWARESVN REPOSITORY

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GBT FPGA HDL core improvements- Minimized the latency (20-bit MGT interface instead of 40)- Adapted the HDL core to Virtex-6 features for deterministic operation

Demonstration of GBT communication- between a GLIB and the GBT evaluation board- between two GLIB cards with unrelated clocks

Successful implementation of GLIB PC interface- Gigabit Ethernet in Stand alone mode and in a μTCA crate

Successful integration of FMC modules for I/O expansion

Firmware architecture for facilitating user development- Separated system/user parts- All complexity interfacing/controlling on-board circuitry transparent for user

Delivery to beta users- GLIB HW/FW/SW/doc to CMS, ATLAS & ALICE- continuous support

Big interest from the community- 4 experiments, 10 projects, 20 users, 30 GLIB by end 2012

MAJOR ACHIEVEMENTS

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THE GLIB ECOSYSTEM

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THE GLIB ECOSYSTEMTTC FMC

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THE GLIB ECOSYSTEMVERSATILE LINK FMC

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THE GLIB ECOSYSTEMPCIe ADAPTER

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THE GLIB ECOSYSTEMGUI

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THE GLIB ECOSYSTEMGUI

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THE GLIB ECOSYSTEMGUI

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Very advanced stage: although only 2-year old project

Prototypes are already delivered to beta users: since 2011

Big interest from the community: 4 experiments, 10 projects, 20 users, 30 GLIB

Production: first batch before end 2012

Spin-offs: TTC FMC, improvements of GBT-FPGA HDL core

STATUS AND SUMMARY