Teron mini System Board - amigaone.files.wordpress.com · Ultra Compact PowerPC TM Linux Platform...

Ultra Compact PowerPCTM Linux Platform

User Manual

August 2004, Revision V2.3

Mai Logic, Incorporated

47697 Westinghouse Drive, Suite 200 Fremont, CA 94539, USA

Teron mini System Board

Teron mini User Manual

Teron mini User Manual 2

Trade Mark: iMemory is the registered trademark of Mai Logic Inc. PowerPC™ is the registered trademark of International Business Machine Corporation. All other product names are trademarks, registered trademarks, or service marks of their respective owners.

Mai Logic may have patents, patent applications, trademarks, copyrights, or other intellectual property rights covering subject matter in this document. Except as expressly provided in any written license agreement from Mai Logic, the furnishing of this document does not give you any license to these patents, trademarks, copyrights, or other intellectual property

Notice: The information provided in this document is believed to be correct and accurate. However, Mai Logic Inc. assumes no responsibility for any errors in this document. Furthermore, Mai Logic Inc. assumes no responsibility for the use or misuse of the information in this document, and for any patent infringement that may be caused by the use of this document. The information is subject to change without notice and without obligation to notify any person of such changes in this document.

Copyright © Mai Logic Incorporated 2003.

How to reach us:

USA Headquarter: 47697 Westinghouse Drive, Suite 200, Fremont, California 95439.

Tel: 1-510-656-0100

Technical Information: Please email us at [email protected]

Website: www.mai.com

Document Comment: Fax: 1-510-656-3246, Attn: Application Engineer

www.mai.com



Contents

Chapter 1 Introduction............................................................................................................... 7

1.1 General Introduction........................................................................................7

1.2 Features.............................................................................................................8

Chapter 2 CPU Module Cards................................................................................................. 10 Chapter 3 Board Layout........................................................................................................... 12

3.1 Teron mini System Board Layout.................................................................12

3.2 Back Panel I/O Ports......................................................................................13

3.3 Connectors and Switches...............................................................................13

3.4 Jumper and Switch Setting............................................................................14

3.4.1 Jumpers and their default setting..................................................................................14

3.4.2 Connectors and Switches..............................................................................................15

Appendix …………………………………………………………………………………...16

Appendix A Setting CPU core to bus speed ratio .............................................................16

Appendix B Setting CPU core voltage..............................................................................18

Appendix C Connector Pin Assignment............................................................................20



Figures

Figure 1-1 Teron mini System Board............................................................7

Figure 2-1 CPU Module Card....................................................................10

Figure 3-1 Teron mini V2 Board Layout ......................................................12

Figure 3-2 Teron mini V2 Back Panel Connectors ........................................13

Figure 3-3 Positions of Major Onboard Devices ...........................................13



Revision History

Revision Date of Modification Remark

V 1.0 09- 16- 2003 First version

V 1.1 01- 31- 2004 Modified onboard jumper and connector settings

V 2.0 06- 08- 2004 Modified jumper position and serial port pin header

V 2.1 07- 02- 2004 Add CPU frequency setting table

V 2.2 07- 12- 2004 Modify USB 3,4 onboard pin head diagram

V 2.3 08- 12- 2004 Modify JP1, JP3 and JP30 pin assignment, add PPC

750GX information



Teron mini Board Benefits The main benefits of the Teron Mini board are

• Super high density PowerPC platform features MAI Logic’s Articia S system controller

and supports variety of PowerPC™ processors running up to 1.3GHz through

Meg-Array 300 socket.

• Ultra-compact and all-in-one platform with onboard graphic, sound and network

controller, the Mini-ITX form factor board measures at only 6.7”x6.7” (170mmx170mm),

makes Teron mini an ideal development platform for entertainment, multimedia and

network client applications. • Support latest Linux OS. Device driver and development programs are widely available.

BSP for popular RTOS available.

Related Documents The following documents are useful for reference purposes when using this manual

• PCI Local Bus Specification – Revision 2.2

• PCI Bus Power Management Interface – Revision 1.1

• Articia S Data Book version 1.0.9

Mai Logic may have updated the documentation that was shipped with your board. Please

check the Mai logic website: www.mai.com for the latest information.

Document Convention

This section explains the document conventions used in this manual

Typographic Notation The following typographic conventions are used in this manual

• Italic type is used for filename or text that user type on a prompt display

www.mai.com



Chapter 1 Introduction

1.1 General Introduction Teron mini Board features MAI logic’s Articia S chipset and supports full PowerPC product through onboard Meg-Array 300 socket. The CPU module cards currently available include PPC 750CXe, PPC 750FX, PPC 750GX from IBM and MPC7410, MPC744x, MPC745x G4 processors from Motorola. The space saving Teron mini board is highly integrated with onboard device like AGP2x graphic controller, ATA100/66 IDE controller, 10/100 Ethernet controller, PCI audio controller and USB 1.1 controller. It is an ideal development platform for entertainment, multimedia and network client applications. This manual will address the hardware specification of the Teron mini board.

Figure 1-1 Teron mini System Board



1.2 Features q Processor

• Meg-Array 300 connector for IBM PPC 750CXe, PPC 750FX, PPC 750GX up to 1.1GHz

and Motorola MPC7410, MPC744x , MPC745x G4 processors up to 1.3 GHz

• 133MHz front side bus

q North Bridge

• Articia S Chipset

• iMemory for run-time memory fault recovery

• Genetic Computing for system security

• Patented Floating Buffer for smart data traffic management

q Memory System

• Support PC133 SDRAM up to 2GB

• One 144-pin SODIMM slot on board

q Expansion Slot

• One 33MHz 32-bit 5V PCI slot on board for custom expansion

q Graphics

• Onboard ATI Radeon 7000 AGP graphic controller with VGA, RCA and S-Video output

• 32 MB DDR video RAM support up to 1920 x 1440 at 75Hz

q On Board Devices

• Ultra DMA 100/66/33 IDE controller with one 40-pin and one 44-pin IDE connectors

• USB 1.1 controller connected to 4 USB ports

• 3Com 100/10 Ethernet controller with RJ45 port

• One serial port onboard pin header

• 6-channel sound controller with 3 sound jacks and CD-in

q Back Panel I/O Ports

• 1 x parallel port

• 1 x VGA port

• 1 x S-Video port



• 1 x RCA video out port

• 1 x PS/2 keyboard port

• 1 x PS/2 mouse port

• 2 x USB 1.1 port

• 1 x 5.1 audio port

• 1 x RJ45 port

• 1 x Game port

q Firmware

• 4Mbit Flash ROM / U-boot

q Operating System

• Support Linux kernel version 2.4.22 and 2.6.x • Supported Linux distribution: Yellow Dog Linux (Red Hat Linux), Suse Linux

PowerPC version, Debian Linux for PowerPC



Chapter 2 CPU Module Cards MAI Logic’s CPU module cards work on all Teron series evaluation boards. Available processor include PPC 750FX, MPC7410, MPC7441/7451, MPC7455 and latest 1.3GHz MPC7447 and 1.1GHz PPC 750GX.

Figure 2-1 CPU Module Card

U1: Processor (PPC 750FX, PPC 750GX or MPC744x, MPC745x)

J2: Assigned for the synthesizer clock speed ratio

See Appendix A for detailed setting

J3: JTAG connector

JP1, JP2, and JP3: PLL Configuration for PowerPC 750FX and 750GX**

See Appendix A for detailed setting ** More detail setting information; please refer to PPC 750FX /GX data book. For MPC74XX this jumper can be

ignored.



Default CPU frequency setting

J2 CPU

1 2 3 4 JP1 JP2 JP3 CPU

Frequency

PPC 750FX On Off Off On Short Short Short 800MHz

PPC 750GX On Off Off On Short Short Short 800MHz

MPC7451 Off Off On Off N/A N/A N/A 800MHz

MPC7455 On On Off On N/A N/A N/A 933MHz



Chapter 3 Board Layout 3.1 Teron mini System Board Layout

Figure 3-1 Teron mini V2 Board Layout

Mini-ITX form factor. 6.7” x 6.7” (170mm x 170mm)



Major On-board Components:

U15 – 300-pin Meg-Array CPU Module connector

U8 – North Bridge: Mai Logic’s Articia S

U5 – South Bridge: VIA VT82C686B

U4 – 10/100 Ethernet Controller: 3COM 3C920

U6 – AGP Graphic controller: ATI Radeon 7000

U29 – 6-ch PCI Audio controller: C-Media 8738

3.2 Back Panel I/O Ports Figure 3-2 Teron mini V2 Back Panel Connectors

Audio port Light green: Line out (Front L/R), Light blue: Rear L/R, Pink: Bass/Center

3.3 Connectors and Switches Figure 3-3 shows the location of IDE connectors, PCI expansion slot and SODIMM slot.

Figure 3-3 Positions of Major Onboard Devices

PC

I CO

NN

SO

DIM

M

S.B.

Articia S

Pw

rCon

Meg-Array

AGP

Prmry IDEScndry IDE

ABT

Enet



3.4 Jumper and Switch Setting

3.4.1 Jumpers and their default setting

PC

I CO

NN

JP8

JP10

JP11

JP8, JP10, JP11: System clock configuration

JP8 JP11 JP10 Host (MHz)

AGP (MHz)

PCI (MHz)

USB (MHz)

REF. (MHz)

2-3 2-3 2-3 Hi-z Hi-z Hi-z Hi-z Hi-z

2-3 2-1 2-3 100 66.67 33.33 Hi-z 14.318

2-3 2-1 2-1 100 66.67 33.33 48 14.318

2-1 2-1 2-3 133 66.67 33.33 Off 14.318

2-1 2-1 2-1 133 66.67 33.33 48 14.318

PC

I CO

NN

JP12

JP12: CPU core voltage switch This dipswitch is for adjusting the core voltage to CPU. The table below lists typical setting for MPC7451 and PPC750FX/GX. See Appendix B for more information

1-2 3-4 5-6 7-8 9-10 Vcc_Core

short open short open short 1.59V

open short open open short 1.44V



3.4.2 Connectors and Switches P

CI C

ON

N

JP28JP14 JP15

JP7

JP5

JP31

JP16

JP5: Reset

JP7: Power-on switch

JP14: Speaker Connector

JP15: IDE Hard Disk LED

JP16: Power LED connector JP28: Test port (Reserved)

JP31: SPDIF In, Out

PC

I CO

NN

JP4ABT

JP20

JP1

JP3

JP30

JP1: MIC-in, Line-out and Line-in

JP3: Serial port connector

JP4: Battery Selection

2-1: Battery on (Default), 2-3: CMOS reset

JP20: CD In

JP30: USB 3,4 connector

PC

I CO

NN

JP6

ABT

JP9

JP13

JP6, JP13: CPU cooling fan connectors.

JP9: No Connection (Reserved)

Refer to Appendix C for detailed connector pin assignment



Appendix Appendix A Setting CPU core to bus speed ratio

I. J2 dip switch on CPU card

1 2 3 4

ON

II. PPC750FX/GX CPU core to bus speed ratio table

J2

1 2 3 4 JP1 Core to bus speed

ratio

On Off On On Short X 4

On Off On On Open X 4.5

On Off On Off Short X 5

On Off On Off Open X 5.5

On Off Off On Short X 6

On Off Off On Open X 6.5

On Off Off Off Short X 7

Off Off Off Off Open X 7.5

Off On On On Short X 8



III. MPC7451 CPU core to bus speed ratio table

J2

1 2 3 4 Core to bus speed ratio

Off On Off On X 4

On Off Off Off X 4.5

Off On Off Off X 5

Off On On Off X 5.5

Off Off On Off X 6

On Off On Off X 6.5

On On Off On X 7

On On On Off X 7.5

Off Off On On X 8



Appendix B Setting CPU core voltage

I. JP12 Pin Assignment

1 23 45 67 89 10

II. CS-5155 Power Range Setting Table

1-2 3-4 5-6 7-8 9-10 VCC_CORE (V)

Open Open Open Open Short 1.34

Short Open Open Open Short 1.39

Open Short Open Open Short 1.44

Short Short Open Open Short 1.49

Open Open Short Open Short 1.54

Short Open Short Open Short 1.59

Open Short Short Open Short 1.64

Short Short Short Open Short 1.69

Open Open Open Short Short 1.74

Short Open Open Short Short 1.79

Open Short Open Short Short 1.84

Short Short Open Short Short 1.89

Open Open Short Short Short 1.94

Short Open Short Short Short 1.99

Open Short Short Short Short 2.04

Short Short Short Short Short 2.09

Open Open Open Open Open 1.244



Short Open Open Open Open 2.14

Open Short Open Open Open 2.24

Short Short Open Open Open 2.34

Open Open Short Open Open 2.44

Short Open Short Open Open 2.54

Open Short Open Short Open 2.64

Short Short Short Open Open 2.74

Open Open Open Short Open 2.84

Short Open Open Short Open 2.94

Open Short Open Short Open 3.04

Short Short Open Short Open 3.14

Open Open Short Short Open 3.24

Short Open Short Short Open 3.34

Open Short Short Short Open 3.44

Short Short Short Short Open 3.54



Appendix C Connector Pin Assignment JP1 Sound connector

Mic in 1 4 5V5V 3 2 GND

Line out R 5 6 Line in RGND 7 8 KeyLine out L 9 10 Line in L

JP3 Serial port connector

1 DCD RXD 23 TXDDTR 45 GND DSR 67 RTS CTS 89 RIKey 10

JP30 USB 3, 4

VCC 1 2 GND USB3 - 3 4 USB4 +

USB3+ 5 6 USB4-GND 7 8 VCC



JP20 CD In

CD in L 1GND 2

CD in R 4GND 3

JP14 SPEAKER, JP31 SPDIF In/Out, JP15 H.D.D LED, JP28 Reserved

5VN

CS

PD

IF out

SP

DIF in

GN

D

IDE

0 +ID

E0 -

IDE

1 +ID

E1 -

SP

K

SP

K

NC

NC

Reserved

JP14 JP31 JP15 JP28

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