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Technical review on UPS power distribution of the LHC Beam Dumping System (LBDS) Anastasia PATSOULI TE-ABT-EC Proposals for LBDS Powering Improvement 1

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2 Main topics Implementation of Additional Software Surveillance of the VME Crate Redundant Power Supplies Implementation of Internal Surveillance of +5V & +12V VME Lines within the Triggering Synchronization Unit module Reorganisation of the Triggering Synchronization & Distribution System Architecture Implementation of an Additional Redundant Triggering Path directly from the Beam Interlock System to the LHC Beam Dump System Re- Triggering System

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3 Software Surveillance of VME Crate Redundant Power Supply Software: Check Individual Status of the PS ON OFF Unknown (to be defined) Update Status at a Frequency of 1Hz Implementation of a True -> False transition filter to ignore incorrect acquisition Rules: If one of the Power Supplies Fails, a Dump Request will be issued by the SIS. As a result, the Dump will be Synchronous

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4 Internal Surveillance of the +5V & +12V VME Lines within the TSU (1/2) To Monitor the Status of the TSU Output Stage Powering Why do we want to Monitor the TSU Output Stage Powering?..because our System is Designed as Fault Tolerant! Why do we want an Internal Surveillance?

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5 5 Internal Surveillance of the +5V & +12V VME Lines within the TSU (2/2) Description : With External Loss of +12V VME lines (Diodes Anode Side): Internal Surveillance detects the loss of the +12V VME line Diode protects against propagation to the TSU Electronics Loss of +12V VME lines triggers an Internal fault (synchronous dump) Decoupling Capacitor of the Electronics sized to keep the Hold-On time of the TSU well above 100ms limit With TSU Internal Loss of +12V (Diodes Cathode Side): Internal Surveillance detects the loss of the +12V VME line Loss of TSU output stage drivers Loss of +12V VME lines triggers an Internal fault (synchronous dump via redundant TSU) Decoupling Capacitor of the Electronics on the redundant TSU sized to keep the Hold-On time well above 100ms limit

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6 Current Situation One crate hosting the two Triggering Synchronization Units with 2 redundant power supplies 2 Redundant Power Supplies in principle To Ensure Availability (and Safety) in case of partial loss of power, To Increase Hold-On time for synchronous dump in case of full loss of power. But today No detection of partial loss of powering Common mode coupling through the +5V and +12V VME power lines TSDS

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7 1 st Option (All in One) Consolidate Actual Implementation Implementation of All the Triggering Synchronization & Distribution System within one VME Redundant Crate Increase interlocking and protection to gain in reliability

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8 1 st Option / Pros & Cons Consolidate Actual Implementation Pros: 1. Two separate UPS (UPS_A & UPS_B) for Redundant Powering of Redundant Power Supplies 2. Hardware Surveillance of +5V & +12 VME lines within TSU 3. Software Surveillance of Redundant Power Supplies with Software Interlock System 4. Higher Availability Cons: 1. Output stage drivers of both TSU remain powered by a single +12V source Common mode problem. Protection relies only on the diode in the TSU surveillance mechanism. 2. Full Software Surveillance of the Redundant Power Supplies Required Higher Risk for Synchronous Dump induced by the software surveillance

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9 2 nd Option (Distributed Architecture) Break Common Mode Coupling Implementation within three independent VME crates 1 st Crate with single power supply hosting TSU_A 2 nd Crate with single power supply hosting TSU_B 3 rd Crate with Redundant Power Supply hosting the Trigger Synchronization Interfaces (BRF, BLM, prepulse) UPS A is connected with TSI and TSU_A UPS B is connected with TSI and TSU_B Crosscheck between TSU_A & TSU_B kept as in fully redundant approach Synchronous dump by redundant TSU in case of internal failure

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10 2 nd Option / Pros & Cons Break Common Mode Coupling Pros: 1. No Common Modes TSU output drivers will be powered by different +12V sources Different UPS will be used for powering of the different TSU crates 2. Redundant Powering of the TSI. High Availability for Common Signals (BRF, BLMDD) 3. Software for monitoring the Redundant Power Supplies of the TSI crate 4. Single Power Supply for the each TSU for Safety 5. No Surveillance of VME power lines needed for the TSI crate (+12V unused) 6. Crosscheck between the two TSUs for synchronous dump in case of internal failure 7. Surveillance of the +5V & +12V VME lines with hardware for the 2 TSU crates Cons: 1. More complex architecture 2. Higher risk of failure but always with synchronous dump

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11 Additional Redundant Triggering Path What if TSDS is unable to issue a Synchronous Dump and an Asynchronous Dump ??? Proposal Inject from the BIS an Asynchronous Dump Request into the LBDS re-triggering lines The Dump Request should be injected 250s after detection of the BIS loop opening Clear signature of the event within LBDS IPOC and XPOC. Presence can be checked after each Dump Request.

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12 Additional Redundant Triggering Path

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13 Solution?! We need to Create a System that: Includes the Software for Surveillance of the Redundant Power Supply Has Implemented Internal Surveillance of +5V & +12V VME lines Has Removed Common Mode Failures in powering circuit Has a back-up Triggering Mechanism Path FEAlim Monitor (FESA class) Deploy TSDS within Three Separate Crates Direct Asynchronous Dump Request from the BIS through the Re-trigger Lines Internal Surveillance Hardware on the TSU card

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14 Thank you for your attention! Questions?!

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15 Appendix

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16 Description of the Dump Request

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17 Possible Implementation of the Power Supply Surveillance