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TCSM2TCSM2 basic operation basic operation

BSS S11

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TCSM2 basic operationTCSM2 basic operation

After studying this module you will:

be able to explain the use of the TCSM2 in the BSS know about different TC configurations and their

Ater interfaces know the TCSM2 architecture know about TCSM2 rack, cartridges and plug-in units understand configuration of TCSM2

Refer to S11 Documentation:• Descriptions\ Product descriptions\ Product description for TCSM2E\

Product description for TCSM2E

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Operating environment of the Operating environment of the TCSM2ETCSM2E

BSC MSC

AterInterface

AInterface

E1

E1

E1

E1

TCSM2EUnit

TCSM2EUnit

TCSM2EEQUIPMENT

1

3

6

2

45

7

0

0

. .

.

. .

.

1

3

6

2

45

7

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Time slot allocationTime slot allocation

Circuittype

Capacity unit onAter interface

FR speech, EFR speechFR data (14.5, 12, 6 or 3.6 kbit/s)

A

B

C

Supported channels and speech codingalgorithms

D

E

16 kbit/s

8 kbit/s

2 x 16 kbit/s

4 x 16 kbit/s

HR speechHR data (6 or 3.6 kbit/s)

16 kbit/sFR speech, EFR speech, HR speechFR data (14.5, 12, 6 or 3.6 kbit/s)HR data (6 or 3.6 kbit/s)

FR speech, EFR speech, HR speechFR data (14.5, 12, 6 or 3.6 kbit/s)HR data (6 or 3.6 kbit/s)HSCSD max 2 x FR data (14.5, 12 or 6 kbit/sFR speech, EFR speech, HR speechFR data (14.5, 12, 6 or 3.6 kbit/s)HR data (6 or 3.6 kbit/s)HSCSD max 4 x FR data (14.5, 12 or 6 kbit/s

F AMR speech 16 kbit/s

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AMR speech codecAMR speech codec

Full Rate Half rate

12.2

10.2

7.95 7.95 (*)

7.4 7.4

6.7 6.7

5.9 5.9

5.15 5.15

4.75 4.75

Speech bit rate

Voice quality

Robustness

8 AMR codecs for FR and 6 for HR:

1.0

2.0

3.0

4.0

5.0

No Errors 16 dB C/I 13 dB C/I 10 dB C/I 7 dB C/I 4 dB C/I

MOS (Mean Opinion Score)

EFRAMR FR

AMR Full Rate performance compared to Full Rate EFR in Clean Speech

1.0

2.0

3.0

4.0

5.0

No Errors19 dB C/I16 dB C/I13 dB C/I10 dB C/I 7 dB C/I 4 dB C/I

FRAMR HR

MOS (Mean Opinion Score)

AMR Half Rate performance compared to Full Rate in Clean Speech

Optional extra slideOptional extra slide

(*) Requires 16 kbit/s TRAU, not supported

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Channel allocation for circuit Channel allocation for circuit types A, C and Ftypes A, C and F

1st A-IF trunk

2nd A-IF trunk

3rd A-IF trunk

1 2 3 4 5 6 7 80001 01 02 0302 04 05 06 0703 08 09 10 1104 12 13 14 1505 - 17 18 1906 20 21 22 2307 24 25 26 2708 28 29 30 3109 01 02 0310 04 05 06 0711 08 09 10 1112 12 13 14 1513 - 17 18 1914 20 21 22 2315 24 25 26 2716 28 29 30 3117 01 02 0318 04 05 06 0719 05 09 10 1120 12 13 14 1521 - 17 18 1922 20 21 22 2323 24 25 26 2724 28 29 30 312526272829 --- --- --- --- --- --- --- ---30 --- --- --- --- --- --- --- ---31 --- --- --- --- --- --- --- ---

LAPD

Reserved for CCS7

1st A-IF trunk

2nd A-IF trunk

3rd A-IF trunk

4th A-IF trunk

1 2 3 4 5 6 7 80001 01 02 0302 04 05 06 0703 08 09 10 1104 12 13 14 1505 16 17 18 1906 20 21 22 2307 24 25 26 2708 28 29 30 3109 01 02 0310 04 05 06 0711 08 09 10 1112 12 13 14 1513 16 17 18 1914 20 21 22 2315 24 25 26 2716 28 29 30 3117 01 02 0318 04 05 06 0719 08 09 10 1120 12 13 14 1521 16 17 18 1922 20 21 22 2323 24 25 26 2724 28 29 30 3125 01 02 0326 04 05 06 0727 08 09 10 1128 12 13 14 1529 16 17 18 1930 20 21 22 2331 24 25 26 27

LAPD

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Channel allocation for circuit type Channel allocation for circuit type BB

1st A-IF trunk (HR)

2nd A-IF trunk (HR)

3rd A-IF trunk (HR)

4th A-IF trunk (HR)

5th A-IF trunk (HR)

6th A-IF trunk (HR)

7th A-IF trunk (HR)

Reserved for CCS7 / X.25

1 2 3 4 5 6 7 80001 01 02 03 04 05 0602 07 08 09 10 11 12 13 1403 15 17 18 19 20 21 22 2304 24 25 26 27 28 29 30 3105 01 02 03 04 05 0606 07 08 09 10 11 12 13 1407 15 17 18 19 20 21 22 2308 24 25 26 27 28 29 30 3109 01 02 03 04 05 0610 07 08 09 10 11 12 13 1411 15 17 18 19 20 21 22 2312 24 25 26 27 28 29 30 3113 01 02 03 04 05 0614 07 08 09 10 11 12 13 1415 15 17 18 19 20 21 22 2316 24 25 26 27 28 29 30 3117 01 02 03 04 05 0618 07 08 09 10 11 12 13 1419 15 17 18 19 20 21 22 2320 24 25 26 27 28 29 30 3121 01 02 03 04 05 0622 07 08 09 10 11 12 13 1423 15 17 18 19 20 21 22 2324 24 25 26 27 28 29 30 3125 01 02 03 04 05 0626 07 08 09 10 11 12 13 1427 15 17 18 19 20 21 22 2328 24 25 26 27 28 29 30 3129 --- --- --- --- --- --- --- ---30 --- --- --- --- --- --- --- ---31 --- --- --- --- --- --- --- ---

LAPD

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Channel allocation for circuit Channel allocation for circuit types D and Etypes D and E

1st A-IF trunk (HS2&EFR&FR&HR&D144)

2nd A-IF trunk (HS2&EFR&FR&HR&D144)

1st A-IF trunk (HS4&EFR&FR&HR&D144)

1 2 3 4 5 6 7 80001 0102 02 0303 04 0504 06 0705 08 0906 10 1107 12 1308 14 1509 16 1710 18 1911 20 2112 22 2313 24 2514 26 2715 28 2916 30 3117 0118 02 0319 04 0520 06 0721 08 0922 10 1123 12 1324 14 1525 16 1726 18 1927 20 2128 22 2329 24 2530 26 2731 28 29

LAPD

1 2 3 4 5 6 7 8000102 0203 0304 0405 0506 0607 0708 0809 0910 1011 1112 1213 1314 1415 1516 1617 1718 1819 1920 2021 2122 2223 2324 2425 2526 2627 2728 2829 2930 3031 31

LAPD

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Mixed allocationsMixed allocations

1st A-IF trunk

2nd A-IF trunk

3rd A-IF trunk (HR)

4th A-IF trunk (HR)

5th A-IF trunk (HR)

6th A-IF trunk (HR)

1st A-IF trunk

2nd A-IF trunk (HS2&EFR&FR&HR&D144)

3rd A-IF trunk (HS4&EFR&FR&HR&D144)

1 2 3 4 5 6 7 80001 01 02 0302 04 05 06 0703 08 09 10 1104 12 13 14 1505 16 17 18 1906 20 21 22 2307 24 25 26 2708 28 29 30 3109 01 02 0310 04 05 06 0711 08 09 10 1112 12 13 14 1513 16 17 18 1914 20 21 22 2315 24 25 26 2716 28 29 30 3117 01 02 03 04 05 0618 07 08 09 10 11 12 13 1419 15 17 18 19 20 21 22 2320 24 25 26 27 28 29 30 3121 01 02 03 04 05 0622 07 08 09 10 11 12 13 1423 15 17 18 19 20 21 22 2324 24 25 26 27 28 29 30 3125 01 02 03 04 05 0626 07 08 09 10 11 12 13 1427 15 17 18 19 20 21 22 2328 24 25 26 27 28 29 30 3129 01 02 03 04 05 0630 07 08 09 10 11 12 13 1431 15 17 18 19 20 21 22 23

LAPD

1 2 3 4 5 6 7 80001 01 02 0302 04 05 06 0703 08 09 10 1104 12 13 14 1505 16 17 18 1906 20 21 22 2307 24 25 26 2708 28 29 30 3109 0110 02 0311 04 0512 06 0713 08 0914 10 1115 12 1316 14 1517 16 1718 18 1919 20 2120 22 2321 24 2522 26 2723 28 2924 30 3125 0126 0227 0328 0429 0530 0631 07

LAPD

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Channel allocation in Ater Channel allocation in Ater interface:interface:

mixed configurationmixed configuration

Plug-in unit

*)2...62...8

TR16-S

ET2E

TCH

Capacity unit onAter: 16 kbit/s

(Circuit types A,C,F)

*)1...21...3

*)29...90or 29...120

*) if BSC-side submultiplexing is carried out by the SMUX unit and three PCMs are multiplexed onto Ater.

Capacity unit onAter: 8 kbit/s

(Circuit type B)

Capacity unit onAter: 2 x 16 kbit/s

(Circuit type D)

Capacity unit onAter: 4 x 16 kbit/s

(Circuit type E)

2...14

1...4

29...210

2...4

1...2

29...60

2

1

30

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TCSM2E block diagramTCSM2E block diagram

CPU186

ESO

ESI

V.24

TRUNKTIMINGBLOCK

LI

TRCI SUBA TRI CLOCKS

UB

+ 5V

VDU

ESO

ESI

Ater (BSC)

A(MSC)

TCSM2E

LIET2EET2EET2EET2E

TRCO

TR16-S

01

TR16-S

25

10

TR16-S

13

RAM

PROM

FLASH

LAPD

PSC1

1234567

O

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Transcoder hardwareTranscoder hardware

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Front panel of TRCO

Front panel of ET2E

Local user interfaceESI: ext. synchr. input ESO: ext. synchr. outputOn: If sychron. input with highest priority is used.Off: Opposite/ Plesiochrone

Clock alarm

Alarm TRCO

Alarm TR16

Reset flash

PCM interface

0

1

On: Basic time error (sychronisation)

Incoming direction alarm: -2Mb signal. missing -Loss of frame alignment -AIS alarm -BER > 10-3

B3 alarm: remote end alarm

Outgoing direction alarm: -ET sends AIS -Internal loop is created.

Both

PCM

0

PCM

1

B3

B3

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Exercise: Transcoder operationExercise: Transcoder operation

BSC MSCTCSM2

Complete the picture according to the TCSM2 in your classroom!

ET... ET...

ET...

ET...

ET...

65890 v4 /17.12.2003/MoWe15

Exercise in Notes Page