TABLE OF CONTENTS › content › dam › www › public › us › en › ...s_cbe5_n s_cbe4_n...

21
1 C 8 7 6 5 D B A A B D 8 7 6 5 2 1 2 3 3 4 4 C SHEET DATE MODIFIED: DESIGN NAME: SHEET TITLE: OF DESIGN ENGINEER: VERSION: 1-800-548-4725 or by visiting Intel's website at http://www.intel.com. other Intel literature may be obtained by calling written consent of Intel Corporation. in a retrieval system, or transmitted in any form or by any means without the express Except as permitted by such license, no part of this document may be reproduced, stored various entities, including Intel Corporation. Implementations of MPEG CODECs, or MPEG enabled platforms may require licenses from MPEG is an international standard for video compression/decompression promoted by ISO. available on request. Intel may make changes to specifications and product descriptions at any time, without notice. EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS PAGE 11 TABLE OF CONTENTS PAGE 2 PAGE 3 PAGE 5 PAGE 4 PRIMARY PCI BUS - EDGE CONNECTOR SECONDARY PCI BUS - SLOT PAGE 10 PAGE 9 PAGE 8 PAGE 7 PAGE 6 CPLD / HEX DISPLAY I2C / UART VOLTAGE REGULATORS DDR BATTERY BACKUP MICTOR CONNECTORS REVISION LOG PAGE 12 PAGE 13 PAGE 14 PAGE 15 PAGE 16 PAGE 17 PAGE 18 PAGE 19 PAGE 20 PAGE 21 Gb ETHERNET CONTROLLER GbE - POWER / LINDSAY - JTAG / RESET DDR-II 400 SERIES TERMINATION DDR-II 400 LAI Probe Connectors DDR-II 400 REG / PLL / SPD DDR-II 400 MEMORY DDR-II 400 TERMINATION PBI FLASH INTERFACE / RESET STRAPS INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL (R) PRODUCTS. NO LICENSE, GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PUROSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining applications. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall changes to them. the product to deviate from published specifications. Current characterized errata are This schematic is furnished under license and may only be used or copied in accordance with the terms of the license. The information in this manual is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by Intel Corporation. Intel Corporation assumes no responsibility or liability for any errors or inaccuracies that may appear in this document or any software that may be provided in association with this document. Contact your local Intel sales office or your distributor to obtain the latest AnyPoint, AppChoice, BoardWatch, BunnyPeople, CablePort, Celeron, Chips, CT Media, Dialogic, DM3, EtherExpress, ETOX, FlashFile, i386, i486, i960, iCOMP, InstantIP, Intel, Intel Centrino, Intel logo, Intel386, Intel486, Intel740, IntelDX2, IntelDX4, IntelSX2, Intel Create & Share, Intel GigaBlade, Intel InBusiness, Intel Inside, Intel Inside logo, Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel Play, Intel Play logo, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel TeamStation, Intel Xeon, Intel XScale, IPLink, Itanium, MCS, MMX, MMX logo, Optimizer logo, OverDrive, Paragon, PC Dads, PC Parents, PDCharm, Pentium, Pentium II Xeon, Pentium III Xeon, Performance at Your Command, RemoteExpress, SmartDie, Solutions960, Sound Mark, StorageExpress, The Computer Inside., The Journey Inside, TokenExpress, VoiceBrick, VTune, and Xircom are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. * Other names and brands may be claimed as the property of others. Copyright (C) 2004, Intel Corporation Copies of documents which have an ordering number and are referenced in this document, or specifications and before placing your product order. have no responsibility whatsoever for conflicts or incompatibilities arising from future P1 Intel(R) IQ80331 I/O Processor DDR-II 400 Evaluation Platform Board (IQ80331) IQ80331 DDR-II 400 BLOCK DIAGRAM IQ80331 - PRIMARY AND SECONDARY PCI IQ80331 - DDR / PBI / UART / I2C IQ80331 - POWER / GROUND P 1.0 INTEL(R) IQ80331 I/O PROCESSOR DDR-II 400 EVALUATION PLATFORM BOARD (IQ80331) SCD HARDWARE ENGINEERING 80331 DDR-II 400 CRB 9-29-2004_6:59 1 21 The IQ80331 may contain design defects or errors known as errata which may cause

Transcript of TABLE OF CONTENTS › content › dam › www › public › us › en › ...s_cbe5_n s_cbe4_n...

  • 1

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    1-800-548-4725 or by visiting Intel's website at http://www.intel.com.other Intel literature may be obtained by calling

    written consent of Intel Corporation.in a retrieval system, or transmitted in any form or by any means without the expressExcept as permitted by such license, no part of this document may be reproduced, stored

    various entities, including Intel Corporation.Implementations of MPEG CODECs, or MPEG enabled platforms may require licenses fromMPEG is an international standard for video compression/decompression promoted by ISO.

    available on request.

    Intel may make changes to specifications and product descriptions at any time, without notice.

    EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS

    PAGE 11

    TABLE OF CONTENTS

    PAGE 2

    PAGE 3

    PAGE 5

    PAGE 4

    PRIMARY PCI BUS - EDGE CONNECTOR

    SECONDARY PCI BUS - SLOT

    PAGE 10

    PAGE 9

    PAGE 8

    PAGE 7

    PAGE 6

    CPLD / HEX DISPLAY

    I2C / UART

    VOLTAGE REGULATORS

    DDR BATTERY BACKUP

    MICTOR CONNECTORS

    REVISION LOG

    PAGE 12

    PAGE 13

    PAGE 14

    PAGE 15

    PAGE 16

    PAGE 17

    PAGE 18

    PAGE 19

    PAGE 20

    PAGE 21

    Gb ETHERNET CONTROLLER

    GbE - POWER / LINDSAY - JTAG / RESET

    DDR-II 400 SERIES TERMINATION

    DDR-II 400 LAI Probe Connectors

    DDR-II 400 REG / PLL / SPD

    DDR-II 400 MEMORY

    DDR-II 400 TERMINATION

    PBI FLASH INTERFACE / RESET STRAPS

    INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL (R) PRODUCTS. NO LICENSE,

    GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FORSUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS ORIMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY ORWARRANTIES RELATING TO FITNESS FOR A PARTICULAR PUROSE, MERCHANTABILITY, OR INFRINGEMENTOF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are notintended for use in medical, life saving, life sustaining applications.

    Designers must not rely on the absence or characteristics of any features or instructionsmarked "reserved" or "undefined." Intel reserves these for future definition and shall

    changes to them.

    the product to deviate from published specifications. Current characterized errata are

    This schematic is furnished under license and may only be used or copied in accordancewith the terms of the license. The information in this manual is furnished forinformational use only, is subject to change without notice, and should not be construedas a commitment by Intel Corporation. Intel Corporation assumes no responsibility orliability for any errors or inaccuracies that may appear in this document or any softwarethat may be provided in association with this document.

    Contact your local Intel sales office or your distributor to obtain the latest

    AnyPoint, AppChoice, BoardWatch, BunnyPeople, CablePort, Celeron, Chips, CT Media,Dialogic, DM3, EtherExpress, ETOX, FlashFile, i386, i486, i960, iCOMP, InstantIP, Intel,Intel Centrino, Intel logo, Intel386, Intel486, Intel740, IntelDX2, IntelDX4, IntelSX2,Intel Create & Share, Intel GigaBlade, Intel InBusiness, Intel Inside, Intel Inside logo,Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel Play, Intel Play logo, IntelSingleDriver, Intel SpeedStep, Intel StrataFlash, Intel TeamStation, Intel Xeon, IntelXScale, IPLink, Itanium, MCS, MMX, MMX logo, Optimizer logo, OverDrive, Paragon, PC Dads,PC Parents, PDCharm, Pentium, Pentium II Xeon, Pentium III Xeon, Performance at YourCommand, RemoteExpress, SmartDie, Solutions960, Sound Mark, StorageExpress, The ComputerInside., The Journey Inside, TokenExpress, VoiceBrick, VTune, and Xircom are trademarksor registered trademarks of Intel Corporation or its subsidiaries in the United Statesand other countries.

    * Other names and brands may be claimed as the property of others.

    Copyright (C) 2004, Intel Corporation

    Copies of documents which have an ordering number and are referenced in this document, or

    specifications and before placing your product order.

    have no responsibility whatsoever for conflicts or incompatibilities arising from future

    P1

    Intel(R) IQ80331 I/O Processor DDR-II 400 Evaluation Platform Board (IQ80331)

    IQ80331 DDR-II 400 BLOCK DIAGRAM

    IQ80331 - PRIMARY AND SECONDARY PCI

    IQ80331 - DDR / PBI / UART / I2C

    IQ80331 - POWER / GROUND

    P 1.0INTEL(R) IQ80331 I/O PROCESSOR DDR-II 400 EVALUATION PLATFORM BOARD (IQ80331)SCD HARDWARE ENGINEERING 80331 DDR-II 400 CRB 9-29-2004_6:59 1 21

    The IQ80331 may contain design defects or errors known as errata which may cause

  • 80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING 9-23-2004_8:59 P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    INTEL(R) IQ80331 DDR-II 400 BLOCK DIAGRAM

    IQ80331 DDR-II 400 BLOCK DIAGRAM 212

    DDR-II 400

    GPIOs

    DDR SDRAMBattery Backup

    8 MB

    StrataFLASH

    JTAG

    Slot

    RS-232I2C

    Edge Connector

    HEXLED Buzzer

    Local Bus (PBI)Secondary PCI-X Bus (100MHz)Intel(R)

    80331 I/OProcessor

    RS-232

    Primary PCI-X Bus (133MHz)

    32 KB

    NV R

    AM

    GbECPLD

  • 80331_BGA829

    1_5V

    HPI_N

    NC_AA1

    NC_E7

    NC_F11

    NC_F7

    P_GNT_N

    P_REQ_N

    NC_H12

    NC_H7

    NC_H8NC_H9

    NC_J8

    NC_K2

    NC_K5

    NC_K6

    NC_T4

    NC_T8

    NC_U5NC_U6

    NC_U8

    NC_V7

    NC_V8

    NC_W7

    NC_W8

    P_ACK64_N

    P_AD0P_AD1

    P_AD10P_AD11P_AD12P_AD13P_AD14P_AD15P_AD16P_AD17P_AD18P_AD19

    P_AD2

    P_AD20P_AD21P_AD22P_AD23P_AD24P_AD25P_AD26P_AD27P_AD28P_AD29

    P_AD3

    P_AD30P_AD31P_AD32P_AD33P_AD34P_AD35P_AD36P_AD37P_AD38P_AD39

    P_AD4

    P_AD40P_AD41P_AD42P_AD43P_AD44P_AD45P_AD46P_AD47P_AD48P_AD49

    P_AD5

    P_AD50P_AD51P_AD52P_AD53P_AD54P_AD55P_AD56P_AD57P_AD58P_AD59

    P_AD6

    P_AD60P_AD61P_AD62P_AD63

    P_AD7P_AD8P_AD9

    P_C/BE0_NP_C/BE1_NP_C/BE2_NP_C/BE3_NP_C/BE4_NP_C/BE5_NP_C/BE6_NP_C/BE7_N

    P_CLK

    P_DEVSEL_N

    P_FRAME_N

    NC_R4

    P_IDSEL

    P_INTA_NP_INTB_NP_INTC_NP_INTD_N

    P_IRDY_N

    P_LOCK_N

    P_M66EN

    P_PAR

    P_PAR64

    P_PERR_N

    NC_H13

    P_RCOMP

    P_REQ64_N

    NC_T6

    P_SERR_N

    P_STOP_NP_TRDY_N

    VSS

    I/O Processor

    PART 8 OF 9

    PRIMARY PCI-X BUS

    Intel(R) 80331

    80331_BGA829

    NC_R25

    S_AD0S_AD1

    S_AD10S_AD11S_AD12S_AD13S_AD14S_AD15S_AD16S_AD17S_AD18S_AD19

    S_AD2

    S_AD20S_AD21S_AD22S_AD23S_AD24

    S_AD26S_AD27S_AD28S_AD29

    S_AD3

    S_AD30S_AD31S_AD32S_AD33S_AD34S_AD35S_AD36S_AD37

    S_AD39

    S_AD4

    S_AD40S_AD41S_AD42

    S_AD44S_AD45S_AD46S_AD47S_AD48

    S_AD5

    S_AD50S_AD51S_AD52S_AD53S_AD54S_AD55S_AD56S_AD57S_AD58S_AD59

    S_AD6

    S_AD60

    S_AD62S_AD63

    S_AD9

    S_C/BE0_NS_C/BE1_NS_C/BE2_NS_C/BE3_N

    S_C/BE5_NS_C/BE6_N

    S_CLKIN

    S_CLKO0S_CLKO1S_CLKO2S_CLKO3

    S_CLKOUT

    S_DEVSEL_N

    S_FRAME_N

    S_GNT0_NS_GNT1_NS_GNT2_NS_GNT3_N

    S_INTA_NS_INTB_NS_INTC_NS_INTD_N

    S_IRDY_N

    S_LOCK_N

    S_M66EN

    S_PAR

    S_PAR64

    S_PCIXCAP

    S_PERR_N

    S_RCOMP

    S_REQ3_N

    S_REQ64_N

    S_RST_N

    S_SERR_N

    S_STOP_N

    S_REQ2_N

    S_REQ0_N

    S_AD7S_AD8

    S_AD61

    S_AD49

    S_AD43

    S_AD38

    S_AD25

    S_C/BE7_N

    S_C/BE4_N

    S_TRDY_N

    S_ACK64_N

    S_REQ1_N

    SECONDARY PCI-X BUS

    Intel(R) 80331 I/O ProcessorPART 1 OF 9

    (I/O Processor BUS)

    80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    NCNC

    NC

    NC

    NC

    NC

    NC

    1%33.2

    NCNC

    NCNCNCNC

    NCNCNCNCNCNC

    NCNCNCNCNC

    NCNC

    GND

    GND

    NC

    NC

    1%33.2

    1%10

    0

    1%10

    0

    1%33.2

    1%33.2

    1%33.2

    NCNC

    GND

    NCNC

    5%8.

    2K

    P3_3V

    P1_5V

    0

    GND

    NC

    INTERRUPTS HEADER

    S_CLKO_SLOT_R

    S_CLKOUT_R

    12 R

    7R5

    NO

    _PO

    P

    6/B8P_M66EN

    P_CLK 6/C8

    HPI_N 3/C8

    P_AD[63:0]6/A8

    P_AD63

    P_AD0P_AD1P_AD2P_AD3P_AD4P_AD5P_AD6P_AD7P_AD8P_AD9P_AD10P_AD11P_AD12P_AD13P_AD14P_AD15P_AD16P_AD17P_AD18P_AD19P_AD20P_AD21P_AD22P_AD23P_AD24P_AD25P_AD26P_AD27P_AD28P_AD29P_AD30P_AD31P_AD32P_AD33P_AD34P_AD35P_AD36P_AD37P_AD38P_AD39P_AD40P_AD41P_AD42P_AD43P_AD44P_AD45P_AD46P_AD47P_AD48P_AD49P_AD50P_AD51P_AD52P_AD53P_AD54P_AD55P_AD56P_AD57P_AD58P_AD59P_AD60P_AD61P_AD62

    P_CBE[7:0]_N6/A8

    P_CBE7_N

    P_CBE0_NP_CBE1_NP_CBE2_NP_CBE3_NP_CBE4_NP_CBE5_NP_CBE6_N

    12

    R2D

    16

    P_REQ_N 6/C8

    P_GNT_N 6/C5P_IDSEL 6/C5

    6/D8P_INTD_N

    P_INTA_N 6/D5

    6/D5P_INTC_NP_INTB_N 6/D8

    7/C8 S_CLKO_SLOT

    S_CLKO_CPLD16/C8

    8/A7 S_CLKO_GBE

    S_CLKO_MICTOR20/D7

    21 R2D9

    6/B8P_SERR_NP_LOCK_N 6/B8

    21 R2D6

    21R2D13

    21

    R3C

    7

    12

    R4D

    4

    21R2D11

    P_PAR 6/B5P_STOP_N 6/B5P_TRDY_N 6/B5P_FRAME_N 6/B5P_IRDY_N 6/B8P_DEVSEL_N 6/B8P_PERR_N 6/B8

    P_PAR64 6/C2P_ACK64_N 6/A8P_REQ64_N 6/A5

    P_RCOMP

    21 R2D8

    123456789

    J2C13/B7,7/D8 S_INTA_N

    3/B7,7/D5 S_INTB_N

    3/B7,7/D8,8/A7 S_INTC_N

    3/B7,7/D5 S_INTD_N

    HPI_N3/B1

    S_REQ1_NS_REQ1_N8/A7

    S_ACK64_N7/A8,8/A7 S_ACK64_N

    S_TRDY_N7/B5,8/B7 S_TRDY_N

    S_CBE5_NS_CBE4_NS_CBE3_NS_CBE2_N

    S_CBE0_NS_CBE1_N

    S_CBE6_NS_CBE7_N

    7/A8,8/B7S_CBE[7:0]_N

    S_AD61S_AD60S_AD59S_AD58S_AD57S_AD56S_AD55S_AD54S_AD53S_AD52S_AD51S_AD50S_AD49S_AD48S_AD47S_AD46S_AD45S_AD44S_AD43S_AD42S_AD41S_AD40S_AD39S_AD38S_AD37S_AD36S_AD35S_AD34S_AD33S_AD32S_AD31S_AD30S_AD29S_AD28S_AD27S_AD26S_AD25S_AD24S_AD23S_AD22S_AD21S_AD20S_AD19S_AD18S_AD17S_AD16S_AD15S_AD14S_AD13S_AD12S_AD11S_AD10S_AD9S_AD8S_AD7S_AD6S_AD5S_AD4S_AD3S_AD2S_AD1S_AD0

    S_AD62S_AD637/A8,8/C8

    S_AD[63:0]

    S_REQ0_N7/C8 S_REQ0_N

    S_STOP_N7/B5,8/A7 S_STOP_N

    S_SERR_N7/B8,8/A7 S_SERR_N

    S_RST_N9/D6 S_RST_N

    S_REQ64_N7/A5,8/A7 S_REQ64_N

    S_PERR_N7/B8,8/A7 S_PERR_N

    S_PCIXCAP7/B7 S_PCIXCAP

    S_PAR647/C1,8/B7 S_PAR64

    S_PAR7/B5,8/B7 S_PAR

    S_M66EN7/B8,8/A7 S_M66EN

    S_LOCK_N7/B8,8/A7 S_LOCK_N

    S_IRDY_N7/B8,8/B7 S_IRDY_N

    S_INTD_N3/C8,7/D5

    S_INTC_N3/D8,7/D8,8/A7

    S_INTB_N3/D8,7/D53/D8,7/D8 S_INTA_N

    8/A7 S_GNT1_N

    7/C5 S_GNT0_N

    S_FRAME_N7/B5,8/B7 S_FRAME_N

    S_DEVSEL_N7/B8,8/A7 S_DEVSEL_N

    S_RCOMP

    S_CLKIN

    S_CLKO_CPLD_RS_CLKO_GBE_R

    S_CLKO_MICTOR_R

    9-23-2004_9:20INTEL(R) IQ80331 PRIMARY AND SECONDARY PCI 213

    R25

    E24F23

    E20H19G19F19H18G18B27C26B26A26

    E23

    D25C25A25D24A24

    B23D22C22A22

    H22

    B21A21P23P24N24N22M25M23

    L23

    G22

    L24L22K22

    J26J25J23J22U29

    F22

    T27R26R28R29P26P27P29N28N29N27

    H21

    M29

    M26L29

    F20

    H20H17C27D27

    K28L26

    G27

    H24G24F25H23

    G25

    F29

    C28

    A23B24P22U25

    U27U28T24R23

    E29

    E27

    C20

    F26

    K29

    R21

    G29

    T29

    K25

    J29

    R22

    E26

    D28

    E21

    N25

    G21D21

    M28

    T26

    K24

    M22

    C23

    L27

    K27

    E28

    J28

    F28

    U3E3 Y1

    AA8

    AA1

    E7

    F11

    F7

    G12

    H11

    H12

    H7

    H8H9

    J8

    K2

    K5

    K6

    T4

    T8

    U5U6

    U8

    V7

    V8

    W7

    W8

    H6

    H1H3

    D1D2D3C2C3B3A4C5A5D6

    H4

    B6A6C7B7D8C8A8D9B9A9

    G1

    C10B10K8L8L7L6M8M7M5N8

    G2

    N6N5P8P7P6R5R7R8J2J1

    G3

    K1L4L3L1M4M2M1N3N2N1

    F1

    P1P3P4R1

    F2F4E4

    E1B4D5A7U1U2T3U3

    G9

    G5

    E6

    R4

    K3

    W3V5V4V2

    F5

    J7

    E3

    C4

    R2

    J4

    H13

    V1

    G11

    T6

    J5

    G6H10

    W4

    U3E3

  • 80331_BGA829

    BA[0]BA[1]

    CAS_N

    CB[0]CB[1]CB[2]CB[3]CB[4]CB[5]CB[6]CB[7]

    CKE[0]CKE[1]

    DDRCRES0

    DDRDRVCRES

    DDRRES[1]DDRRES[2]

    DDRSLWCRES

    DDRVREF

    DM[0]DM[1]DM[2]DM[3]DM[4]DM[5]DM[6]DM[7]DM[8]

    DQ0DQ1

    DQ10DQ11DQ12DQ13DQ14DQ15DQ16DQ17DQ18DQ19

    DQ2

    DQ20DQ21DQ22DQ23DQ24DQ25DQ26DQ27DQ28DQ29

    DQ3

    DQ30DQ31DQ32DQ33DQ34DQ35DQ36DQ37DQ38DQ39

    DQ4

    DQ40DQ41DQ42DQ43DQ44DQ45DQ46DQ47DQ48DQ49

    DQ5

    DQ50DQ51DQ52DQ53DQ54DQ55DQ56DQ57DQ58DQ59

    DQ6

    DQ60DQ61DQ62DQ63

    DQ7DQ8DQ9

    DQS[0]

    DQS[1]

    DQS[2]

    DQS[3]

    DQS[4]

    DQS[5]

    DQS[6]

    DQS[7]

    DQS[8]

    DQS_N[0]

    DQS_N[1]

    DQS_N[2]

    DQS_N[3]

    DQS_N[4]

    DQS_N[5]

    DQS_N[6]

    DQS_N[7]

    DQS_N[8]

    MA[0]

    MA[10]MA[11]MA[12]MA[13]

    MA[1]MA[2]MA[3]MA[4]MA[5]MA[6]MA[7]MA[8]MA[9]

    M_CK[0]M_CK[0]_N

    M_CK[1]M_CK[1]_N

    M_CK[2]M_CK[2]_N

    M_RST_N

    ODT[0]ODT[1]

    RAS_NWE_N

    CS[0]_NCS[1]_N

    PART 3 OF 9

    DDR SDRAM INTERFACE

    Intel(R) 80331 I/O Processor

    80331_BGA829

    A0A1

    A16A17A18A19

    A2

    A20A21A22

    AD0AD1

    AD10AD11AD12AD13AD14AD15

    AD2AD3AD4AD5AD6AD7AD8AD9

    ALE

    GPIO[0]/U0_RXDGPIO[1]/U0_TXD

    GPIO[2]/U0_CTS_NGPIO[3]/U0_RTS_N

    GPIO[4]/U1_RXDGPIO[5]/U1_TXD

    GPIO[6]/U1_CTS_NGPIO[7]/U1_RTS_N

    SCD0

    SCD1

    SCL0

    SCL1

    POE_NPWE_N

    PCE0_NPCE1_N

    PBI / GPIO

    PART 2 OF 9

    Intel(R) 80331 I/O Processor

    80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING 9-23-2004_8:59 P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    GND

    NCNC

    NCNC

    NC

    0.1UF16V

    0.1UF16V

    1%10

    0

    NC

    NC

    0.1UF16V

    1%28

    7

    1%82

    5

    1%53.6

    0.5%

    40.2

    0.1UF16V

    GND

    P1_8V

    GND

    GND

    5%15

    001%

    100

    GND

    PERIPHERAL BUS INTERFACE (PBI)

    DDR INTERFACE

    I2C BUS INTERFACE

    UART INTERFACE

    NOTE: Resistor R7 populated to reduce IOPcurrent draw while DDR is in self refresh mode.

    NOTE: Place DDRVREF voltage divider circuitry in close proximity to the 80331 IOP.

    NOTE: This supply is not isolated (+1_8V_ISOL)

    21

    R4D

    31

    2R

    3C6

    DDRRES2DDRRES1

    PBI_A[2:0]15/D7,20/C5

    PBI_A2

    PBI_A0PBI_A1

    15/D7,16/B8,20/D5PBI_A[22:16]

    PBI_A16PBI_A17PBI_A18PBI_A19PBI_A20PBI_A21PBI_A22

    15/D5,16/C8,20/D7PBI_AD[15:0]

    PBI_AD15PBI_AD14PBI_AD13PBI_AD12PBI_AD11PBI_AD10PBI_AD9PBI_AD8PBI_AD7PBI_AD6PBI_AD5PBI_AD4PBI_AD3PBI_AD2PBI_AD1PBI_AD0

    DDR_CB[7:0]10/C4

    DDR_CB1

    DDR_CB7DDR_CB6DDR_CB5DDR_CB4DDR_CB3DDR_CB2

    DDR_CB0

    DDR_DQ[63:0]10/D7,11/D8

    DDR_DQ59DDR_DQ58DDR_DQ57DDR_DQ56DDR_DQ55DDR_DQ54DDR_DQ53DDR_DQ52DDR_DQ51DDR_DQ50DDR_DQ49DDR_DQ48DDR_DQ47DDR_DQ46DDR_DQ45DDR_DQ44DDR_DQ43DDR_DQ42DDR_DQ41DDR_DQ40DDR_DQ39DDR_DQ38DDR_DQ37DDR_DQ36DDR_DQ35DDR_DQ34DDR_DQ33DDR_DQ32DDR_DQ31DDR_DQ30DDR_DQ29DDR_DQ28DDR_DQ27DDR_DQ26DDR_DQ25DDR_DQ24DDR_DQ23DDR_DQ22DDR_DQ21DDR_DQ20DDR_DQ19DDR_DQ18DDR_DQ17DDR_DQ16DDR_DQ15DDR_DQ14DDR_DQ13DDR_DQ12DDR_DQ11DDR_DQ10DDR_DQ9DDR_DQ8DDR_DQ7DDR_DQ6DDR_DQ5DDR_DQ4DDR_DQ3

    DDR_DQ0DDR_DQ1DDR_DQ2

    DDR_DQ63DDR_DQ62DDR_DQ61DDR_DQ60

    DDR_DM[8:0]10/D4,11/D8

    DDR_DM1

    DDR_DM6

    DDR_DM8

    DDR_DM5DDR_DM4DDR_DM3DDR_DM2

    DDR_DM7

    DDR_DM0

    DDR_A[13:0]11/D3,12/C5,14/D8

    DDR_A13

    DDR_A0DDR_A1DDR_A2DDR_A3DDR_A4DDR_A5DDR_A6DDR_A7DDR_A8DDR_A9

    DDR_A10DDR_A11DDR_A12

    10/B4,11/D6DDR_DQS_P0

    2

    1 C3C621

    R3C

    4

    DDRCRES0

    1 2R3C5 15/A8,16/C8,20/C5PBI_ALE

    DDR_BA1 11/C3,12/C5,14/B7

    DDR_BA0 11/D1,12/C5,14/B7

    DDR_CKE0 11/C1,12/D6,14/A7

    11/C1,12/D5,14/B7DDR_ODT0_N

    11/C3,12/D5,14/A7DDR_CS0_NDDR_M_RST_N 12/D5,12/B7

    11/D3,12/D5,14/B7DDR_WE_NDDR_RAS_N 11/C1,12/D5,14/B7

    DDR_CAS_N 11/C1,12/D5,14/B7

    10/B4,11/B8DDR_DQS_N1

    DDR_DQS_P6 10/A4,11/C310/A4,11/D5DDR_DQS_N5

    DDR_DQS_N0 10/B4,11/D8

    10/A4DDR_DQS_P8

    10/A4DDR_DQS_N8

    10/A4,11/A3DDR_DQS_P7

    10/A4,11/D3DDR_DQS_P5

    DDR_DQS_P4 10/B4,11/B3

    10/B4,11/A6DDR_DQS_P3

    DDR_DQS_P2 10/B4,11/C6

    10/B4,11/B6DDR_DQS_P1

    10/B4,11/A8DDR_DQS_N3

    DDR_DQS_N4 10/A4,11/B5

    10/A4,11/A5DDR_DQS_N7

    12

    R3C

    2

    12

    R3C

    3

    DDR_CK0_P 12/B7,14/D6DDR_CK0_N 12/B7,14/C6

    2

    1 C6P12

    12

    R4D

    2

    1

    2

    C4D5

    1

    2

    C6P9

    DDRSLWCRESDDRDRVCRES

    DDR_DQS_N2 10/B4,11/C8

    DDR_DQS_N6 10/A4,11/C5

    8/B4,17/C7SCD18/B4,17/C7SCL1

    DDR_I2C_SCL 12/B2,17/C5

    16/C8,20/C5,20/C5PBI_CE1_N15/C8,20/C5PBI_CE0_N

    15/C7,16/C8,20/C5PBI_WE_N15/C7,16/C8,20/C5PBI_OE_N

    U1_TXD 17/B7

    U1_RXD 17/B7

    U0_RTS_N 17/B7

    U0_CTS_N 17/B7

    U0_TXD 17/B7U0_RXD 17/B7

    U1_RTS_N 17/B7

    U1_CTS_N 17/B7

    12/B2,17/C5DDR_I2C_SDA

    PB_ALE_R

    4 21INTEL(R) IQ80331 - DDR / PBI / UART / I2C

    Y25AA29

    W29Y27U21V22

    W21

    Y29Y28W22

    V29V28

    T21Y24U24V25U22Y22

    W24V23T23V26T22W23W26W27

    AA28

    AB26AB27AA21AA22AC26AC25AB23AB24

    AB21

    AC24

    AA23

    AB22

    V21Y21

    AA26AA25

    U3E3

    AD18AD13

    AC21

    AE15AF15AD17AC16AC15AC14AD16AE17

    AG4AH4

    AC27

    AC29

    AB28AB29

    AC28

    AC1

    AE1AG5AJ9AJ13AJ19AE21AG25AE27AH15

    AD5AD4

    AJ7AG7AD8AE6AH6AJ6AG8AJ8AG10AD11

    AF3

    AH7AF8AD10AE10AH12AJ12AE13AD14AJ11AF12

    AG2

    AF14AG14AF18AE18AG20AJ21AJ18AH18AJ20AH20

    AD2

    AJ22AG22AG23AF23AH21AF21AJ24AH24AF24AF25

    AD1

    AG26AG27AE24AE23AH26AH27AF28AE26AD29AD28

    AF1

    AG28AF27AD25AD26

    AF2AE7AF6

    AE4

    AJ5

    AF9

    AG13

    AF19

    AH23

    AJ26

    AE29

    AG16

    AE3

    AJ4

    AE9

    AH13

    AG19

    AJ23

    AJ25

    AF29

    AF16

    AC13

    AC18AC8AF5AD22

    AE12AC12AF11AG11AH10AH9AD7AJ10AC9

    AJ16AJ17AJ14AJ15AH17AG17

    AH3

    AC22AB20

    AC19AD20

    AE20AD23

    U3E3

  • 80331_BGA829

    VCC13_1VCC13_2VCC13_3VCC13_4VCC13_5VCC13_6VCC13_7

    VCC15B_1

    VCC15B_10VCC15B_11VCC15B_12VCC15B_13VCC15B_14

    VCC15B_2VCC15B_3VCC15B_4VCC15B_5VCC15B_6VCC15B_7VCC15B_8VCC15B_9

    VCC15C_1

    VCC15C_10VCC15C_11VCC15C_12VCC15C_13VCC15C_14VCC15C_15VCC15C_16VCC15C_17VCC15C_18VCC15C_19

    VCC15C_2

    VCC15C_20VCC15C_21VCC15C_22VCC15C_23VCC15C_24VCC15C_25VCC15C_26VCC15C_27VCC15C_28VCC15C_29

    VCC15C_3

    VCC15C_30VCC15C_31VCC15C_32VCC15C_33

    VCC15C_4VCC15C_5VCC15C_6VCC15C_7VCC15C_8VCC15C_9

    VCC15E_1VCC15E_2VCC15E_3VCC15E_4VCC15E_5VCC15E_6VCC15E_7

    VCC15F_1

    VCCDDR_1

    VCCDDR_10VCCDDR_11VCCDDR_12VCCDDR_13VCCDDR_14VCCDDR_15VCCDDR_16VCCDDR_17VCCDDR_18VCCDDR_19

    VCCDDR_2

    VCCDDR_20VCCDDR_21VCCDDR_22VCCDDR_23VCCDDR_24VCCDDR_25VCCDDR_26VCCDDR_27VCCDDR_28VCCDDR_29

    VCCDDR_3VCCDDR_4VCCDDR_5VCCDDR_6VCCDDR_7VCCDDR_8VCCDDR_9

    VCC_PLL1

    VCC_PLL2

    VCC_PLL4

    VCC_PLL5

    VSSA1

    VSSA2

    VSSA4

    VSSA5

    VSS_K15

    VSS_L15Part 4 of 9

    Intel(R) 80331I/O Processor

    80331_BGA829

    VSS_1

    VSS_10

    VSS_100VSS_101VSS_102VSS_103VSS_104VSS_105VSS_106VSS_107VSS_108VSS_109

    VSS_11

    VSS_110VSS_111VSS_112VSS_113

    VSS_114VSS_115VSS_116VSS_117VSS_118VSS_119

    VSS_12

    VSS_120VSS_121VSS_122VSS_123VSS_124VSS_125VSS_126VSS_127VSS_128VSS_129

    VSS_13

    VSS_130VSS_131VSS_132VSS_133VSS_134VSS_135VSS_136VSS_137VSS_138VSS_139

    VSS_14

    VSS_140VSS_141VSS_142VSS_143VSS_144VSS_145VSS_146VSS_147VSS_148VSS_149

    VSS_15

    VSS_150VSS_151VSS_152VSS_153VSS_154VSS_155VSS_156VSS_157VSS_158VSS_159

    VSS_16

    VSS_160VSS_161

    VSS_162VSS_163VSS_164VSS_165VSS_166VSS_167VSS_168VSS_169

    VSS_17

    VSS_170VSS_171VSS_172VSS_173VSS_174VSS_175VSS_176VSS_177VSS_178VSS_179

    VSS_18

    VSS_180VSS_181VSS_182VSS_183VSS_184VSS_185VSS_186VSS_187VSS_188VSS_189

    VSS_19

    VSS_190VSS_191VSS_192VSS_193VSS_194VSS_195VSS_196VSS_197VSS_198VSS_199

    VSS_2

    VSS_20

    VSS_200VSS_201VSS_202VSS_203VSS_204VSS_205VSS_206VSS_207VSS_208VSS_209

    VSS_21

    VSS_210VSS_211VSS_212VSS_213VSS_214VSS_215VSS_216

    VSS_217VSS_218VSS_219

    VSS_22

    VSS_220

    VSS_23VSS_24VSS_25VSS_26VSS_27VSS_28VSS_29

    VSS_3

    VSS_30VSS_31VSS_32VSS_33VSS_34VSS_35VSS_36VSS_37VSS_38VSS_39

    VSS_4

    VSS_40VSS_41VSS_42VSS_43VSS_44VSS_45VSS_46VSS_47VSS_48

    VSS_5

    VSS_50VSS_52VSS_53VSS_54VSS_55VSS_56VSS_57VSS_58VSS_59

    VSS_6

    VSS_60VSS_61VSS_62VSS_63VSS_64VSS_65VSS_66VSS_67VSS_68VSS_69

    VSS_7

    VSS_70VSS_71VSS_72VSS_73VSS_74VSS_75VSS_76VSS_77VSS_78VSS_79

    VSS_8

    VSS_80VSS_81VSS_82VSS_83VSS_84VSS_85VSS_86VSS_87VSS_88VSS_89

    VSS_9

    VSS_90VSS_91VSS_92VSS_93VSS_94VSS_95VSS_96VSS_97VSS_98VSS_99

    I/O Processor

    PART 6 OF 9

    Intel(R) 80331

    80331_BGA829

    VCC33_10VCC33_11VCC33_12VCC33_13VCC33_14VCC33_15VCC33_16VCC33_17VCC33_18VCC33_19VCC33_20VCC33_21VCC33_22VCC33_23VCC33_24VCC33_25VCC33_26VCC33_27VCC33_28VCC33_29VCC33_30VCC33_31

    VCC33_32VCC33_33VCC33_34VCC33_35VCC33_36VCC33_37VCC33_38VCC33_39VCC33_40VCC33_41VCC33_42VCC33_43VCC33_44VCC33_45VCC33_46VCC33_47VCC33_48VCC33_49

    VCC33_5VCC33_6

    VCC33_7VCC33_8VCC33_9

    VCC33_2VCC33_1

    VCC33_3VCC33_4

    Part 5 of 9

    Intel(R) 80331I/O Processor

    80331_BGA829

    NC_A11NC_A12

    NC_A18 NC_A19NC_A20

    NC_B12

    NC_B17

    NC_B18

    NC_C11

    NC_C12

    NC_C14

    NC_C16NC_C17

    NC_C19

    NC_D11

    NC_D12

    NC_D14NC_D15

    NC_D16

    NC_D18NC_D19

    NC_E12NC_E13

    NC_E15

    NC_E17

    NC_E18

    NC_F13NC_F14

    NC_F16NC_F17

    NC_G14

    NC_G16

    VCC15_A15

    VCC15_H15

    VSS_A14

    VSS_A16VSS_B15

    VSS_G15

    I/O Processor

    NC

    PART 9 of 9

    Intel(R) 80331

    80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    GND

    +1_8

    V_I

    SO

    L

    22UFX5R

    22UFX5R

    22UFX5R

    22UFX5R

    22UFX5R

    22UFX5R

    NC

    NCNCNC

    NCNCNC

    NCNCNC

    NCNCNC

    NCNC

    NC

    NCNCNC

    NCNCNC

    NCNCNC

    NCNCNC

    NCNC

    GND

    10UFX5R

    GND

    0.1UF16V

    GND

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    1%0.5

    1%0.5

    P1_5V

    0.1UF16V 0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    GND

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V 0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V 0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V 0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    4.7UH

    4.7UH

    10UFX5R

    10UFX5R

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    22UFX5R

    NCNC

    P1_5V

    22UFX5R

    P1_5V

    P1_5V

    22UFX5R

    22UFX5R

    GND

    10UFX5R

    10UFX5R

    150UFPOLYMER

    1%0.5

    1%0.5

    22UFX5R

    GND

    P1_5V

    GND

    P1_5V

    P1_5V

    P1_5V

    P1_5V

    GND

    P1_35V

    P3_3V

    P1_35V

    P1_5V

    P1_5V

    4.7UH

    4.7UH

    P3_3V

    P3_3V

    P3_3V

    +1_8

    V_I

    SO

    L

    GND

    P1_8V

    0.1UF16V 22UF

    X5R22UFX5R

    0.1UF16V

    GND

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V22UF

    X5R22UFX5R

    0.1UF16V

    0.1UF16V

    0.1UF16V

    150UFPOLYMER

    0.1UF16V

    FILTERED PHASE LOCK-LOOP SUPPLY

    NOTE: Route these as differential Pairs.

    NOTE: 1.8V for DDR II.

    NOTE: Place near IOP BGA as much as fits.

    IOP PWR & GND PINS

    5 on 5 in Breakout.25 on 5 to CAP.

    1

    2

    C7P19

    2

    1 C4D9 1

    2

    C7P171

    2

    C5P4 1

    2

    C6P211

    2

    C7P181

    2

    C6N1 1

    2

    C6P161

    2

    C7N51

    2

    C6P191

    2

    C6N21

    2

    C6P181

    2

    C5P51

    2

    C6P71

    2

    C6P201

    2

    C6P81

    2

    C6P17

    1

    2

    C4D3 1

    2

    C3C11

    2

    C4D2

    2

    1 C3C2

    1 2

    1 2

    2

    1 C6R1

    1 2R6R3

    1 2R7P1

    2

    1 C2E2

    2

    1 C5D8

    2

    1 C8P3

    VSSA2

    2

    1 C7N3

    VCC_PLL4

    VSSA5

    VSSA4

    VCC_PLL2

    VCC_PLL1

    2

    1 C7P15

    2

    1 C6R2

    VCC_PLL2_L

    1

    2

    C5D5

    2

    1 C7P12

    2

    1 C7P141

    2

    C2D7

    2

    1 C2D41

    2

    C5R2

    1

    2

    C7R31

    2

    C8P5

    VCC_PLL5_L

    VCC_PLL4_L

    VCC_PLL1_L

    1 2

    1 2

    2

    1 C7P131

    2

    C5P3

    2

    1 C5R31

    2

    C5R12

    1 C5E4 1

    2

    C5E5

    2

    1 C6E2 1

    2

    C5E3

    2

    1 C5D9

    2

    1 C7N41

    2

    C3E2

    2

    1 C7R11

    2

    C7P8

    2

    1 C8N111

    2

    C8P2

    2

    1 C4E2 1

    2

    C7P3

    2

    1 C7N2 1

    2

    C8P1

    2

    1 C6R51

    2

    C7P52

    1 C3C8 1

    2

    C7P11

    2

    1 C7R2 1

    2

    C8N12

    2

    1 C8R1

    1

    2

    C4D72

    1 C5D61

    2

    C6P11

    2

    1 C5P2 1

    2

    C6P13

    2

    1 C4D6

    2

    1 C2D21

    2

    C3E1

    2

    1 C7P101

    2

    C7P92

    1 C7P7

    1 2R6R2

    1 2R7N1

    VCC_PLL5

    2

    1 C2E1

    2

    1 C2D3

    2

    1 C2C5

    2

    1 C7P2

    2

    1 C6P10

    2

    1 C4D4

    VSSA1

    1

    2

    C4D11

    2

    C2D6

    1

    2

    C3C41

    2

    C3C5

    1

    2

    C2E4

    1

    2

    C1B1

    5 21INTEL(R) IQ80331 IOP POWER / GROUND 9-23-2004_9:19

    A11A12

    A18 A19A20

    B12

    B17

    B18

    C11

    C12

    C14

    C16C17

    C19

    D11

    D12

    D14D15

    D16

    D18D19

    E12E13

    E15

    E17

    E18

    F13F14

    F16F17

    G14

    G16

    A15

    H15

    A14

    A16B15

    G15

    U3E3

    P21N20N23N26M21M27L20L25K17K19K21J18J20J24J27

    H26G23F21D26C21C24C29

    W5V3U7R3R6M3M6L5J3H5G10F3F6E9D4C1C6C9

    U20U26

    R20R24R27

    Y26AA24

    W20V24

    U3E3

    AJ27

    AG1

    T12T14T16T18T20T25T28R9

    R11R13

    AG6

    R17R19

    P2P5

    P10P12P16P18P20P25

    AG9

    P28N4N7N9N11N13N15N17N19N21

    AG12

    M10M14M16M20M24L2L9L11L13L14

    AG15

    L16L17L19L21L28K4K7K12K14K16

    AG18

    K18K20K23K26J6J9J11J13J15J17

    AG21

    J19J21

    H2H14H16H25H27H28H29G4

    AG24

    G7G8G13G17G20G26G28F8F9F10

    AG29

    F12F15F18F24F27E2E5E8E10E11

    AF7

    E19E22E25D7D10D13D17D20D23D29

    AH2

    AE2

    C15B2B5B8B11B13B14B16B19B20

    AE5

    B22B25B28A3A10A17A27

    AC3AC5AC6

    AE8

    AG3

    AE11AE14AE16AE19AE22AE25AE28

    AH5

    AD3AD9

    AD15AD21AD27AC4AC7

    AC11AC17AC23

    AH8

    AC2AB2AB5AB8

    AB10AB12AB14AB16AB18

    AH14

    AB25AA3AA6AA9

    AA11AA13AA15AA17AA19

    AH19

    AA27Y3Y4Y7

    Y10Y12Y14Y16Y18Y20

    AH22

    Y23W2W9

    W11W13W15W17W19W25W28

    AH25

    V6V10V12V14V16V18V20V27U4U9

    AH28

    U11U13U15U17U19U23

    T2T5T7

    T10

    U3E3Y9Y11Y13

    W10W12V13U12

    V9

    K10K11K13J10J12

    U10T9R10P9N10M9L10K9

    Y15

    U14U16U18T11T13T15T17T19R12R14

    Y17

    R18P11P15P17P19N12N14N16N18M13

    Y19

    M15M17L12L18

    W14W16W18V15V17V19

    J14J16E14E16C13C18A13

    V11

    AJ3

    AF26AD6

    AD12AD19AD24AC10AC20

    AB9AB11AB13

    AH11

    AB15AB17AB19

    AB7AA10AA12AA14AA16AA18AA20

    AH16AF4

    AF10AF13AF17AF20AF22

    M19

    M11

    R15

    P13

    M18

    M12

    R16

    P14

    K15

    L15

    U3E3

  • 80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    X7RCC0603

    .01UF

    10UFX5R

    10UFX5R

    10UFX5R

    10UFX5R

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    P3_3V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    GND

    0.1UF16V

    0.1UF16V

    0.1UF16V

    P5V

    0.1UF16V

    GNDGND

    P5V

    P3_3VP3_3V

    GND

    NC

    NC

    NC

    NC

    NC

    NC

    GND

    P12V

    +12V

    +3.3V1

    +3.3V10

    +3.3V11

    +3.3V12

    +3.3V2

    +3.3V3

    +3.3V4

    +3.3V5

    +3.3V6

    +3.3V7

    +3.3V8

    +3.3V9

    +3.3VAUX

    +3.3VIO1

    +3.3VIO2

    +3.3VIO3

    +3.3VIO4

    +3.3VIO5

    +5V1

    +5V2

    +5V3

    +5V4

    +5V5

    +5V6

    +5V7

    +5V8

    -12V

    ACK64_N

    AD00AD01

    AD02

    AD03

    AD04AD05

    AD06

    AD07

    AD08

    AD09

    AD10

    AD11AD12

    AD13

    AD14

    AD15

    AD16AD17

    AD18

    AD19

    AD20AD21

    AD22

    AD23

    AD24

    AD25

    AD26AD27

    AD28

    AD29

    AD30AD31

    CBE0_N

    CBE1_N

    CBE2_N

    CBE3_N

    CLK

    DEVSEL_N

    FRAME_N

    GND1

    GND10

    M66EN

    GND12

    GND13

    GND14

    GND15

    GND16

    GND17

    GND18

    GND19

    GND2

    GND20

    GND21

    GND22

    GND3

    GND4

    GND5

    GND6

    GND7

    GND8

    GNT_N

    IDSEL

    INTA_N

    INTB_N INTC_N

    INTD_N

    IRDY_N

    LOCK_N

    PAR

    PCIXCAP

    PERR_N

    PME_N

    PRSNT1_N

    PRSNT2_N

    REQ64_N

    REQ_N

    RST_N

    RSVD1

    RSVD2

    RSVD3

    RSVD4

    RSVD5

    RSVD6

    SERR_N

    STOP_N

    TCK

    TDITDO

    TMS

    TRDY_N

    TRST_N

    PART 1 of 2PCI - EDGE CONNECTOR

    Key

    ContinuedKey

    +3.3VIO10

    +3.3VIO11

    +3.3VIO6

    +3.3VIO7

    +3.3VIO8

    +3.3VIO9

    AD32

    AD33

    AD34AD35

    AD36

    AD37

    AD38AD39

    AD40

    AD41

    AD42AD43

    AD44

    AD45

    AD46AD47

    AD48

    AD49

    AD50AD51

    AD52

    AD53

    AD54AD55

    AD56

    AD57

    AD58AD59

    AD60

    AD61

    AD62AD63

    CBE4_N

    CBE5_NCBE6_N

    CBE7_NGND23

    GND24

    GND25

    GND26

    GND27

    GND28

    GND29

    GND30

    GND31

    GND32

    GND33

    GND34

    GND35

    GND36

    GND37

    GND38

    PAR64

    RSVD10

    RSVD11

    RSVD7

    RSVD8

    RSVD9

    PCI - EDGE CONNECTOR

    Key Continued

    PART 2 of 2

    0.1UF16V

    0.1UF16V0.1UF16V

    GND

    N12V

    GND GND

    22UFTANT

    X7RCC0603

    .01UF 22UFTANT

    P5V

    N12V

    NC

    NC

    NC

    NC

    0.1UF16V

    GND

    P12V

    NC

    NC

    NC

    NC

    NC

    P3_3V P3_3V

    NOTE: Route 3_3V_AUX as a 30 mil trace.

    P_CBE[7:0]_N3/C2

    P_CBE1_N

    P_CBE2_N

    P_CBE3_N

    P_CBE5_N

    P_CBE7_N

    P_CBE0_N

    P_CBE4_N

    P_CBE6_N

    3/D2P_AD[63:0]

    P_AD31

    P_AD29

    P_AD1 P_AD0

    P_AD2

    P_AD4

    P_AD6

    P_AD9

    P_AD11

    P_AD13

    P_AD15

    P_AD16

    P_AD18

    P_AD20

    P_AD22

    P_AD24

    P_AD26

    P_AD28

    P_AD30

    P_AD37

    P_AD39

    P_AD41

    P_AD43

    P_AD45

    P_AD47

    P_AD49

    P_AD51

    P_AD53

    P_AD55

    P_AD57

    P_AD59

    P_AD61

    P_AD63

    P_AD35

    P_AD33

    P_AD32

    P_AD34

    P_AD36

    P_AD40

    P_AD42

    P_AD44

    P_AD46

    P_AD62

    P_AD60

    P_AD58

    P_AD56

    P_AD54

    P_AD52

    P_AD50

    P_AD48

    P_AD38

    P_AD3

    P_AD5

    P_AD7

    P_AD8

    P_AD10

    P_AD12

    P_AD14

    P_AD17

    P_AD19

    P_AD21

    P_AD23

    P_AD25

    P_AD27

    3_3V_AUX 7/C5

    P_PCIXCAP

    2

    1 C3E4

    21 C2E9

    1

    2

    C8R51

    2

    C2E6

    P_REQ64_N 3/B2

    P_PAR 3/B2

    P_STOP_N 3/B2

    P_TRDY_N 3/B2

    P_FRAME_N 3/B2

    P_RST_N 9/D6

    P_GNT_N 3/B2

    PCI_PME_N 7/C5,8/A7

    P_IDSEL3/B2

    1

    2

    C2E72

    1 C8R21

    2

    C5E9

    A75

    A84

    B70

    B79

    B88

    A66

    A91

    B90

    A89B89

    A88

    B87

    A86B86

    A85

    B84

    A83B83

    A82

    B81

    A80B80

    A79

    B78

    A77B77

    A76

    B75

    A74B74

    A73

    B72

    A71B71

    A70

    B69

    A68B68

    B66

    A65B65

    A64B64

    B67

    B73

    B76

    B82

    B85

    B91

    B94

    A63

    A69

    A72

    A78

    A81

    A87

    A90

    A93

    A67

    A92

    A94

    B63

    B92

    B93

    J1E3

    A2

    B25

    A39

    A45

    A53

    B31

    B36

    B41

    B43

    B54

    A21

    A27

    A33

    A14

    B19

    B59

    A10

    A16

    A59

    B5

    B6

    B61

    B62

    A5

    A8

    A61

    A62

    B1

    B60

    A58B58

    A57

    B56

    A55B55

    A54

    B53

    B52

    A49

    B48

    A47B47

    A46

    B45

    A44

    A32B32

    A31

    B30

    A29B29

    A28

    B27

    A25

    B24

    A23B23

    A22

    B21

    A20B20

    A52

    B44

    B33

    B26

    B16

    B37

    A34

    B3

    B46

    B49

    B57

    A50

    A51

    A18

    A24

    A30

    A35

    A37

    B50

    A42

    A48

    A56

    B51

    B15

    B17

    B22

    B28

    B34

    A17

    A26

    A6

    B7 A7

    B8

    B35

    B39

    A43

    B38

    B40

    A19

    B9

    B11

    A60

    B18

    A15

    B10

    B14

    A9

    A11

    A40

    A41

    B42

    A38

    B2

    A4B4

    A3

    A36

    A1

    J1E31

    2

    C6R41

    2

    C4E5

    2

    1 C8R4

    2

    1 C2E8

    2

    1 C5R51

    2

    C3E3

    2

    1 C5R4 1

    2

    C4E1

    2

    1 C5E8

    2

    1 C6R3

    P_M66EN3/B1

    3/A2 P_CLK

    P_PAR64 3/B2

    P_REQ_N3/B2

    P_LOCK_N3/B2

    P_INTC_N 3/B2

    P_INTA_N 3/B2

    P_INTD_N3/B2

    P_ACK64_N3/B2

    P_SERR_N3/B2

    P_PERR_N3/B2

    P_DEVSEL_N3/B2

    P_IRDY_N3/B2

    1

    2

    C4E3

    2

    1 C8R3 1

    2

    C7R51

    2

    C6R6

    2

    1 C4E4

    2

    1 C2E5

    2

    1 C5E7

    2

    1 C2E3

    1

    2

    C8R6

    P_INTB_N3/B2

    9-23-2004_9:04PRIMARY PCI BUS - EDGE CONNECTOR 216

  • 80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    22UFTANT

    X7RCC0603

    .01UFX7R

    CC0603

    .01UF 22UFTANT

    GND GND

    GND

    0.1UF16V

    10UFX5R

    10UFX5R

    10UFX5R

    10UFX5R

    GND

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    GND

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    GNDGND

    N12V

    GND

    GND

    NC

    NC

    NC

    NC

    NC

    NC

    NC

    NC

    NC

    NC

    NC

    P5V

    PC

    I

    P3_3V

    PC

    I

    P5V

    PC

    I

    P12V

    PC

    I

    P5V

    PC

    I

    P3_3V

    PC

    I

    +12V

    +3.3V1

    +3.3V10

    +3.3V11

    +3.3V12

    +3.3V2

    +3.3V3

    +3.3V4

    +3.3V5

    +3.3V6

    +3.3V7

    +3.3V8

    +3.3V9

    +3.3VAUX

    +3.3VIO1

    +3.3VIO2

    +3.3VIO3

    +3.3VIO4

    +3.3VIO5

    +5V1

    +5V2

    +5V3

    +5V4

    +5V5

    +5V6

    +5V7

    +5V8

    -12V

    ACK64_N

    AD00AD01

    AD02

    AD03

    AD04AD05

    AD06

    AD07

    AD08

    AD09

    AD10

    AD11AD12

    AD13

    AD14

    AD15

    AD16AD17

    AD18

    AD19

    AD20AD21

    AD22

    AD23

    AD24

    AD25

    AD26AD27

    AD28

    AD29

    AD30AD31

    CBE0_N

    CBE1_N

    CBE2_N

    CBE3_N

    CLK

    DEVSEL_N

    FRAME_N

    GND1

    GND10

    M66EN

    GND12

    GND13

    GND14

    GND15

    GND16

    GND17

    GND18

    GND19

    GND2

    GND20

    GND21

    GND22

    GND3

    GND4

    GND5

    GND6

    GND7

    GND8

    GNT_N

    IDSEL

    INTA_N

    INTB_N INTC_N

    INTD_N

    IRDY_N

    LOCK_N

    PAR

    PCIXCAP

    PERR_N

    PME_N

    PRSNT1_N

    PRSNT2_N

    REQ64_N

    REQ_N

    RST_N

    RSVD1

    RSVD2

    RSVD3

    RSVD4

    RSVD5

    RSVD6

    SERR_N

    STOP_N

    TCK

    TDITDO

    TMS

    TRDY_N

    TRST_N

    PART 1 of 2

    Key

    ContinuedKeyPCI - 64B CONNECTOR

    +3.3VIO10

    +3.3VIO11

    +3.3VIO6

    +3.3VIO7

    +3.3VIO8

    +3.3VIO9

    AD32

    AD33

    AD34AD35

    AD36

    AD37

    AD38AD39

    AD40

    AD41

    AD42AD43

    AD44

    AD45

    AD46AD47

    AD48

    AD49

    AD50AD51

    AD52

    AD53

    AD54AD55

    AD56

    AD57

    AD58AD59

    AD60

    AD61

    AD62AD63

    CBE4_N

    CBE5_NCBE6_N

    CBE7_NGND23

    GND24

    GND25

    GND26

    GND27

    GND28

    GND29

    GND30

    GND31

    GND32

    GND33

    GND34

    GND35

    GND36

    GND37

    GND38

    PAR64

    RSVD10

    RSVD11

    RSVD7

    RSVD8

    RSVD9

    Key Continued

    PART 2 of 2PCI - 64B CONNECTOR

    P3_3V

    PC

    I

    0.1UF16V

    GND

    NC

    1%20

    0

    5%43

    00

    P3_3V

    PC

    I

    5%43

    00

    5%43

    005% 4300

    GND

    P12V

    P3_3V

    PC

    I

    P3_3V

    PC

    I

    N12V

    P3_3V

    5%33

    00

    0.1UF16V

    0.1UF16V

    GND GND8/A7,9/D5GF_S_RST_N

    3/D8,3/B7S_INTB_N

    3/C8,3/B7S_INTD_N

    1

    2

    C2A2

    2

    1 C2A3

    3/C6,8/B7S_CBE[7:0]_N

    S_CBE1_N

    S_CBE2_N

    S_CBE3_N

    S_CBE5_N

    S_CBE7_N

    S_CBE0_N

    S_CBE4_N

    S_CBE6_N

    3/D6,8/C8S_AD[63:0]

    S_AD17

    S_AD29

    S_AD31

    S_AD1 S_AD0

    S_AD2

    S_AD4

    S_AD6

    S_AD9

    S_AD11

    S_AD13

    S_AD15

    S_AD16

    S_AD18

    S_AD20

    S_AD22

    S_AD24

    S_AD26

    S_AD28

    S_AD30

    S_AD33

    S_AD37

    S_AD39

    S_AD41

    S_AD43

    S_AD45

    S_AD47

    S_AD49

    S_AD51

    S_AD53

    S_AD55

    S_AD57

    S_AD59

    S_AD61

    S_AD63

    S_AD35

    S_AD32

    S_AD34

    S_AD36

    S_AD40

    S_AD42

    S_AD44

    S_AD46

    S_AD62

    S_AD60

    S_AD58

    S_AD56

    S_AD54

    S_AD52

    S_AD50

    S_AD48

    S_AD38

    S_AD3

    S_AD5

    S_AD7

    S_AD8

    S_AD10

    S_AD12

    S_AD14

    S_AD17

    S_AD19

    S_AD21

    S_AD23

    S_AD25

    S_AD27

    3/B7,8/A7 S_ACK64_N

    S_M66EN3/B7,8/A7

    12

    R7L

    1

    3/B7 S_PCIXCAP

    3/B7,8/A7 S_DEVSEL_N

    3/B7,8/A7S_REQ64_N

    S_SLOT_IDSEL

    S0_TRST_N

    S0_TDI

    S0_TMS

    12R2A1

    12

    R2A

    3

    12

    R2A

    2

    12

    R8L

    1

    S0_TCK

    12

    R3A

    1

    3/D8,3/B7 S_INTA_N

    3/D8,3/B7,8/A7 S_INTC_N

    6/C5,8/A7PCI_PME_N

    3_3V_AUX 6/C5

    2

    1 C4A4

    S_CLKO_SLOT3/A7

    A75

    A84

    B70

    B79

    B88

    A66

    A91

    B90

    A89B89

    A88

    B87

    A86B86

    A85

    B84

    A83B83

    A82

    B81

    A80B80

    A79

    B78

    A77B77

    A76

    B75

    A74B74

    A73

    B72

    A71B71

    A70

    B69

    A68B68

    B66

    A65B65

    A64B64

    B67

    B73

    B76

    B82

    B85

    B91

    B94

    A63

    A69

    A72

    A78

    A81

    A87

    A90

    A93

    A67

    A92

    A94

    B63

    B92

    B93

    J2A1

    A2

    B25

    A39

    A45

    A53

    B31

    B36

    B41

    B43

    B54

    A21

    A27

    A33

    A14

    B19

    B59

    A10

    A16

    A59

    B5

    B6

    B61

    B62

    A5

    A8

    A61

    A62

    B1

    B60

    A58B58

    A57

    B56

    A55B55

    A54

    B53

    B52

    A49

    B48

    A47B47

    A46

    B45

    A44

    A32B32

    A31

    B30

    A29B29

    A28

    B27

    A25

    B24

    A23B23

    A22

    B21

    A20B20

    A52

    B44

    B33

    B26

    B16

    B37

    A34

    B3

    B46

    B49

    B57

    A50

    A51

    A18

    A24

    A30

    A35

    A37

    B50

    A42

    A48

    A56

    B51

    B15

    B17

    B22

    B28

    B34

    A17

    A26

    A6

    B7 A7

    B8

    B35

    B39

    A43

    B38

    B40

    A19

    B9

    B11

    A60

    B18

    A15

    B10

    B14

    A9

    A11

    A40

    A41

    B42

    A38

    B2

    A4B4

    A3

    A36

    A1

    J2A11

    2

    C8L11

    2

    C4A3

    2

    1 C4A2

    2

    1 C2A4

    1

    2

    C5A2

    2

    1 C5A31

    2

    C4A6 1

    2

    C4A5

    2

    1 C8L3 1

    2

    C8L2

    2

    1 C7L2

    3/B7,8/B7 S_IRDY_N

    3/B7,8/B7S_PAR64

    3/B7S_GNT0_N

    3/B7 S_REQ0_N

    3/B7,8/A7 S_LOCK_N

    3/B7,8/B7S_TRDY_N

    3/B7,8/B7S_PAR

    3/B7,8/A7 S_SERR_N

    3/B7,8/A7 S_PERR_N

    3/B7,8/B7S_FRAME_N

    3/B7,8/A7S_STOP_N

    2

    1 C2A1

    2

    1 C4A1

    2

    1 C2A5

    2

    1 C5A1

    1

    2

    C7L1

    21 C2A7

    1

    2

    C9L11

    2

    C8L41

    2

    C2A6

    9-23-2004_9:04SECONDARY PCI-X BUS SLOT 217

  • 80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    GND

    0.1UF16V

    0.1UF16V

    0.1UF16VCC0603 X7R

    .01UF

    NC

    NCNCNCNCNCNCNCNCNCNCNCNCNC

    NCNCNC

    NCNCNC

    NCNCNCNCNCNCNCNC

    NCNCNCNC

    NCNCNC

    GND

    1%24

    90

    GND

    1%24

    90

    NC

    NCNC

    NC

    NCNC

    NC

    CSDC

    DIDO GND

    ORGSK

    VCC

    EEPROM_64X16SO8

    1%49.9

    1%49.9

    1%49.9

    1%49.9

    1%49.9

    1%49.9

    1%49.9

    1%49.9

    CC0603 X7R.01UF

    CC0603 X7R.01UF

    CC0603 X7R.01UF

    5%1.3M

    0.1UF16V

    10U

    FX

    5R

    5%300

    0.1UF16V

    GND

    5% 8.2KP3_3V

    GND

    5%10

    00

    1%20

    01%100K

    1%100K

    P3_3V P3_3V

    GND

    P3_3V

    1%33

    .2

    1%53.6

    GND

    P3_3V

    1

    JK0654218ZPULSE

    MX4+

    MX1+

    MXCT1

    MX1-

    MX2+

    MXCT2

    MX2-

    MX3+

    MX3-

    MXCT3

    MXCT4

    MX4-

    SHIELD1

    SHIELD2

    R_LED_A

    R_LED_C

    L_LED_GRN

    L_LED_YEL

    GBE-MAG

    A81471-001

    1:1

    1:1

    1:1

    1:1

    Green

    75 Ohms

    75 Ohms

    75 Ohms

    RJ4

    5

    75 Ohms 8

    7

    4

    5

    6

    3

    2

    1

    1000pF - 3KVYellow Green

    Left

    Right

    +2_5V_GBE

    NCNC

    25.000MHZ

    NC2NC3

    X Y

    5%2000

    GND

    GND

    GND

    GND

    5%300

    P3_3V

    GR

    N

    1%100

    P3_3V

    ACK64_N

    ACT_N

    AUX_PWR

    CBE0_NCBE1_NCBE2_NCBE3_NCBE4_NCBE5_NCBE6_NCBE7_N

    CLK

    CLK_VIEW

    DEVSEL_N

    EE_CS

    EE_DIEE_DO

    EE_SK

    FL_ADDR0FL_ADDR1

    FL_ADDR10FL_ADDR11FL_ADDR12FL_ADDR13FL_ADDR14FL_ADDR15FL_ADDR16FL_ADDR17FL_ADDR18

    FL_ADDR2FL_ADDR3FL_ADDR4FL_ADDR5FL_ADDR6FL_ADDR7FL_ADDR8FL_ADDR9

    FL_CS_N

    FL_DATA0FL_DATA1FL_DATA2FL_DATA3FL_DATA4FL_DATA5FL_DATA6FL_DATA7

    FL_OE_NFL_WE_N

    FRAME_N

    GNT_N

    IDSEL

    INTA_N

    IRDY_N

    JTAG_RST_N

    JTAG_TCKJTAG_TDI

    JTAG_TDOJTAG_TMS

    LAN_PWR_GOOD

    LINK1000_NLINK100_N

    LINK_N

    LOCK_N

    M66EN

    MDI0+MDI0-MDI1+MDI1-MDI2+MDI2-MDI3+MDI3-

    PA64PAR

    PCI_AD0PCI_AD1

    PCI_AD10PCI_AD11PCI_AD12PCI_AD13PCI_AD14PCI_AD15PCI_AD16PCI_AD17PCI_AD18PCI_AD19

    PCI_AD2

    PCI_AD20PCI_AD21PCI_AD22PCI_AD23PCI_AD24PCI_AD25PCI_AD26PCI_AD27PCI_AD28PCI_AD29

    PCI_AD3

    PCI_AD30PCI_AD31PCI_AD32PCI_AD33PCI_AD34PCI_AD35PCI_AD36PCI_AD37PCI_AD38PCI_AD39

    PCI_AD4

    PCI_AD40PCI_AD41PCI_AD42PCI_AD43PCI_AD44PCI_AD45PCI_AD46PCI_AD47PCI_AD48PCI_AD49

    PCI_AD5

    PCI_AD50PCI_AD51PCI_AD52PCI_AD53PCI_AD54PCI_AD55PCI_AD56PCI_AD57PCI_AD58PCI_AD59

    PCI_AD6

    PCI_AD60PCI_AD61PCI_AD62PCI_AD63

    PCI_AD7PCI_AD8PCI_AD9

    PERR_NPME_N

    REF

    REQ64_N

    REQ_N

    RST_N

    RX+RX-

    SERR_N

    SIG_DETECT

    SMBALRT_N

    SMBCLKSMBDATA

    SPD0SPD1SPD6SPD7

    STOP_N

    TEST_N

    TRDY_N

    TX+TX-

    VIO_1VIO_2

    XTAL1XTAL2

    ZN_COMP

    ZP_COMP

    82545EM_GBE_CTLR

    82545EM_1

    Part 1 of 2

    22PFCOG

    22PFCOG

    GNDGND

    GND

    5%8.

    2K

    GBE Controller

    NOTE: Silkscreen as GBE ACT next to LED on device.

    NOTE: Isolate this 2.5V plane.

    SERDES NOT USED

    NOTE: Silkscreen YEL = LINK1000.

    Note: Silkscreen GRN = LINK100.

    NOTE: Silkscreen as LINK10.

    RJ45 Connector for Gb Ethernet NIC.

    GBE_LINK_NGBE_ACT_N

    12

    R9M

    1

    GBE_TMS 9/B2

    GBE_TDO 9/C3

    GBE_TDI 9/B2

    GBE_TCK 9/B2

    C1B2C1B3

    GBE_XTAL2GBE_XTAL1

    PWR_OK9/C2,9/D6,12/D7,19/C4,20/A8

    GF_S_RST_N7/C5,9/D5

    W16

    N1

    R3

    Y13V10

    T8Y4

    V16Y18Y17T15

    U2

    T9

    C20

    C19B20

    D20

    F16E18

    G17G16B15D19D18C15D16C18D17

    E16E15E14E13D15B16F17F18

    H20

    H16G18J16H18J17J18K17K16

    K18C17

    V8

    T3

    T6

    Y2

    W8

    N3N4M1

    Y9

    Y16

    B2B1C2C1D2D1E2E1

    V15U10

    T14V14

    W12Y12V11T11Y11

    W10U8Y7Y6V7

    Y15

    T7W6Y5V6U6V5

    W4V4Y3U4

    W14

    V3V1

    L16M20M19M16M18M17N20N16

    T13

    P20N18P19P16R20P18P17T20R16U20

    V13

    R18T19V20T18

    W20V19T17U18V18U16

    Y14

    V17W18Y19T16

    U12V12T12

    Y10T4

    E3

    U14

    W2

    T5

    G19G20

    T10

    E20

    A16

    A14A15

    G4G5E12E11

    V9Y8

    F19F20

    Y1Y20

    A3A4

    T2

    R5

    A8P3

    N5P5P2P4P1

    A17

    U2C1

    12

    R2C

    11

    1

    2

    LED2C1

    GBE_GRN_LED 1 2R8N6

    GBE_LINK_1000_NGBE_LINK100_N

    GBE_MDI2_PGBE_MDI1_N

    GBE_ROM_DO

    GBE_ROM_CSGBE_ROM_SK

    PD_GBE_SIGD

    GBE_MDI3_N

    12

    R2B

    2

    GBE_MDI3_PGBE_MDI2_N

    GBE_MDI1_P

    GBE_MDI0_PGBE_MDI0_N

    14

    3 2

    Y1B1

    8

    11

    12

    10

    4

    6

    5

    3

    2

    1

    7

    9

    G1

    G2

    14

    13

    16

    15

    J1D1

    12

    R8N

    2

    12

    R8M

    1

    GBE_ROM_DI

    GBE_ZNCOMP

    GBE_ZPCOMP

    S_AD[63:0]3/D6,7/A8

    S_AD1S_AD2S_AD3S_AD4S_AD5S_AD6S_AD7S_AD8S_AD9S_AD10S_AD11S_AD12S_AD13S_AD14S_AD15S_AD16S_AD17S_AD18S_AD19S_AD20S_AD21S_AD22S_AD23S_AD24S_AD25S_AD26S_AD27S_AD28S_AD29S_AD30S_AD31S_AD32S_AD33S_AD34S_AD35S_AD36S_AD37S_AD38S_AD39S_AD40S_AD41S_AD42S_AD43S_AD44S_AD45S_AD46S_AD47S_AD48S_AD49S_AD50S_AD51S_AD52S_AD53S_AD54S_AD55S_AD56S_AD57S_AD58S_AD59S_AD60S_AD61S_AD62S_AD63

    S_AD0

    S_AD18

    PU_GBE_VIO2PU_GBE_VIO1

    21

    R2B

    1

    12

    R2C

    9

    12

    R2B

    4

    S_CBE[7:0]_N

    3/C6,7/A8

    S_CBE6_N

    S_CBE2_N

    S_CBE4_NS_CBE5_N

    S_CBE7_N

    S_CBE3_N

    S_CBE0_NS_CBE1_N

    PCI_PME_N6/C5,7/C53/B7,7/B8 S_PERR_N

    S_SERR_N3/B7,7/B8

    S_M66EN3/B7,7/B8

    S_CLKO_GBE3/A7

    S_INTC_N3/D8,3/B7,7/D83/B7,7/B8 S_LOCK_N

    S_GNT1_N3/B7

    S_REQ1_N3/B7

    S_ACK64_N3/B7,7/A8

    S_REQ64_N3/B7,7/A5

    S_DEVSEL_N3/B7,7/B8

    S_STOP_N3/B7,7/B5

    S_TRDY_N3/B7,7/B5

    S_IRDY_N3/B7,7/B8

    S_FRAME_N3/B7,7/B5

    S_PAR643/B7,7/C1

    S_PAR3/B7,7/B5

    PCIA_IDSEL_82545EM

    1

    2

    R2B

    3

    12 R8A2

    1

    2

    C9M2

    1 2R8N4

    21C

    1D1

    21C9P1

    1 2R9P1

    1 2C8N8

    1 2C8N7

    1 2C8N10

    21R2C7

    1 2R2C8

    21R2C6

    1 2R2C5

    21R2C4

    1 2R2C3

    21R2C2

    1 2R2C1

    SCD1 4/C6,17/C7

    123 6

    5

    8

    4

    7

    U1B3

    12

    R8N

    1

    12

    R8N

    3

    SCL1 4/C6,17/C7

    GBE_TERM_M3

    GBE_TERM_M2

    GBE_TERM_M1

    GBE_TERM_M0

    GBE_YELL_LED

    1 2C8N9

    21C9N2

    21C9P2

    21C9N1

    GBE_SMBALRT_N 16/C8

    GBE_TRST_N 9/B2

    9-23-2004_9:04GIGABIT ETHERNET CONTROLLER 218

  • 80331_BGA829

    PWRGD/P_RST_N

    SPARE0SPARE1SPARE2SPARE3

    TCKTDI

    TDO

    TEST_CONT_NTEST_CRPLLCLK

    TEST_EN_N

    TMSTRST_N

    VSS

    PWRDELAY_N

    JTAG/MISCPART 7 OF 9

    Intel(R) 80331I/O Processor

    80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    GND

    P3_3V

    0.1UF16V

    P3_3V

    0.1UF16V

    GND GND

    0.1UF16V

    0.1UF16V

    0.1UF16V

    NC

    0.1UF16V 22UF

    X5R22UFX5R

    GND

    22UFX5R

    0.1UF16V

    0.1UF16V

    0.1UF16V 0.1UF16V

    0.1UF16V 22UF

    X5R

    0.1UF16V

    0.1UF16V 0.1UF16V

    22UFX5R

    5%10

    00

    5%10

    00

    P3_3V

    NC

    NCNCNC

    NCNCNCNCNCNCNC

    NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

    NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

    GND

    P3_3V

    NC

    NCNC

    NC

    1%51

    10

    22UFX5R

    0.1UF16V

    0.1UF16V

    0.1UF16V0.1UF16V

    0.1UF16V

    GND

    0.1UF16V

    NC

    NC

    NC

    NC

    +2_5V_GBE

    +2_5V_GBE

    P5V

    GND;774LVC125AD

    GND;774LVC125AD

    GND;774LVC125AD

    GND;774LVC125AD

    GND;774LVC125AD

    22UFX5R

    P3_3VGND

    P1_5V

    P1_5V

    0.1UF16V

    AVDDH1AVDDH2

    AVDDL1AVDDL2AVDDL3AVDDL4AVDDL5AVDDL6AVDDL7

    CTRL_15

    CTRL_25

    DVDD1

    DVDD10DVDD11DVDD12DVDD13DVDD14DVDD15DVDD16DVDD17DVDD18DVDD19

    DVDD2

    DVDD20DVDD21DVDD22DVDD23DVDD24

    DVDD3DVDD4DVDD5DVDD6DVDD7DVDD8DVDD9

    GND1

    GND10GND11GND12GND13GND14GND15GND16GND17GND18GND19

    GND2

    GND20GND21GND22GND23GND24GND25GND26GND27GND28GND29

    GND3

    GND30GND31GND32GND33GND34GND35GND36GND37GND38GND39

    GND4

    GND40GND41GND42GND43GND44GND45GND46GND47GND48GND49

    GND5

    GND50GND51GND52GND53GND54GND55GND56GND57GND58GND59

    GND6

    GND60GND61GND62GND63GND64GND65GND66GND67GND68GND69

    GND7

    GND70GND71GND72

    GND73GND74

    GND8GND9

    NC1

    NC10NC11NC12NC13NC14NC15NC16NC17NC18NC19

    NC2

    NC20NC21NC22NC23NC24NC25NC26NC27NC28NC29

    NC3

    NC30NC31NC32

    NC4NC5NC6NC7NC8NC9

    RESERVED0RESERVED1

    RESERVED10RESERVED11RESERVED12RESERVED13RESERVED14RESERVED15RESERVED16RESERVED17RESERVED18RESERVED19

    RESERVED2

    RESERVED20RESERVED21RESERVED22RESERVED23RESERVED24RESERVED25RESERVED26RESERVED27RESERVED28RESERVED29

    RESERVED3

    RESERVED30

    RESERVED4RESERVED5RESERVED6RESERVED7RESERVED8RESERVED9

    VDDO1

    VDDO10VDDO11VDDO12VDDO13VDDO14VDDO15VDDO16VDDO17VDDO18VDDO19

    VDDO2

    VDDO20VDDO21VDDO22VDDO23VDDO24VDDO25VDDO26

    VDDO3VDDO4VDDO5VDDO6VDDO7VDDO8VDDO9

    82545EM_GBE_CTLR

    82545EM_2

    Part 2 of 2

    +2_5V_GBE

    P3_3V

    P3_3V

    BCP69T1

    NC

    NCNCNCNC

    5%8.

    2K

    5%8.

    2K

    5%8.

    2K

    P3_3V

    P3_3V

    GND

    0.1UF16V

    P3_3V

    GND

    1%12

    .4K

    1%31

    .6K

    SOT23_5

    GND

    RST_INMR_N

    RESET_N VCC

    MAX6306UK29D3

    GND

    0 5%

    5%1500

    GND

    HEADER2X4

    P3_3V

    5%8.

    2K

    GND

    5%10

    00

    P3_3V

    5% 220

    SOT143

    MAX811_EUS_T

    MR_NRESET_N

    VCCGND

    GND

    GND

    GND;474LVC2G08

    P3_3V

    5%1500

    GND

    GND

    5%1500

    P3_3V

    5%15

    00

    GND

    SN74LVC2G66

    2_ENGND

    1_EN

    2B

    1B

    2A

    1A

    VCC

    1%10

    0K

    GND

    P3_3V

    GND

    0 5%Test Pad

    05%

    NOTE: JTAG Control Header/Jumpers.

    NOTE: 82545EB provides 2.5V regulator.

    Jumper Here to add TRST# Pulldown.

    Jumper Here for 80331 + GBE.

    Jumper Here for 80331 only.

    SETTINGPIN

    1 & 2 JTAG Communication to IOP only.

    3 & 4 JTAG Communication to IOP and Gb-Ethernet.

    5 & 6 Not Applicable, No Connection.

    7 & 8 Enables 1K TRST# Pull-down.

    JUMPER J1B2

    JTAG INTERFACE

    JTAG Connector

    GBE GND PINS

    NOTE: Depopulate R2 and populate R9 when battery backup capability is not required.

    NOTE: Reset Timeout Period = 140ms.

    NOTE: The 80331 has weak internal pullups on the JTAG TDI, TMS, TRST_N signals.

    12

    R3E

    6

    1 TP3E11 2R3E5

    S_RST_N3/B7 GF_S_RST_N 7/C5,8/A7

    6/C5 P_RST_N 80331_RESET_N

    12

    R3E

    1

    34

    7

    6

    2

    5

    1

    8

    U3E2

    12

    R4D

    5 NO_POP=TRUE

    12

    R6P

    1

    1 2R9N4

    8/A5GBE_TCK

    GBE_TMS 8/A5

    GBE_TRST_N 8/A5

    8/A5 GBE_TDO

    GBE_TDI 8/A5

    DUT_TRST_N

    DUT_TRST_N

    DUT_TDI DUT_TDI

    DUT_TMSDUT_TMS

    MR_RESET_N

    MR_RESET_N

    PWR_OK8/D8,9/D6,12/D7,19/C4,20/A8

    PWR_OK8/D8,9/C2,12/D7,19/C4,20/A8

    1

    27

    U3E1

    P3_3V;8

    1

    32

    4

    U4D1

    12R5D9

    12

    R5D

    8

    TRST_MR_N

    TDO

    DUT_TDO

    21

    R9N

    6

    1 2

    3 4

    5 6

    7 8

    J1B2

    DUT_TCK

    DUT_TCK

    12

    R9N

    7

    21 R9N5

    2

    43

    1 5

    U6E1

    12

    R6E

    21

    2R

    6E1

    2

    1 C4D8

    TRST_R_N

    12

    R5P

    2

    21

    R5P

    6

    12

    R5P

    5

    3

    1

    2 4

    Q2C1

    B4F1

    A19G1G2G3L2L5

    L18

    A18

    F2

    G7

    H14J7J14M7M14N7N8N13N14P7

    G8

    P8P9P12P13P14

    G9G12G13G14H7H8H13

    A1

    D3D8

    D14E19

    L19

    F3G10G11

    H2H9

    A2

    H10H11H12H17

    J8J9

    J10J11J12J13

    A5

    K2K4K5K7K8K9

    K10K11K12K13

    A10

    K14L7L8L9

    L10L11L12L13L14

    B3B6

    B11B17C3

    B8

    H19L17M2

    N19R4

    R17U1U3U7

    U11

    B14

    U15U19W1W5W9

    W13W17

    B19C10C16

    D6D11E17H4

    W15

    M4M8M9

    M10M11M12M13

    N9N10N11N12N17P10P11R2

    R19U5U9

    U13U17

    V2W3W7

    W11

    W19

    A13

    D13F4F5H1H3H5J1J2J3J4

    B12

    J5J19J20K1K3

    B13C12A11A12C13C14D12

    K19K20L1L3L4M3N2T1

    A20B18M5E7A6R1L20

    D4

    C7E10B7A7C8E8E9D9C9B9

    D5

    D10A9C11B10C6

    C4E4C5E5B5E6D7

    U2C1

    1

    2

    C8M4

    2

    1 C2B2

    9

    7

    5

    3

    1 2

    8

    6

    4

    2019

    1817

    1615

    1413

    1211

    10

    P1C1

    1

    32

    U1B1

    P3_3V;14

    2 3

    1

    U1B2

    P3_3V;14

    9 8

    10

    U1B2

    P3_3V;14

    13

    1112

    U1B2

    P3_3V;14

    4

    65

    U1B2

    P3_3V;14

    1

    2

    C8N4

    2

    1 C8M12 1

    2

    C8M92

    1 C8M13 1

    2

    C8M6

    2

    1 C8M7 1

    2

    C2C1

    12

    R2D

    1

    12

    R5E

    3

    12

    R3E

    4

    2

    1 C2C2

    2

    1 C8N21

    2

    C8M1

    2

    1 C8N6

    1

    2

    C2C3

    2

    1 C8N11

    2

    C8M32

    1 C8N5

    2

    1 C8M5 1

    2

    C8M10 1

    2

    C2B11

    2

    C2C4

    2

    1 C2B3

    2

    1 C8M11

    2

    1 C8M8 1

    2

    C8N3

    2

    1 C8M2

    TEST_EN_NTEST_CONT_NTEST_CRPLLCLK

    1

    2

    C9M1 1

    2

    C9M3

    9-23-2004_9:17GIGABIT ETHERNET POWER / IQ80331 JTAG AND RESET 219

    AA7

    Y5W6T1Y8

    Y2Y6AB3

    AA2AA4

    AB1

    AB4AA5

    AB6

    W1

    U3E3

  • 80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%22

    5%2221

    R5B20

    1 2R4B9

    1 2R4B8

    1 2R5B13

    1 2R5B14

    21R5B16

    21R5B9

    1 2R5B11

    1 2R5B10

    21R6B9

    1 2R6B14

    1 2R6B10

    1 2R6B13

    21R6B12

    21R6B7

    1 2R6B8

    21R6B11

    21R4C1

    1 2R4C9

    21R4C8

    21R4C7

    1 2R4C5

    1 2R4C4

    1 2R4C3

    21R4C2

    DDR_400_DQ37

    DDR_400_DQ21

    DDR_400_DQ55

    DDR_400_DQ45

    DDR_400_DQ46

    DDR_400_DQ48

    DDR_400_DQ50

    DDR_400_DQ47

    DDR_400_DQ49

    DDR_400_DQ51

    DDR_400_DQ52

    DDR_400_DQ0

    DDR_400_DQ2

    DDR_400_DQ4

    DDR_400_DQ6

    DDR_400_DQ8

    DDR_400_DQ10

    DDR_400_DQ12

    DDR_400_DQ14

    DDR_400_DQ16

    DDR_400_DQ18

    DDR_400_DQ20

    DDR_400_DQ22

    DDR_400_DQ24

    DDR_400_DQ26

    DDR_400_DQ28

    DDR_400_DQ30

    DDR_400_DQ32

    DDR_400_DQ34

    DDR_400_DQ36

    DDR_400_DQ38

    DDR_400_DQ40

    DDR_400_DQ42

    DDR_400_DQ44

    DDR_400_DQ54

    DDR_400_DQ56

    DDR_400_DQ58

    DDR_400_DQ60

    DDR_400_DQ62

    13/D7DDR_400_DQ[63:0]

    DDR_400_DQ3

    DDR_400_DQ5

    DDR_400_DQ7

    DDR_400_DQ9

    DDR_400_DQ11

    DDR_400_DQ13

    DDR_400_DQ15

    DDR_400_DQ17

    DDR_400_DQ19

    DDR_400_DQ23

    DDR_400_DQ25

    DDR_400_DQ27

    DDR_400_DQ29

    DDR_400_DQ31

    DDR_400_DQ33

    DDR_400_DQ35

    DDR_400_DQ39

    DDR_400_DQ41

    DDR_400_DQ43

    DDR_400_DQ53

    DDR_400_DQ57

    DDR_400_DQ59

    DDR_400_DQ61

    DDR_400_DQ63

    DDR_400_DQ1

    1 2R4C10

    21R6C1

    DDR_DQ28

    DDR_DQ46

    DDR_DQ48

    DDR_DQ50

    DDR_DQ51

    DDR_DQ49

    DDR_DQ47

    DDR_DQ45

    DDR_DQ52

    DDR_DQ22

    DDR_DQ20

    DDR_DQ0

    DDR_DQ2

    DDR_DQ4

    DDR_DQ6

    DDR_DQ8

    DDR_DQ10

    DDR_DQ12

    DDR_DQ14

    DDR_DQ16

    DDR_DQ18

    DDR_DQ24

    DDR_DQ26

    DDR_DQ30

    DDR_DQ32

    DDR_DQ34

    DDR_DQ36

    DDR_DQ38

    DDR_DQ40

    DDR_DQ42

    DDR_DQ44

    DDR_DQ58

    DDR_DQ[63:0]4/C1,11/D8

    DDR_DQ62

    DDR_DQ60

    DDR_DQ56

    DDR_DQ54

    DDR_DQ63

    DDR_DQ61

    DDR_DQ59

    DDR_DQ57

    DDR_DQ55

    DDR_DQ53

    DDR_DQ43

    DDR_DQ41

    DDR_DQ39

    DDR_DQ37

    DDR_DQ35

    DDR_DQ33

    DDR_DQ31

    DDR_DQ29

    DDR_DQ27

    DDR_DQ25

    DDR_DQ23

    DDR_DQ21

    DDR_DQ19

    DDR_DQ17

    DDR_DQ15

    DDR_DQ13

    DDR_DQ11

    DDR_DQ9

    DDR_DQ7

    DDR_DQ5

    DDR_DQ3

    DDR_DQ1

    21R5C12

    1 2R5C10

    21R5C7

    21R5C6

    1 2R5C9

    1 2R6B3

    1 2R5B26

    21R5B25

    21R5B22

    1 2R5B21

    21R6C9

    1 2R6C7

    1 2R6C6

    21R6C3

    21R6C10

    1 2R6C5

    21R6C4

    1 2R5B6

    21R5B17

    1 2R6B15

    DDR_400_DM0

    DDR_400_DM8

    13/D7DDR_400_DM[8:0]

    DDR_400_DM2

    DDR_400_DM3

    DDR_400_DM4

    DDR_400_DM5

    DDR_400_DM6

    DDR_400_DM1

    DDR_400_DM7

    DDR_DM0

    DDR_DM8

    DDR_DM[8:0]4/C1,11/D8

    DDR_DM2

    DDR_DM3

    DDR_DM4

    DDR_DM5

    DDR_DM6

    DDR_DM1

    DDR_DM7

    DDR_400_DQS_N0 13/B3

    DDR_400_CB0

    DDR_400_CB7

    13/D4DDR_400_CB[7:0]

    DDR_400_CB1

    DDR_400_CB2

    DDR_400_CB3

    DDR_400_CB4

    DDR_400_CB5

    DDR_400_CB6

    DDR_CB7

    DDR_CB[7:0]4/A1

    DDR_CB1

    DDR_CB2

    DDR_CB3

    DDR_CB4

    DDR_CB5

    DDR_CB6

    DDR_CB0

    13/B3DDR_400_DQS_N1

    DDR_400_DQS_N2 13/C3

    13/D3DDR_400_DQS_N3

    DDR_400_DQS_N4 13/B6

    13/B6DDR_400_DQS_N5

    DDR_400_DQS_N6 13/C6

    13/D6DDR_400_DQS_N7

    13/C1DDR_400_DQS_N8

    21R4B3

    21R5B15

    1 2R4B14

    1 2R5C4

    21R5C1

    21R4C12

    1 2R5C8

    1 2R6C11

    21R5C5

    1 2R4C11

    21R4C13

    21R4B15

    1 2R4B10

    1 2R4B4

    21R4B5

    21R4C15

    1 2R4B1

    21R4B12

    1 2R4C17

    21R5C14

    1 2R5B18

    21R6C13

    1 2R6B5

    21R6B4

    1 2R5C2

    21R4B11

    1 2R5B5

    21R6C8

    1 2R5C11

    1 2R4C6

    1 2R5B1

    1 2R5B3

    21R5B24

    1 2R6C2

    1 2R5C3

    21R5B2

    1 2R5B4

    21R5B8

    1 2R4B16

    21R5B12

    1 2R4B6

    1 2R4B7

    DDR_400_DQS_P0 13/B3

    13/C1DDR_400_DQS_P8

    13/D6DDR_400_DQS_P7

    DDR_400_DQS_P6 13/C6

    13/B6DDR_400_DQS_P5

    DDR_400_DQS_P4 13/B6

    13/D3DDR_400_DQS_P3

    DDR_400_DQS_P2 13/C3

    13/B3DDR_400_DQS_P11 2R6C12

    1 2R5B19

    1 2R5C13

    1 2R4C16

    1 2R4B13

    1 2R4B2

    1 2R4C14

    4/D2 DDR_DQS_N8

    4/D2 DDR_DQS_P8

    4/D2,11/A3 DDR_DQS_P7

    DDR_DQS_N64/D2,11/C5

    DDR_DQS_P64/D2,11/C3

    4/D2,11/D5 DDR_DQS_N5

    4/D2,11/D3 DDR_DQS_P5

    DDR_DQS_N44/D2,11/B5

    DDR_DQS_P44/D2,11/B3

    4/D2,11/A8 DDR_DQS_N3

    4/D2,11/A6 DDR_DQS_P3

    DDR_DQS_N24/D2,11/C8

    DDR_DQS_P24/D2,11/C6

    DDR_DQS_P04/D2,11/D6

    DDR_DQS_N04/D2,11/D8

    4/D2,11/B6 DDR_DQS_P1

    4/D2,11/B8 DDR_DQS_N1

    4/D2,11/A5 DDR_DQS_N7

    1 2R5B7

    1 2R6B6

    1 2R5B23

    9-23-2004_9:04DDR-II 400 SERIES TERMINATION 2110

  • ED0ED1

    ED10ED11

    ED12ED13

    ED14ED15

    ED16_CKN ED16_CKP

    ED2ED3

    ED4ED5

    ED6ED7

    ED8ED9

    GND0

    GND1 GND10

    GND11

    GND12

    GND13

    GND14

    GND15

    GND16

    GND17

    GND2

    GND3

    GND4

    GND5

    GND6

    GND7

    GND8

    GND9

    OD0OD1

    OD10OD11

    OD12OD13

    OD14OD15

    OD16_CKN OD16_CKP

    OD2OD3

    OD4OD5

    OD6OD7

    OD8OD9

    AGILENT*_LA_E5390A

    n.c.

    Logi

    c A

    naly

    zer C

    onn

    Align

    Alignn.c.

    n.c. Align

    Align n.c.

    Sof

    t Tou

    ch*

    ED0ED1

    ED10ED11

    ED12ED13

    ED14ED15

    ED16_CKN ED16_CKP

    ED2ED3

    ED4ED5

    ED6ED7

    ED8ED9

    GND0

    GND1 GND10

    GND11

    GND12

    GND13

    GND14

    GND15

    GND16

    GND17

    GND2

    GND3

    GND4

    GND5

    GND6

    GND7

    GND8

    GND9

    OD0OD1

    OD10OD11

    OD12OD13

    OD14OD15

    OD16_CKN OD16_CKP

    OD2OD3

    OD4OD5

    OD6OD7

    OD8OD9

    AGILENT*_LA_E5390A

    n.c.

    Logi

    c A

    naly

    zer C

    onn

    Align

    Alignn.c.

    n.c. Align

    Align n.c.

    Sof

    t Tou

    ch*

    ED0ED1

    ED10ED11

    ED12ED13

    ED14ED15

    ED16_CKN ED16_CKP

    ED2ED3

    ED4ED5

    ED6ED7

    ED8ED9

    GND0

    GND1 GND10

    GND11

    GND12

    GND13

    GND14

    GND15

    GND16

    GND17

    GND2

    GND3

    GND4

    GND5

    GND6

    GND7

    GND8

    GND9

    OD0OD1

    OD10OD11

    OD12OD13

    OD14OD15

    OD16_CKN OD16_CKP

    OD2OD3

    OD4OD5

    OD6OD7

    OD8OD9

    AGILENT*_LA_E5390A

    n.c.

    Logi

    c A

    naly

    zer C

    onn

    Align

    Alignn.c.

    n.c. Align

    Align n.c.

    Sof

    t Tou

    ch*ED0ED1

    ED10ED11

    ED12ED13

    ED14ED15

    ED16_CKN ED16_CKP

    ED2ED3

    ED4ED5

    ED6ED7

    ED8ED9

    GND0

    GND1 GND10

    GND11

    GND12

    GND13

    GND14

    GND15

    GND16

    GND17

    GND2

    GND3

    GND4

    GND5

    GND6

    GND7

    GND8

    GND9

    OD0OD1

    OD10OD11

    OD12OD13

    OD14OD15

    OD16_CKN OD16_CKP

    OD2OD3

    OD4OD5

    OD6OD7

    OD8OD9

    AGILENT*_LA_E5390A

    n.c.

    Logi

    c A

    naly

    zer C

    onn

    Align

    Alignn.c.

    n.c. Align

    Align n.c.

    Sof

    t Tou

    ch*

    ED0ED1

    ED10ED11

    ED12ED13

    ED14ED15

    ED16_CKN ED16_CKP

    ED2ED3

    ED4ED5

    ED6ED7

    ED8ED9

    GND0

    GND1 GND10

    GND11

    GND12

    GND13

    GND14

    GND15

    GND16

    GND17

    GND2

    GND3

    GND4

    GND5

    GND6

    GND7

    GND8

    GND9

    OD0OD1

    OD10OD11

    OD12OD13

    OD14OD15

    OD16_CKN OD16_CKP

    OD2OD3

    OD4OD5

    OD6OD7

    OD8OD9

    AGILENT*_LA_E5390A

    n.c.

    Logi

    c A

    naly

    zer C

    onn

    Align

    Alignn.c.

    n.c. Align

    Align n.c.

    Sof

    t Tou

    ch*

    80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    NC

    NC

    NC

    NC

    NC

    NC

    NC

    NC

    NC

    NC

    NCNC

    NC

    NC

    NC

    NCNC

    NC

    NC

    NC

    NC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NC

    NCNC

    NCNC

    NCNC

    NCNC

    NC

    NC

    NC

    GND GND GND GND

    GND GND

    GND GNDGNDGND

    NC

    NC

    NC

    NC

    NO POP NO POP

    NO POP

    NO POP NO POP

    4/D2,10/B4DDR_DQS_P44/D2,10/A4 DDR_DQS_N4

    DDR_CS0_N4/C2,12/D5,14/A7

    4/C2,12/D6,14/A7DDR_CKE0

    DDR_BA0 4/C2,12/C5,14/B7

    4/D2,12/D5,14/B7DDR_CAS_N

    4/C2,12/D5,14/B7DDR_ODT0_N

    4/D2,12/D5,14/B7DDR_RAS_N

    4/D2,12/D5,14/B7 DDR_WE_N

    DDR_BA14/C2,12/C5,14/B7

    4/D2,10/A4DDR_DQS_P6

    DDR_A7

    DDR_A12

    DDR_A3

    DDR_A10

    DDR_A1

    DDR_A2

    4/C1,12/C5,14/D8

    DDR_A[13:0]

    DDR_A9

    DDR_A8

    DDR_A4

    DDR_A0

    DDR_A5

    DDR_A6

    DDR_A11

    DDR_A13

    4/D2,10/A4DDR_DQS_P7

    DDR_DM5

    DDR_DM1

    DDR_DM[8:0]4/C1,10/D4

    DDR_DM0

    DDR_DM2

    DDR_DM3

    DDR_DM6

    DDR_DM7

    DDR_DM4

    DDR_DQ37

    DDR_DQ34

    DDR_DQ60

    DDR_DQ58

    DDR_DQ57

    DDR_DQ39

    DDR_DQ35

    DDR_DQ36

    DDR_DQ33

    DDR_DQ32

    DDR_DQ38

    DDR_DQ61

    DDR_DQ56

    DDR_DQ59

    DDR_DQ63

    DDR_DQ62

    DDR_DQ55

    DDR_DQ48

    DDR_DQ41

    DDR_DQ51

    DDR_DQ54

    DDR_DQ42

    DDR_DQ45

    DDR_DQ44

    DDR_DQ40

    DDR_DQ43

    DDR_DQ46

    DDR_DQ47

    DDR_DQ52

    DDR_DQ53

    DDR_DQ49

    DDR_DQ50

    DDR_DQ20

    DDR_DQ0

    DDR_DQ25

    DDR_DQ30

    DDR_DQ27

    DDR_DQ31

    DDR_DQ28

    DDR_DQ24

    DDR_DQ29

    DDR_DQ26

    DDR_DQ11DDR_DQ15

    DDR_DQ14

    DDR_DQ10

    DDR_DQ9

    DDR_DQ8

    DDR_DQ12

    DDR_DQ13

    DDR_DQ21

    DDR_DQ22

    DDR_DQ23

    DDR_DQ16

    DDR_DQ3

    DDR_DQ2

    DDR_DQ6

    DDR_DQ1

    DDR_DQ5

    DDR_DQ[63:0]4/C1,10/D7

    DDR_DQ4

    DDR_DQ7

    DDR_DQ18

    DDR_DQ19

    DDR_DQ17

    4/D2,10/B4DDR_DQS_P2 DDR_DQS_N64/D2,10/A4DDR_DQS_N24/D2,10/B4

    DDR_DQS_P3 4/D2,10/B4

    DDR_DQS_P1 4/D2,10/B4

    DDR_DQS_N34/D2,10/B4

    DDR_DQS_N14/D2,10/B4

    4/D2,10/B4DDR_DQS_P0DDR_DQS_N04/D2,10/B4

    4/D2,10/A4 DDR_DQS_N7

    12/B6,14/B6DDR_BCK_LAI_P12/B6,14/B6 DDR_BCK_LAI_N

    4/D2,10/A4DDR_DQS_P54/D2,10/A4 DDR_DQS_N5

    9-23-2004_9:31DDR-II 400 AGILENT LAI PROBES 2111

    B15A15

    B22A22

    B24A24

    B25A25

    A27 B27

    B16A16

    B18A18

    B19A19

    B21A21

    A3

    A6 B6

    B9

    B12

    B14

    B17

    B20

    B23

    B26

    A9

    A12

    A14

    A17

    A20

    A23

    A26

    B3

    B1A1

    B8A8

    B10A10

    B11A11

    A13 B13

    B2A2

    B4A4

    B5A5

    B7A7

    J4M1

    B15A15

    B22A22

    B24A24

    B25A25

    A27 B27

    B16A16

    B18A18

    B19A19

    B21A21

    A3

    A6 B6

    B9

    B12

    B14

    B17

    B20

    B23

    B26

    A9

    A12

    A14

    A17

    A20

    A23

    A26

    B3

    B1A1

    B8A8

    B10A10

    B11A11

    A13 B13

    B2A2

    B4A4

    B5A5

    B7A7

    J5M1

    B15A15

    B22A22

    B24A24

    B25A25

    A27 B27

    B16A16

    B18A18

    B19A19

    B21A21

    A3

    A6 B6

    B9

    B12

    B14

    B17

    B20

    B23

    B26

    A9

    A12

    A14

    A17

    A20

    A23

    A26

    B3

    B1A1

    B8A8

    B10A10

    B11A11

    A13 B13

    B2A2

    B4A4

    B5A5

    B7A7

    J5N2

    B15A15

    B22A22

    B24A24

    B25A25

    A27 B27

    B16A16

    B18A18

    B19A19

    B21A21

    A3

    A6 B6

    B9

    B12

    B14

    B17

    B20

    B23

    B26

    A9

    A12

    A14

    A17

    A20

    A23

    A26

    B3

    B1A1

    B8A8

    B10A10

    B11A11

    A13 B13

    B2A2

    B4A4

    B5A5

    B7A7

    J4N1

    B15A15

    B22A22

    B24A24

    B25A25

    A27 B27

    B16A16

    B18A18

    B19A19

    B21A21

    A3

    A6 B6

    B9

    B12

    B14

    B17

    B20

    B23

    B26

    A9

    A12

    A14

    A17

    A20

    A23

    A26

    B3

    B1A1

    B8A8

    B10A10

    B11A11

    A13 B13

    B2A2

    B4A4

    B5A5

    B7A7

    J5N1

  • 80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    P3_3V

    0.1UF16V

    GND

    GND

    5%10

    00

    NC

    0.1UF16V

    GND

    GND

    4.7UFX5R

    P1_8V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    P1_8V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    GND

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    GND

    BLM18BD601SN1J

    NCNCNCNCNCNC

    NCNCNC

    5%

    1

    0.1UF16V

    GND

    GND

    2.2NF50V1%

    SO8

    FM34W02ULM8

    SPD_2K_EEPROM

    A0

    VSS SDASCLWP

    VCCA1A2

    NCNCGND

    0.1UF16V

    0.1UF16V

    NC

    C0C1

    CLKCLK_N

    CSR_N

    D10D11D12D13D14D15D16D17D18D19

    D1_DCKED2

    D20D21D22D23D24D25

    D3D4_DODTD5D6D7_DCS_ND8D9

    GND1

    GND10GND11GND12GND13GND14

    GND2GND3GND4GND5GND6GND7GND8GND9

    NC0NC1NC2NC3NC4NC5NC6NC7

    Q10Q11Q12Q13Q14Q15Q16Q17Q18Q19

    Q1_QCKEQ2

    Q20Q21Q22Q23Q24Q25

    Q3Q4_QODT

    Q5Q6

    Q7_QCS_NQ8Q9

    RESET_N

    VDD1

    VDD10VDD11VDD12VDD13VDD14VDD15VDD16

    VDD2VDD3VDD4VDD5VDD6VDD7VDD8VDD9

    VREF0VREF1

    IDT74SSTU32864BF

    AGND

    AVDD

    CLKCLK_N

    FBINFBIN_N

    FBOUTFBOUT_N

    GND1

    GND10GND11GND12

    GND2GND3GND4GND5GND6GND7GND8GND9

    OEOS

    VDDQ1

    VDDQ10

    VDDQ2VDDQ3VDDQ4VDDQ5VDDQ6VDDQ7VDDQ8VDDQ9

    Y0Y0_N

    Y1Y1_N

    Y2Y2_N

    Y3Y3_N

    Y4Y4_N

    Y5Y5_N

    Y6Y6_N

    Y7Y7_N

    Y8Y8_N

    Y9Y9_N

    IDTCSPU877BV

    NCNC

    NC

    NC

    4.7UFX5R

    4.7UFX5R

    GND

    P1_8V

    P1_8V

    5%8.

    2K

    5%10

    00

    5%10

    00

    GND

    P1_8V

    P1_8V

    P1_8V

    5%8.

    2K

    P1_8V

    PNP_MMBT3906

    GND

    GND;474LVC2G08

    GND;474LVC2G32

    GND

    5%2000

    P3_3V

    GND

    PLL BUFFER 1:10 DRIVER

    * FEEDBACK

    NOTE: CKE latch circuitry.

    DDR-II DIMM REGISTER

    1:1 25-bit to 25-bit

    * FEEDBACK

    SPD_WPDDR_I2C_SCL 4/C6,17/C5DDR_I2C_SDA 4/C6,17/C5

    PWR_OK8/D8,9/C2,9/D6,19/C4,20/A8

    12

    R3C

    1

    4/C2,11/C1,14/A7 DDR_CKE0

    CKE0_LATCH_FB

    1

    27

    U5C3

    P1_8V;8

    CKE0_LATCH

    1

    27

    U5C2

    P1_8V;8

    1

    3

    2

    Q4C1

    13/D5,13/B5,13/B7,13/D7,13/D3,13/B2DDR_400_VREF

    12

    R5C

    15

    13/D7DDR_REG_A[13:0]

    DDR_REG_A10

    DDR_REG_A8

    DDR_REG_A9

    DDR_REG_A5

    DDR_REG_A12DDR_REG_A7

    DDR_REG_A3

    DDR_REG_A11DDR_REG_A6

    DDR_REG_A1

    DDR_REG_A13

    DDR_REG_A4

    DDR_REG_A2

    DDR_REG_A0

    DDR_CLK_AVDD

    SPD_A0SPD_A1SPD_A2

    12

    R3B

    1

    21

    R3B

    2

    12

    R3B

    5

    1

    2

    C3B1

    1

    2

    C5C2

    DDR_BCK_LAI_N 11/C3,14/B611/C1,14/B6DDR_BCK_LAI_P

    DDR_BCK5_P 12/D5,14/B612/D5,14/B6DDR_BCK5_N

    DDR_BCK4_N 13/C3,14/B613/C3,14/B6DDR_BCK4_P

    DDR_BCK2_N 13/C5,14/C613/C5,14/C6DDR_BCK2_P

    DDR_BCK3_N 13/A5,14/B613/A5,14/C6DDR_BCK3_P

    DDR_A1

    DDR_A0

    DDR_A2

    DDR_A4

    DDR_A8

    DDR_A13

    DDR_A10

    DDR_A3

    DDR_A12

    DDR_A[13:0]4/C1,11/D3,14/D8

    DDR_A7

    DDR_A5

    DDR_A9

    DDR_A11DDR_A6

    4/C2,11/C3,14/B7 DDR_BA1 13/C5,13/A5,13/A7,13/C7,13/C3DDR_REG_BA1

    DDR_CAS_N4/D2,11/C1,14/B7 DDR_REG_CAS_N 13/B5,13/A5,13/A7,13/C7,13/C3

    DDR_BA04/C2,11/D1,14/B7 13/C5,13/A5,13/A7,13/C7,13/C3DDR_REG_BA0

    DDR_ODT0_N4/C2,11/C1,14/B7

    4/C2,11/C3,14/A7 DDR_CS0_N

    DDR_REG_CKE0 13/C5,13/A5,13/A7,13/C7,13/C3

    DDR_WE_N4/D2,11/D3,14/B7 DDR_REG_WE_N 13/B5,13/A5,13/A7,13/C7,13/C3

    F6

    F5

    K5K4

    F1

    K2

    K1

    C1

    B1

    A3

    A4

    B6

    C6

    K6

    A6

    E1

    J6

    A5

    K3

    J1

    D1

    A1

    A2

    D6

    H6G6

    E6

    D5

    G1

    H1

    C5H2

    J2J3J4J5

    H5

    B2B3B4

    C2B5

    G5G4G3G2F2E5E2D4D3D2

    U4B1

    D2

    G6G5

    H1J1

    J2

    M1N1P1R1T1B2C2E2F2K2

    A1B1

    L2M2N2P2R2T2

    C1D1E1F1H2K1L1

    B3

    K4M3M4P3P4

    B4D3D4F3F4H3H4K3

    A6D6H6A2G1J5

    M5N5P5R5T5B6C6E6F6K6

    A5B5

    L6M6N6P6R6T6

    C5D5E5F5H5K5L5

    G2

    A4

    L3L4N3N4R3R4T4

    C3C4E3E4G3G4J3J4

    A3T3

    J6

    U5C1

    1

    2

    C6M11

    2

    1 C5C1

    13/A7,14/C6DDR_BCK1_N13/A7,14/C6DDR_BCK1_P

    DDR_BCK0_N 13/C7,14/C6

    DDR_FB_P 12/B7,14/B6

    13/C7,14/C6DDR_BCK0_P

    DDR_FB_P12/B6,14/B6

    4/A2,14/D6 DDR_CK0_P

    1

    4 5678

    23

    U3B1

    C4B2

    12/B6,14/A6 DDR_FB_N

    2

    1 C4B3

    1 2R4B17

    4/A2,14/C6 DDR_CK0_N

    DDR_FB_N 12/B7,14/A6

    1 2

    FB4B1

    1

    2

    C5N3

    2

    1 C5N4 1

    2

    C5N51

    2

    C5N7

    2

    1 C5N21

    2

    C5N1

    2

    1 C5N6

    1

    2

    C6M16

    2

    1 C6M10 1

    2

    C6M8

    DDR_M_RST_N4/D2,12/D5

    2

    1 C4B1

    DDR_M_RST_N4/D2,12/B7

    DDR_REG_CS0_N 13/C5,13/A5,13/A7,13/C7,13/C3

    DDR_REG_ODT0_N 13/B5,13/A5,13/A7,13/C7,13/C3

    DDR_BCK5_N12/B6,14/B6

    DDR_BCK5_P12/B6,14/B6

    1

    2

    C5C3

    DDR_RAS_N4/D2,11/C1,14/B7 13/C5,13/A5,13/A7,13/C7,13/C3DDR_REG_RAS_N

    12

    R3B

    3

    1

    2

    C3B2

    9-23-2004_9:04PLL BUFFER / DDR-II 400 REGISTER / SPD 2112

  • 80331 DDR-II 400 CRBSCD HARDWARE ENGINEERING P 1.01

    C

    8 7 6 5

    D

    B

    A A

    B

    D

    8 7 6 5

    2 1

    2

    3

    3

    4

    4

    C

    SHEETDATE MODIFIED:DESIGN NAME:

    SHEET TITLE:

    OFDESIGN ENGINEER: VERSION:

    NCNCNCNC

    NCNC

    NCNC

    NCNCNCNC

    NCNC

    NCNC NC

    NC

    NCNC

    NCNCNCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    NCNC

    P1_8V

    4.7UFX5R

    4.7UFX5R

    4.7UFX5R

    4.7UFX5R

    NC

    GND

    GND

    0.1UF16V

    GND

    0.1UF16V

    GND

    GND

    0.1UF16V

    GND

    NC

    NCNC

    NC

    P1_8V

    NCNCNCNC

    NCNCNC

    NCNCNC

    NCNCNCNC

    P1_8V

    GND

    0.1UF16V

    BLM18BD601SN1J5%

    1

    BLM18BD601SN1J

    P1_8V

    5%

    1

    BLM18BD601SN1J5%

    1

    P1_8V

    BLM18BD601SN1J5%

    1

    P1_8V

    NC

    NC

    4.7UFX5R

    BLM18BD601SN1J

    NC

    P1_8VP1_8V

    5%

    1

    NC

    P1_8V

    NCA0A1

    A10A11A12

    A2A3A4A5A6A7A8A9

    BA0BA1

    CAS_N

    CKECK_NCK_P

    CS_N

    LDMLDQ0LDQ1LDQ2LDQ3LDQ4LDQ5LDQ6LDQ7

    LDQS_NLDQS_P

    NC1

    NC10

    NC2NC3NC4NC5NC6NC7NC8NC9

    NC_A13

    NC_A14NC_A15

    NC_BA2

    ODT

    RAS_N

    UDMUDQ0UDQ1UDQ2UDQ3UDQ4UDQ5UDQ6UDQ7

    UDQS_NUDQS_P

    VDD0VDD1VDD2VDD3VDD4

    VDDL

    VDDQ0VDDQ1VDDQ2VDDQ3VDDQ4VDDQ5VDDQ6VDDQ7VDDQ8VDDQ9

    VREF

    VSS0VSS1VSS2VSS3VSS4

    VSSDL

    VSSQ0VSSQ1VSSQ2VSSQ3VSSQ4VSSQ5VSSQ6VSSQ7VSSQ8VSSQ9

    WE_N

    DDRII_512M_X16

    DDR2_32MX16

    JED

    EC

    Sta

    ndar

    d fo

    otpr

    int..

    Con

    sult

    JED

    EC

    sta

    ndar

    d fo

    r pin

    map

    ping

    w/ s

    uppo

    rt ba

    lls.

    A0A1

    A10A11A12

    A2A3A4A5A6A7A8A9

    BA0BA1

    CAS_N

    CKECK_NCK_P

    CS_N

    LDMLDQ0LDQ1LDQ2LDQ3LDQ4LDQ5LDQ6LDQ7

    LDQS_NLDQS_P

    NC1

    NC10

    NC2NC3NC4NC5NC6NC7NC8NC9

    NC_A13

    NC_A14NC_A15

    NC_BA2

    ODT

    RAS_N

    UDMUDQ0UDQ1UDQ2UDQ3UDQ4UDQ5UDQ6UDQ7

    UDQS_NUDQS_P

    VDD0VDD1VDD2VDD3VDD4

    VDDL

    VDDQ0VDDQ1VDDQ2VDDQ3VDDQ4VDDQ5VDDQ6VDDQ7VDDQ8VDDQ9

    VREF

    VSS0VSS1VSS2VSS3VSS4

    VSSDL

    VSSQ0VSSQ1VSSQ2VSSQ3VSSQ4VSSQ5VSSQ6VSSQ7VSSQ8VSSQ9

    WE_N

    DDRII_512M_X16

    DDR2_32MX16

    JED

    EC

    Sta

    ndar

    d fo

    otpr

    int..

    Con

    sult

    JED

    EC

    sta

    ndar

    d fo

    r pin

    map

    ping

    w/ s

    uppo

    rt ba

    lls.

    A0A1

    A10A11A12

    A2A3A4A5A6A7A8A9

    BA0BA1

    CAS_N

    CKECK_NCK_P

    CS_N

    LDMLDQ0LDQ1LDQ2LDQ3LDQ4LDQ5LDQ6LDQ7

    LDQS_NLDQS_P

    NC1

    NC10

    NC2NC3NC4NC5NC6NC7NC8NC9

    NC_A13

    NC_A14NC_A15

    NC_BA2

    ODT

    RAS_N

    UDMUDQ0UDQ1UDQ2UDQ3UDQ4UDQ5UDQ6UDQ7

    UDQS_NUDQS_P

    VDD0VDD1VDD2VDD3VDD4

    VDDL

    VDDQ0VDDQ1VDDQ2VDDQ3VDDQ4VDDQ5VDDQ6VDDQ7VDDQ8VDDQ9

    VREF

    VSS0VSS1VSS2VSS3VSS4

    VSSDL

    VSSQ0VSSQ1VSSQ2VSSQ3VSSQ4VSSQ5VSSQ6VSSQ7VSSQ8VSSQ9

    WE_N

    DDRII_512M_X16

    DDR2_32MX16

    JED

    EC

    Sta

    ndar

    d fo

    otpr

    int..

    Con

    sult

    JED

    EC

    sta

    ndar

    d fo

    r pin

    map

    ping

    w/ s

    uppo

    rt ba

    lls.

    A0A1

    A10A11A12

    A2A3A4A5A6A7A8A9

    BA0BA1

    CAS_N

    CKECK_NCK_P

    CS_N

    LDMLDQ0LDQ1LDQ2LDQ3LDQ4LDQ5LDQ6LDQ7

    LDQS_NLDQS_P

    NC1

    NC10

    NC2NC3NC4NC5NC6NC7NC8NC9

    NC_A13

    NC_A14NC_A15

    NC_BA2

    ODT

    RAS_N

    UDMUDQ0UDQ1UDQ2UDQ3UDQ4UDQ5UDQ6UDQ7

    UDQS_NUDQS_P

    VDD0VDD1VDD2VDD3VDD4

    VDDL

    VDDQ0VDDQ1VDDQ2VDDQ3VDDQ4VDDQ5VDDQ6VDDQ7VDDQ8VDDQ9

    VREF

    VSS0VSS1VSS2VSS3VSS4

    VSSDL

    VSSQ0VSSQ1VSSQ2VSSQ3VSSQ4VSSQ5VSSQ6VSSQ7VSSQ8VSSQ9

    WE_N

    DDRII_512M_X16

    DDR2_32MX16

    JED

    EC

    Sta

    ndar

    d fo

    otpr

    int..

    Con

    sult

    JED

    EC

    sta

    ndar

    d fo

    r pin

    map

    ping

    w/ s

    uppo

    rt ba

    lls.

    DDRII_512M_X8

    DDR2_32MX8

    A0A1

    A10A11A12

    A2A3A4A5A6A7A8A9

    BA0BA1

    CAS_N

    CKECK_NCK_P

    CS_N

    DM_RDQS_P

    DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7

    DQS_NDQS_P

    NC1NC2NC3NC4NC5NC6NC7NC8

    NC_A13

    NC_A14NC_A15

    NC_BA2

    NU_RDQS_N

    ODT

    RAS_N

    VDD0VDD1VDD2VDD3

    VDDL

    VDDQ0VDDQ1VDDQ2VDDQ3VDDQ4

    VREF

    VSS0VSS1VSS2VSS3

    VSSDL

    VSSQ0VSSQ1VSSQ2VSSQ3VSSQ4

    WE_N Con

    sult

    JED

    EC

    sta

    ndar

    d fo

    r pin

    map

    ping

    w/ s

    uppo

    rt ba

    lls.

    JED

    EC

    Sta

    ndar

    d fo

    otpr

    int.

    1%10

    0

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V

    0.1UF16V 0.1UF

    16V

    GND

    GND

    GND

    GND

    GND

    GND

    GND

    GND

    0.1UF16V

    P1_8V

    1%10

    0

    0.1UF16V

    0.1UF16V

    P1_8V

    GND GNDGND

    NOTE: Place VREF divider circuitry in close proximity to DDR memory devices.

    DDR_400_VREF 12/D2,13/D5,13/B5,13/B7,13/D7,13/D3

    DDR_VDDL_1

    1

    2

    C6B2

    2

    1 C6B1

    12

    R6B

    16

    1

    2

    C6B3

    2

    1 C5M71

    2

    C4M3

    1

    2

    C5M9

    2

    1 C6M4

    2

    1 C4M4

    12/D2,13/D5,13/B7,13/D7,13/D3,13/B2 DDR_400_VREF

    1

    2

    C4M7

    21

    R6B

    17

    M8M3

    M2P7R2

    M7N2N8N3N7P2P8P3

    L2L3

    J8

    K2

    F3

    G8G2H7H3H1H9F1F9

    F7

    A1A2A8A9W1W2W8W9

    R8

    R3R7

    L1

    E2

    K9

    K7

    E1J9

    M9R1

    J1

    E9G1G3G7G9

    J2

    E3J3N1P9

    J7

    E7F2F8H2H8

    E8

    K8

    L8

    L7K3

    U5B1

    R8R3

    R2U7V2

    R7T2T8T3T7U2U8U3

    P2P3

    M8

    N2

    J3K8K2L7L3L1L9J1J9

    J7

    D2

    AA9

    H2A1A2A8A9AA1AA2AA8

    V8

    V3V7

    P1

    N9

    E3F8F2G7G3G1G9E1E9

    E7

    D1H1V1M9R9

    M1

    D9F1F3F7F9H9K1K3K7K9

    M2

    D3H3M3T1U9

    M7

    D7E8G8H7J8L8E2G2J2L2

    D8

    H8

    N8

    P8N7P7N3

    U4B2

    N3P7N7P8

    N8

    H8

    D8

    L2J2G2E2L8J8H7G8E8D7

    M7

    U9T1M3H3D3

    M2

    K9K7K3K1H9F9F7F3F1D9

    M1

    R9M9V1H1D1

    E7

    E9E1G9G1G3G7F2F8E3

    N9

    P1

    V7V3

    V8

    AA8AA2AA1A9A8A2A1H2

    AA9

    D2

    J7

    J9J1L9L1L3L7K2K8J3

    N2

    M8

    P3P2

    U3U8U2T7T3T8T2R7

    V2U7R2

    R3R8

    U5B2

    R8R3

    R2U7V2

    R7T2T8T3T7U2U8U3

    P2P3

    M8

    N2

    J3K8K2L7L3L1L9J1J9

    J7

    D2

    AA9

    H2A1A2A8A9AA1AA2AA8

    V8

    V3V7

    P1

    N9

    E3F8F2G7G3G1G9E1E9

    E7

    D1H1V1M9R9

    M1

    D9F1F3F7F9H9K1K3K7K9

    M2

    D3H3M3T1U9

    M7

    D7E8G8H7J8L8E2G2J2L2

    D8

    H8

    N8

    P8N7P7N3

    U6B2

    N3P7N7P8

    N8

    H8

    D8

    L2J2G2E2L8J8H7G8E8D7

    M7

    U9T1M3H3D3

    M2

    K9K7K3K1H9F9F7F3F1D9

    M1

    R9M9V1H1D1

    E7

    E9E1G9G1G3G7F2F8E3

    N9

    P1

    V7V3

    V8

    AA8AA2AA1A9A8A2A1H2

    AA9

    D2

    J7

    J9J1L9L1L3L7K2K8J3

    N2

    M8

    P3P2

    U3U8U2T7T3T8T2R7

    V2U7R2

    R3R8

    U5B3

    DDR_VDDL_4

    DDR_VDDL_3

    DDR_VDDL_2

    DDR_VDDL_0

    DDR_400_DQ6

    DDR_400_DQ5

    DDR_400_DQ1DDR_400_DQ4

    DDR_400_DQ0

    DDR_400_DQ2

    DDR_400_DQ57

    DDR_400_DQ61

    DDR_400_DQ60

    DDR_400_DQ56

    DDR_400_DQ59

    DDR_400_DQ58

    DDR_400_DQ63

    DDR_400_DQ62

    DDR_400_DQ37DDR_400_DQ38

    DDR_400_DQ29

    DDR_400_DQ28

    DDR_400_DQ31

    DDR_400_DQ25

    DDR_400_DQ24

    DDR_400_DQ30

    DDR_400_DQ26

    DDR_400_DQ27

    DDR_400_DQ21

    DDR_400_DQ16

    DDR_400_DQ17

    DDR_400_DQ23

    DDR_400_DQ22

    DDR_400_DQ14DDR_400_DQ8

    DDR_400_DQ11DDR_400_DQ12

    DDR_400_DQ9DDR_400_DQ15DDR_400_DQ13DDR_400_DQ10

    DDR_400_DQ41DDR_400_DQ42

    DDR_400_DQ35DDR_400_DQ36

    DDR_400_DQ39

    DDR_400_DQ32DDR_400_DQ33

    DDR_400_DQ48

    DDR_400_DQ50

    DDR_400_DQ54DDR_400_DQ55

    DDR_400_DQ20

    10/D5DDR_400_DQ[63:0]

    DDR_400_DQ47

    DDR_400_DQ34

    DDR_400_DQ7

    DDR_400_DQ3

    DDR_400_DQ46

    DDR_400_DQ43DDR_400_DQ45

    DDR_400_DQ44DDR_400_DQ40

    DDR_400_DQ51DDR_400_DQ49DDR_400_DQ53

    DDR_400_DQ52

    DDR_400_DQ19

    DDR_400_DQ18

    DDR_400_DM1

    DDR_400_DM2

    DDR_400_DM4

    DDR_400_DM8

    DDR_400_DM7

    DDR_400_DM6

    10/D3DDR_400_DM[8:0]

    DDR


B5 / B7-SpeedGleam 5-7 Service Manuald2z4qs2e3spnc1.cloudfront.net/product_file/file/2780/...B5/B7 SpeedGleam ® 5 SpeedGleam ® 7 9011478 Rev. 00 (01-2014) Walk-Behind Battery Burnisher

B5 / B7-SpeedGleam 5-7 Service Manuald2z4qs2e3spnc1.cloudfront.net/product_file/file/2780/...B5/B7 SpeedGleam ® 5 SpeedGleam ® 7 9011478 Rev. 00 (01-2014) Walk-Behind Battery Burnisher

Pin Information for the Intel Cyclone 10 LP 10CL040 Device · b7 vrefb7n1 io pll2_clkoutp b20 b7 vrefb7n1 io diffio_t46p c17 b7 vrefb7n1 io rup4 b19 b7 vrefb7n1 io rdn4 a19 b7 vrefb7n1

Pin Information for the Intel Cyclone 10 LP 10CL040 Device · b7 vrefb7n1 io pll2_clkoutp b20 b7 vrefb7n1 io diffio_t46p c17 b7 vrefb7n1 io rup4 b19 b7 vrefb7n1 io rdn4 a19 b7 vrefb7n1

Pin Information for the Intel Cyclone 10 LP 10CL120 Device · 2020. 10. 29. · b7 vrefb7n0 io pll2_clkoutp b20 b7 vrefb7n0 io pll2_clkoutn a20 b7 vrefb7n0 io diffio_t54p c17 b7 vrefb7n0

Pin Information for the Intel Cyclone 10 LP 10CL120 Device · 2020. 10. 29. · b7 vrefb7n0 io pll2_clkoutp b20 b7 vrefb7n0 io pll2_clkoutn a20 b7 vrefb7n0 io diffio_t54p c17 b7 vrefb7n0

CATÁLOGO - PINTO · 2021. 1. 5. · Índice catÁlogo camisetas 07 hombre b7 mmcc slim e1 h b7 mmcc bÁsica e1 h b7 mmcv rib e1 h b7 mmcv slim h b7 mmcv casual h b7 ml cv bÁsica

CATÁLOGO - PINTO · 2021. 1. 5. · Índice catÁlogo camisetas 07 hombre b7 mmcc slim e1 h b7 mmcc bÁsica e1 h b7 mmcv rib e1 h b7 mmcv slim h b7 mmcv casual h b7 ml cv bÁsica

VOCON Board Signals Part4_… · A11 A8/7 A8/7 1 J2/101 -- A8/7 --A12 B7/8 B7/8 12 K1/102--B7/8 A13 J3/9 -- 4 H3/104 D9/7 -- 2 A14----5 G2/106 B9/6--1 A15 K3/20 K3/20 11 H2/107 D10/5

VOCON Board Signals Part4_… · A11 A8/7 A8/7 1 J2/101 -- A8/7 --A12 B7/8 B7/8 12 K1/102--B7/8 A13 J3/9 -- 4 H3/104 D9/7 -- 2 A14----5 G2/106 B9/6--1 A15 K3/20 K3/20 11 H2/107 D10/5

Pin Information for the Intel Cyclone 10 LP 10CL120 Device · b7 vrefb7n0 io pll2_clkoutp b20 b7 vrefb7n0 io pll2_clkoutn a20 b7 vrefb7n0 io diffio_t54p c17 b7 vrefb7n0 io rup4 b19

Pin Information for the Intel Cyclone 10 LP 10CL120 Device · b7 vrefb7n0 io pll2_clkoutp b20 b7 vrefb7n0 io pll2_clkoutn a20 b7 vrefb7n0 io diffio_t54p c17 b7 vrefb7n0 io rup4 b19

1 B7 BALLAROVAL STREEE T BSB-Taa. MASSACHUSETTa -t. >- t -7 · °°°9761 CORPORATION 1 B7 BALLAROVAL STREEE T SUITE A-1 OO WILMINGTONBSB-Taa.MASSACHUSETTa -t. O1SBS7 , >-~ 't-7 1

1 B7 BALLAROVAL STREEE T BSB-Taa. MASSACHUSETTa -t. >- t -7 · °°°9761 CORPORATION 1 B7 BALLAROVAL STREEE T SUITE A-1 OO WILMINGTONBSB-Taa.MASSACHUSETTa -t. O1SBS7 , >-~ 't-7 1

Pin Information for the Intel Cyclone 10 LP 10CL055 Device · b7 vrefb7n0 io pll2_clkoutp b20 b7 vrefb7n0 io diffio_t35p c17 b7 vrefb7n0 io rup4 b19 b7 vrefb7n0 io rdn4 a19 b7 vrefb7n0

Pin Information for the Intel Cyclone 10 LP 10CL055 Device · b7 vrefb7n0 io pll2_clkoutp b20 b7 vrefb7n0 io diffio_t35p c17 b7 vrefb7n0 io rup4 b19 b7 vrefb7n0 io rdn4 a19 b7 vrefb7n0

Reading instructions€¦ · 7 • $4b3< e3 e/b=@a b6/b /@3 7

Reading instructions€¦ · 7 • $4b3< e3 e/b=@a b6/b /@3 7

joc.kntu.ac.irjoc.kntu.ac.ir/files/site1/pages/arshiv_nashriye/87vol.2._n.1, filejoc.kntu.ac.ir

joc.kntu.ac.irjoc.kntu.ac.ir/files/site1/pages/arshiv_nashriye/87vol.2._n.1, filejoc.kntu.ac.ir

Cole Porter NIGHT AND DAY arr. Yasuhiro Koyama · Cabasa, Tri. Tri., Tamb. Conga Dr. Fill Elec. Gtr. E 7 E6 B 7 B7 E add9 E E 7 E6 Vibes E 7 E6 C 7 B7 E add9 St. Bs. Bs. Euph. B.

Cole Porter NIGHT AND DAY arr. Yasuhiro Koyama · Cabasa, Tri. Tri., Tamb. Conga Dr. Fill Elec. Gtr. E 7 E6 B 7 B7 E add9 E E 7 E6 Vibes E 7 E6 C 7 B7 E add9 St. Bs. Bs. Euph. B.

ML7033 B7-B1 CR14 B4-B1 CR7-B7 CR14-B7 Call-ID1 RingTone1 CH1TG1 Call-ID2 RingTone2 CH2TG1 CR1 B0 CR1 B6 CR11-B3 CR1 B1 CR1 B 7 CR11-B7 SLIC Control FEDL7033-04 ML7033 3/52 PIN CONFIGURATION

ML7033 B7-B1 CR14 B4-B1 CR7-B7 CR14-B7 Call-ID1 RingTone1 CH1TG1 Call-ID2 RingTone2 CH2TG1 CR1 B0 CR1 B6 CR11-B3 CR1 B1 CR1 B 7 CR11-B7 SLIC Control FEDL7033-04 ML7033 3/52 PIN CONFIGURATION

C Altered Scale...#9 # 5 b7 b7 b9 #11 3 1f R R # 9 b7 #11 # 5 b9 b9 3 3f R # 9 # 9 #11 # 5 b7 b9 5f 3 3 R # 9 # 5 b7 7f #11 #11 b9 3 R b7 9f # 9 #11 # 5 # 5 b9 R 3 # 9 # 5 b7 b7 b9

C Altered Scale...#9 # 5 b7 b7 b9 #11 3 1f R R # 9 b7 #11 # 5 b9 b9 3 3f R # 9 # 9 #11 # 5 b7 b9 5f 3 3 R # 9 # 5 b7 7f #11 #11 b9 3 R b7 9f # 9 #11 # 5 # 5 b9 R 3 # 9 # 5 b7 b7 b9

1 ATTACHMENT B7 B7 6-9-0… · 11 B7-1a(1) Permittees' Audit and Surveillance Program 12.....B7-2 13 B7-1a(2) WWIS Description .....B7-2 14 B7-1a(3) Examination of the Waste Stream

1 ATTACHMENT B7 B7 6-9-0… · 11 B7-1a(1) Permittees' Audit and Surveillance Program 12.....B7-2 13 B7-1a(2) WWIS Description .....B7-2 14 B7-1a(3) Examination of the Waste Stream

Immune Checkpoint Signaling in the Tumor Microenvironment · in the Tumor Microenvironment Galectin-9 B7-H3 B7-H4 PD-L1/ PD-L2 B7-1/B7-2 B7-H3? MHC CD40 OX40L ICOSL GITRL B7-1/B7-2

Immune Checkpoint Signaling in the Tumor Microenvironment · in the Tumor Microenvironment Galectin-9 B7-H3 B7-H4 PD-L1/ PD-L2 B7-1/B7-2 B7-H3? MHC CD40 OX40L ICOSL GITRL B7-1/B7-2

B7 Command

B7 Command

FRIDAY, NOVEMBER 27, 2015 Lethbridge Herald page - B7 OFFICE HOURS HERALD … · 2017. 2. 7. · FRIDAY, NOVEMBER 27, 2015 F Lethbridge Herald page - B7 Obituaries 1160 GEPKE SLOMP

FRIDAY, NOVEMBER 27, 2015 Lethbridge Herald page - B7 OFFICE HOURS HERALD … · 2017. 2. 7. · FRIDAY, NOVEMBER 27, 2015 F Lethbridge Herald page - B7 Obituaries 1160 GEPKE SLOMP

B7 Data centers are looking here, toobloximages.newyork1.vip.townnews.com/swnewsmedia... · | Chanhassen Villager March 7, 2013 | B7 Signifi cantly boost your company’s awareness

B7 Data centers are looking here, toobloximages.newyork1.vip.townnews.com/swnewsmedia... · | Chanhassen Villager March 7, 2013 | B7 Signifi cantly boost your company’s awareness

BSS QoS B7

BSS QoS B7

TECHNICAL DATASHEET - tecalemitflow.fi · 98 bonnet studs astm a193 gr b7 astm a193 gr b7 astm a193 gr b7 astm a193 gr b7 astm a193 gr b7 16b stud nuts astm a194 gr 2h astm a194 gr

TECHNICAL DATASHEET - tecalemitflow.fi · 98 bonnet studs astm a193 gr b7 astm a193 gr b7 astm a193 gr b7 astm a193 gr b7 astm a193 gr b7 16b stud nuts astm a194 gr 2h astm a194 gr