SystemVerilog Basic Committee Johny Srouji (Chair) Karen Pieper (Co-Chair)

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SystemVerilog Basic Committee Johny Srouji (Chair) Karen Pieper (Co-Chair)

Transcript of SystemVerilog Basic Committee Johny Srouji (Chair) Karen Pieper (Co-Chair)

Page 1: SystemVerilog Basic Committee Johny Srouji (Chair) Karen Pieper (Co-Chair)

SystemVerilog Basic Committee

Johny Srouji (Chair)Karen Pieper (Co-Chair)

Page 2: SystemVerilog Basic Committee Johny Srouji (Chair) Karen Pieper (Co-Chair)

January 22, 2003 www.accellera.org2 Johny Srouji & Karen Pieper

SV-BC F2F Agenda

09:00 – 09:30 Introduction, Charter Reminder, ProcessesReview of 01/20/03 tele-call minutesJohny will champion this topic

09:30 – 10:20 Issues that will not be addressed as part of 3.1 - Prioritize a list of issues that must be resolvedbefore mid February Karen will champion this topic

10:20 – 10:30 BREAK

10:30 – 12:00 SV-BC 18i, 18h, 18g Dave Rich & Cliff Cummings will champion this slot

12:00 - 12:30 LunchEveryone will champion this one

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January 22, 2003 www.accellera.org3 Johny Srouji & Karen Pieper

SV-BC F2F Agenda

12:30 - 14:00 Discuss/Finalize Peter open action items listPeter Flake will Champion this topic

 14:00 – 14:15 BREAK

14:15 – 14:45 Discuss Issue 19-67 Matt Maidment will champion this topic

 14:45 – 16:00 Discuss Issues that have proposals ready

(see status columns in the issues list) 

Page 4: SystemVerilog Basic Committee Johny Srouji (Chair) Karen Pieper (Co-Chair)

January 22, 2003 www.accellera.org4 Johny Srouji & Karen Pieper

Expected Attendees List

• In Person:Dennis BrophyKevin CameronCliff CummingsPeter FlakeJay LawrenceMatt MaidmentFrancoise MartinoleMehdi MohtashemiKaren PieperBrad PierceDave RichDavid SmithJohny SroujiGord Vreugdenhil

• In phone:Dan JacobiSteven Sharp

Page 5: SystemVerilog Basic Committee Johny Srouji (Chair) Karen Pieper (Co-Chair)

January 22, 2003 www.accellera.org5 Johny Srouji & Karen Pieper

SV-BC F2F

• Charter• To address issues exposed in SystemVerilog

3.0 standard through implementation• Cannot re-define SystemVerilog 3.0.

SystemVerilog 3.0 is an Accellera Approved Standard

• The goal is to make sure we have:> Clear syntax.> Clear semantics.> Limited modification based on implementation.

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January 22, 2003 www.accellera.org6 Johny Srouji & Karen Pieper

SV-BC F2F

• On the extreme case:• If there is something which will truly disable the

language or its usage, this should be considered carefully

• Allow appropriate discussion and debate with the different experts and language architects

• Other SV committees are basing their efforts on existing SystemVerilog 3.0:• We cannot remove or add things unless they are

based on clear implementation issues

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January 22, 2003 www.accellera.org7 Johny Srouji & Karen Pieper

SV-BC F2F

• Processes• Proper time is allocated for each topic, to permit

enough constructive discussion• Once time is up, we will follow the voting process after

a discussion of each of the issues• Voting rights:

> Everyone can express his/her opinion> Those who attended 3 of the last 4 meetings can vote

• Minutes will be summarized and publicized by Johny & Karen

• “Proposed” Email voting process is summarized in the next foil

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January 22, 2003 www.accellera.org8 Johny Srouji & Karen Pieper

Email Voting Process

• Chair/Co-Chair is eligible to propose a topic for email voting• Based on the topic complexity• Based on whether it has been presented/discussed before• Motivation: resolve simple non controversial issues quickly, and

better usage of our meetings time

• A committee member can send a note to Chair/Co-Chair to propose raising a topic for email voting

• Decision Process:• A Clear and Documented proposal must be sent• A one week time slot will be allocated – from time of submission• Whoever does not vote, will be assumed as “not objecting”• If an eligible voting member votes against it, the topic must be

brought up for a discussion in the next meeting