System-on-Chip Design Hao Zheng Comp Sci & Eng U of South Florida 1.
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Transcript of System-on-Chip Design Hao Zheng Comp Sci & Eng U of South Florida 1.
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System-on-Chip Design
Hao ZhengComp Sci & Eng
U of South Florida
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Overview
• A system-on-chip (SoC): a computing system on a single silicon substrate that integrates both hardware and software.
• Hardware packages all necessary electronics for a particular application.–which implemented by SW running on HW.
• Aim for low power and low cost.–Also more reliable than multi-component sys.
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SoC HardwareArchitecture
Often used in embedded application.
How to implement an application on a HW platform executing some SW programs?
source: wiki
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Topics
• Computational models for HW & SW• System modeling using SystemC• HW/SW partitioning• HW/SW interfacing• High-level synthesis– Transforming SW to HW implementation
• On-chip communication architectures• FPGA prototying
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Prerequisites
• Working knowledge of C/C++ programming• Solid background in digital logic design• Good understanding of computer
organization and architecture
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Textbooks
• No required textbooks.• References:
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Evaluation
• 6-8 assignments: 60% of final grade• 1 final project: 40% of final grade• Students enrolled in CIS 6930 need to satisfy
additional requirements.• Final grading scale
• Need verifiable proof to make up missing/late assignments
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Course Communication
• Course site on Canvas @ my.usf.edu–Download assignments & submit your solutions–Participate discussions–Checking grades
• www.cse.usf.edu/~zheng/teaching/soc– Lecture slides– reading assignments–Other related material
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Embedded Systems
• A computing device embedded in a larger system.
• Pervasive98% processors sold annually are used in embedded applications.
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Embedded Systems: Design Challenges
• Power/energy efficient: mobile & battery powered• Highly reliable: Extreme environment (e.g.
temperature) • Real-time operations: predictable performance • Highly complex– E.g. Mercedes Benz E-class– 55 electronic control units– 5 communication busses
• Tightly coupled Software & Hardware • Rapid development at low price
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Design Complexity Challenges
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Design Complexity Challenges
Answer to design complexity challenges:
Move to higher levels of abstraction
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Levels of Abstraction: Behavior
Different levels of abstraction represent different modeling details
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Levels of Abstraction: Behavior
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Levels of Abstraction: Structure
• Circuit: network of transistors• Logic: network of basic logic gates– AND/OR/NOT, latches/FFs, etc.
• Processor: network of logic components– i.e. ALU, MUX, decoders, registers, etc.– See Figure 1.5 in the Embedded book.
• System: network of processors, memories, buses, and other custom processing logic.• See Figure 1.8 in the Embedded book.
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SoC Design Flow: A Simplified View
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System Specification
HW/SW Partitioning
HW Model SW Program
Synthesis CompilationHW/SW Co-Verification
System Integration
HW Implementation Binary Image
Exploration/Estimation
CPU
Mem
HWImpl.
IFRead: section 2.6 – 2.7, Embedded book.
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A System Level HW Design Flow
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Models of Computation
• Formal abstract representations of a system– various degrees of • expressive power• complexity• Supported features
• Examples–HW: FSM, FSMD, super-state FSMD,– SW: data flow, control flow, control-data flow,
process network,
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System Specification: Language Requirements
• Formality: formal syntax and semantics• Executability: Validation through simulation• Synthesizability: – Implementation in HW and/or SW – Support for IP reuse
• Modularity –Hierarchical composition– Separation of concepts
• Simplicity
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System-Level Description Languages
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Synthesis
• Converting a behavioral description to a structural one.
• RTL synthesis is well know.– Cycle accurate model -> logic netlist
• High-level synthesis: from C to a structural model.– Still in early stage of adoption.
• System synthesis: system behavoiral model -> system structural model – under active research.
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System Behavioral Models
• Multiple communicating concurrent processes for HW & SW.
• Communication and synchronization.
Embedded book
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System Structural Models
Embedded book
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System Synthesis
• Processes -> CPUs or custom logic• Communication -> Buses or NoC• Flow
a) Profiling & Estimationb) Component & connection allocationc) Process and channel binding – HW/SW parti.d) Process schedulinge) IF component insertionf) Model refinement
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Hardware/Software Co-Design
• Definition: HW/SW co-design is the design of cooperating HW components and SW components in a single design effort.
• Alternative definition:HW/SW co-design means meeting system level objectives by exploiting the synergy of HW and SW through concurrent design.
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High-Level Synthesis
Embedded book
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Concurrency vs Parallelism
• Concurrency: independent operations are arranged such that they may be executed simultaneously. – Simultaneous executions may not be possible.
• Parallelism: HW platform can execute multiple operations simultaneously.–Parallelism is useless if SW does not display
concurrency.
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System Design Methodology
The Embedded Book, Chapter 2
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Terminologies
+AB
Cin
S
Cout
Specification Structural Model
Transistor level model Implementation
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Historical Overview
Embedded book
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Bottom-Up Methodology
Embedded book
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Top-Down Methodology
Embedded book
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Meet-in-the-Middle Methodology
Embedded book
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Platform Methodology
• Reuse of previous defined platforms–With well-defined structures and standard
components.• Add more components necessary for an
application.– These components are then synthesized.
• System implementation is generated by combining the layouts of existing and custom components.
• Advantages: faster development, lower cost,
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Reading Guide
• Embedded Book–Chapter 1, sec 1.1 – 1.5, skip 1.3.1 – 1.3.2–Chapter 2, skip 2.5
• CoDesign Book–Chapter 1