System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface...

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http://www.iaik.tugraz.at Institute for Applied Information Processing and Communications (IAIK) 1 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011 System on Chip 2011 Alarming System

Transcript of System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface...

Page 1: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

1 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

System on Chip 2011 Alarming System

Page 2: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

2 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Introduction Alarming System

Motion detection

Sound detection

Encrypted transmission of captured video

Display of video

Notification in case of an alarm

Page 3: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

3 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

System Overview

Page 4: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

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Institute for Applied Information Processing and Communications (IAIK)

4 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Equipment

Virtex®-6 FPGA ML605

Xilinx tools

Leon3

MicroBlaze

Various open-source IP cores

Page 5: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

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Institute for Applied Information Processing and Communications (IAIK)

5 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Groups

Group 1

Video Team

Audio Team

Linux Team 1

Network Team

Group 2

Graphic Team

Alarming Team

Linux Team 2

Crypto Team

Page 6: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

6 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

VIDEO - TEAM

Page 7: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

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Institute for Applied Information Processing and Communications (IAIK)

7 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Motion Detection

Object Image Filtered and scaled

Motion Diff. + Threshold Result

Page 8: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

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Institute for Applied Information Processing and Communications (IAIK)

8 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Video Team Data Flow

Page 9: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

9 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Video Processing Unit

Page 10: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

10 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Detection Board Overview

Page 11: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

11 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

AUDIO - TEAM

Page 12: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

12 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Task Sound detector

soundlevel reaches threshold → trigger an alarm signal

Page 13: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

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13 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

SoundDetector – Basic Components External hardware

Microphone, microphone preamplifier

Analog to digital converter Virtex 6 System Monitor 10-bit resolution, up to 200k samples/second

Sound detector

Digital audio samples Average filter Comparator to trigger an alarm

©conrad.at

Page 14: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

14 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Integration Sound detector connected to MicroBlaze

Communication via AXI4-lite bus

Alarm signal and average value stored in register

Software features

Reset sound detector Set new threshold

Send alarm signal and average value to the second board

Page 15: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

15 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

LINUX TEAM 1

Page 16: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

16 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Objectives

Get familiar with AMBER project ARM core from opencores Inspect inner workings

Synthesize AMBER

Get linux running on AMBER

Assist other teams in Linux issues

Page 17: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

17 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Obstacles

AMBER No RAM bridge Documentation No debugging facilities

Backup solution

Xilinx microblaze CPU

Page 18: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

18 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

USB

USB Not supported within Xilinx kernel Interfacing the USB chip Xilinx USB demo

Backup solution

USB IP Stream RAW video

Page 19: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

19 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

NETWORK - TEAM

Page 20: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

20 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Network Team

Page 21: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

21 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Network Team

(ug800_v6_emac.pdf)

LogiCORE IP Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC

Page 22: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

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Institute for Applied Information Processing and Communications (IAIK)

22 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Network Team

Tutorial custom IP-core integration & access

Support of Linux Team 1

USB support – EPC-core integration – Cypress

Template how to access registers from userspace

Integration of IP cores from other teams

Page 23: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

23 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

CRYPTO - TEAM

Page 24: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

24 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

AES CryptoCore

OpenCores AES in ECB mode 128-bit keysize

Specification

500 slices 32-bit port width Keyexpansion 83 clock cycles Encryption / decryption 11 clock cycles

Page 25: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

25 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

System View

Detection Board Encrypt Send via TCP/IP

Alarming Board Receive Decrypt

Page 26: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

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Institute for Applied Information Processing and Communications (IAIK)

26 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Integration

MicroBlaze Advanced eXtensible Interface (AXI) 4 Lite fmax, Simulation = 188,4 MHz Software integration MMIO using kernel driver

LEON 3

Advanced Peripheral Bus (APB) fmax, Leon = 174 MHz Software integration MMIO using kernel driver

Page 27: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

27 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

GRAPHICS - TEAM

Page 28: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

28 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Alarming Board Overview

Page 29: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

29 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Chrontel CH7301C DVI Transmitter Supporting graphics resolutions up to 1600x1200 pixels

Up to 165M pixel/second

Low jitter PLL for generation of the high frequency clock

Convert digital data input to a DVI output

Modes of operation: RGB Bypass DVI Output

Configuration over I2C

Page 30: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

30 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

SVGA IP Core Developed by Gaisler Aeroflex

Pixel based video controller

Supports custom resolution with variable bit depth and refresh rates

Uses external frame buffer in AHB address space

Digital graphic interface for communication with DVI transmitter

HSYNC, VSYNC signals for DVI control

Video driver for the core is provided for Snapgear Linux

Page 31: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

31 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

ALARMING - TEAM

Page 32: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

32 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

LCD

Hardware IP module

Integration in Leon3

Software control via driver

Userprogram for Linux

Menu

Page 33: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

33 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

GSM Phone call

SMS

GSM capable mobilephone

UART interface

AT command

Page 34: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

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34 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Sound and LEDs

External circuits

Buzzer controlled by IO pin

LEDs

controlled by IO pin

Page 35: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

35 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

LINUX TEAM 2

Page 36: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

36 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Leon3 32-bit SPARC V8 instruction set

7-stage pipeline (1.4 DMIPS/MHz)

MMU included

Hardware multiply and divide

FPU (single and double precision)

Amba 2.0 bus interface

Page 37: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

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Institute for Applied Information Processing and Communications (IAIK)

37 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Snapgear Linux

Kernel 2.6.21.1

MMU support

Leon glibc cross compiler

Interrupts and addresses not accessible from user space → kernel drivers

Page 38: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

38 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Software

Page 39: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

39 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Conclusion

Open does not mean easy

Debugging

Hardware support

Page 40: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

40 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Thanks for your attention!

Page 41: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

41 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Live Demonstration!

Page 42: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

42 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

References http://www.gaisler.com/products/grlib/grip.pdf http://www.gaisler.com/products/grlib/grlib.pdf http://www.chrontel.com/pdf/7301ds.pdf http://opencores.org http://www.xilinx.com/products/boards-and-kits/EK-V6-ML605-G.htm http://www.arm.com/products/system-ip/amba/amba-open-

specifications.php http://displaytech-us.com/pdf/FullSpecs/S162D-v20.pdf http://v4l2spec.bytesex.org/spec/

Page 43: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

43 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Page 44: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

44 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Page 45: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

45 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Page 46: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

46 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011

Page 47: System on Chip 2011 · Uses external frame buffer in AHB address space Digital graphic interface for communication with DVI transmitter HSYNC, VSYNC signals for DVI control Video

http://www.iaik.tugraz.at

Institute for Applied Information Processing and Communications (IAIK)

47 S SoC 2011 System on Chip 2011 – Final Presentation Graz, 2011