Course SyllabusECE 520/L - System on Chip Design and Lab

Department: Electrical and Computer EngineeringCourse Number: ECE 520Course Title: System on Chip Design Credit Units: 3.0Design Credits: 0.25

Office: JD 3337 Office phone: 677-2560 (prefer emails)Office hours: M, W 1:00 p.m. - 1:55 p.m.

5:00 p.m. - 5:25 p.m. or by appointment.

Email: glaw@csun.edu

Course Website: www.csun.edu/~glaw

Course DescriptionIntroduction to system on chip design methodology that includes the study of NIOS and ARM architectures, Avalon switch fabric, memory, real-time operating system (RTOS), peripheral interface and components, and contemporary high-density FPGAs.

Lab DescriptionThis laboratory course reinforces the system-on-chip design concept developed in the lecture course. It focuses on software development and hardware verification of Nios II systems using Altera software tools and Nios development boards.

Pre-requisites by TopicStudents must be familiar with microcontroller-based or microprocessor-based design, assembly language and C language programming, design with CPLD or FPGA, and VHDL or other hardware description language.

Grading System Same grade will be assigned to Lecture and Laboratory Homework 10% Lab Exercises 20% Midterm Exam 20% Project 25% Final Exam 25%

TextOnline lecture notes and laboratory instruction

Project Boards (Required)DE0-Nano Development and Education Board, available at http://www.terasic.com.tw/cgi-

bin/page/archive.pl?No=593 $59 academic discountLCD display with SPI and I2C interface Suggested website: http://www.nkcelectronics.com/16x2-Serial-LCD-Module-Blue-with-White-backlight_p_347.html $15.95

ReferencesSteve Furber, ARM Sytem-on-Chip Architecture. Addison Wesley, 2000.Wayne Wolf, Computers as components, Elsevier, 2005Quartus Handbooks, Altera Corp.Nios II Processor Reference Handbook, Altera Corp.Nios II Software Developer’s Handbook, Altera Corp.Avalon Interface Specification, Altera Corp. Cyclone II Reference Handbook, Altera Corp.Jean Labrosse, MicroC/OS-II, CMPBooks, 2002

SoftwareQuartus 12.0 and Nios II by Altera Corporation

Internet Resources:http://www.altera.com/ (for downloading Quartus 12.0, Nios II, and data sheets)

Learning Outcomes for the CourseAfter completing this course the students should be able to:1. Understand the architectures of Nios II soft-core processor2. Understand Nios II Avalon Switch Fabric and peripheral interface3. Understand Cyclone II architecture and its application in implementing Nios II processor

and onchip peripherals.4. Use SOPC Builder to construct a Nios II processor with the necessary peripherals.5. Write C program for an application

Topics Covered/Course Outline1. Design with discrete microcontroller versus design with Configurable Soft- Core

Processor.2. Design Tools Quartus/Qsys Nios II Design Tool

uCos-II (RTOS)3. Altera High Density PLD: Cyclone II4. Nios II architecture5. Avalon Switch Fabric6. Processor and Peripherals Interface7. SOC Design Examples

Relationship to Program OutcomesThis course supports the achievement of the following outcomes:a. An ability to apply knowledge of math, science, and engineering to the analysis of

electrical engineering problems.

c. An ability to design systems which include hardware and/or software components within realistic constraints such as cost, manufacturability, safety and environmental concerns.

e. An ability to identify, formulate, and solve electrical engineering problems.

i. A recognition of the need for and an ability to engage in life-long learning.

k. An ability to use modern engineering techniques for analysis and design.

m. An ability to analyze and design complex devices and/or systems containing hardware and/or software components.