S/W Power Supply Control Loop, Fuzzy Logic and FIR filterParts/Cost/Space reduction + Power/Efficiency increase

• PWM frequency = 250kHz with 8-bit DUTY_CYCLE control• ADC monitoring V_PWM is in FREE_RUN_MODE at 38.46kHz

• Allows 32X sampler for S/W 1200BAUD UART Rx and Tx drivers• 1 conversion out of 256 is set aside for BIT• Only 8-bits of 10-bit conversion result are used for computational SPEED

• Fuzzy Logic has 17 independent variables• Displacement Break Point• Velocity Break Point• 15 = 3 X 5 Table Entries

• PWM(N) = SUM (Ak * PWM(N-k)) + Fuzzy(fV,fD)– Where:

• SUM… is FIR filter of previous PWM settings, Ak are coefficients• Fuzzy(fV,fD) is 3X5 Matrix where fV and fD are “fuzzified” Velocity and

Displacement

– In order to compute FIR filter need:• 16-bit MAC• 16 byte circular buffer for PWM history and pointer

S/W Control Loop,…continued

– In order to compute velocity with our 8-bit displacement we need:• 4 byte circular buffer for displacement history and pointer• V(T) = D(T) – D(T-4)

• ADC INTERRUPT ROUTINE EXECUTES (in order of precedence)– Low Level UART Tx and Rx drivers– BIT state machine– Velocity

• Displacement storage and pointer update• Velocity calculation• “Fuzzification” for matrix_row

– Displacement• “Fuzzification” for matrix_column

– New PWM setting• Use FIR filter result from previous INT and FUZZY_LUT entry• Error checks• PWM history and pointer update

– PWM FIR recalculation– EXIT

.3Watt Startup at 12Volts,…mav8 filter

9Watt Startup from 12Volts,..mav8 filter

90Watt Startup from 12Volts,…mav8 filter

Mav16 filter,…PWM o/p dithering