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SUPPLEMENTARY INFORMATION DOI: 10.1038/NNANO.2010.3 NATURE NANOTECHNOLOGY | www.nature.com/naturenanotechnology 1 Fabrication of ultra-sharp Si-DLC tips Herein, we elaborate on the process flow described in the main text. Si-DLC is a promising material for wear resistance, and the properties of elementally modified DLC, especially Si-DLC, are of interest because of the low sliding friction in these materials 1-4 . The Si-DLC tips are formed on silicon cantilevers using the molding technique. The first step involves the patterning of a circular feature on the device layer of a (100) silicon-on- insulator wafer. The use of a circular feature as opposed to a square feature is very important, as it eliminates problems that could arise because of small inaccuracies in the alignment of the sides of the square with respect to the crystalline planes of the wafer. A pit is etched in potassium hydroxide (KOH) along the {111} plane, and the etch stops on the buried oxide layer of the SOI wafer. This is followed by a CHF 3 dry etch process that selectively and anisotropically etches the oxide. Next is a second etch in KOH; this etch is self-limiting and forms a pyramid with faces along the {111} planes of silicon. A 200- nm-thick thermal oxide is grown on the wafer. The thermal oxide growth primarily helps in sharpening the mold. It also provides a convenient etch stop for the subsequent Si- DLC etching. Si-DLC is then deposited on the wafer. The Si-DLC is patterned such that this layer is etched away from all areas of the cantilever except near the tip. This is done to ensure that the intrinsic film stress of the Si- DLC does not result in excessive deformation of the cantilever. The etching of the Si- DLC is followed by the etching of the underlying thermally grown oxide in CHF 3 plasma. The cantilever is then defined using SF 6 and released in vapor HF. This process

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  • SUPPLEMENTARY INFORMATIONdoi: 10.1038/nnano.2010.3

    nature nanotechnology | www.nature.com/naturenanotechnology 1

    SI-i

    SUPPLEMENTARY INFORMATION

    Fabrication of ultra-sharp Si-DLC tips

    Herein, we elaborate on the process flow described in the main text. Si-DLC is a

    promising material for wear resistance, and the properties of elementally modified DLC,

    especially Si-DLC, are of interest because of the low sliding friction in these materials1-4

    .

    The Si-DLC tips are formed on silicon cantilevers using the molding technique. The first

    step involves the patterning of a circular feature on the device layer of a (100) silicon-on-

    insulator wafer. The use of a circular feature as opposed to a square feature is very

    important, as it eliminates problems that could arise because of small inaccuracies in the

    alignment of the sides of the square with respect to the crystalline planes of the wafer. A

    pit is etched in potassium hydroxide (KOH) along the {111} plane, and the etch stops on

    the buried oxide layer of the SOI wafer. This is followed by a CHF3 dry etch process that

    selectively and anisotropically etches the oxide. Next is a second etch in KOH; this etch

    is self-limiting and forms a pyramid with faces along the {111} planes of silicon. A 200-

    nm-thick thermal oxide is grown on the wafer. The thermal oxide growth primarily helps

    in sharpening the mold. It also provides a convenient etch stop for the subsequent Si-

    DLC etching. Si-DLC is then deposited on the wafer.

    The Si-DLC is patterned such that this layer is etched away from all areas of the

    cantilever except near the tip. This is done to ensure that the intrinsic film stress of the Si-

    DLC does not result in excessive deformation of the cantilever. The etching of the Si-

    DLC is followed by the etching of the underlying thermally grown oxide in CHF3

    plasma. The cantilever is then defined using SF6 and released in vapor HF. This process

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    provides a method to integrate Si-DLC into standard silicon-based semiconductor

    processing.

    The deposition of the silicon-containing diamond-like-carbon (Si-DLC) into the

    etched pits in the patterned silicon wafer was performed using the plasma immersion ion

    implantation and deposition (PIIID) process5,6,7. In the PIIID process, the part to be

    treated is immersed into a plasma in a vacuum chamber and pulse-biased to a negative

    potential using a tetrode modulator. This negative voltage bias can range in magnitude

    from a few volts to about 50 kV (or higher depending on the technological limits of the

    pulser). The plasma is created using the glow discharge method. When the part is pulse-

    biased negatively, the electrons in the plasma are repelled away from it, leaving behind a

    conformal ion-rich sheath around the parts surface. The positive ions are accelerated

    across this sheath at high velocities, normal towards the surface of the part. At high

    energies, the ions get implanted into the part surface, whereas at lower energies (up to -5

    kV) and in the presence of a condensable plasma species a film can be made to form on

    the part surface. The non-line-of-sight nature of the PIIID process enables a uniform ion

    implantation or film depostion on three-dimensional parts without the necessity of part

    manipulation in the vacuum chamber during treatment. The technique allows the

    simultaneous treatment of a large number of parts in a bell-jar type environment rather

    than in an accelerator-type environment. Thus far, most basic and industrial research on

    this process has been performed with the aim of modifying the near-surface composition,

    structure, and properties of materials. To our knowledge, the present study is among the

    first to successfully produce monolitic three-dimensional parts using this technology.

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    The deposition of Si-DLC onto the patterned wafers was performed using a

    hexamethyl disiloxane precursor gas. This precursor gas, by virtue of its composition,

    results in the deposition of C-Si-O compound. However, the term Si-DLC is used in this

    Letter, consistent with terminology used in previous studies on the synthesis of similar

    materials8-11

    . The process chamber was first evacuated to a base pressure of about 410-6

    Torr, and hexamethyl disloxane gas was introduced to a chamber base pressure of about

    12 mTorr. A plasma of this gas was created using the glow discharge method, and the

    deposition was carried out at 2 kV for 240 minutes. An appreciable 31% of this material

    consists of oxygen because the films are synthesized using hexamethyl-disiloxane12

    .

    0

    80

    0 0.2 0.4 0.6 0.8 1 1.2

    SF6/O2 Ratio

    ('1' indicates only SF6; '0' indicates only O2)

    Etc

    h R

    ate

    (n

    m/m

    in)

    Supplementary Figure 1 Etch rates of Si-DLC in SF6 plasma. From left to right, the etch uniformity

    increases as evidenced by the shorter error bars. High uniformity of etch is achieved using SF6 without

    oxygen.

    In order to demonstrate the feasibility of integrating Si-DLC into standard

    microprocessing, it is important to demonstrate etching this material at reasonable etch

    rates. A process to etch the silicon-doped DLC using SF6 at rates of 70 nm/min was

    developed. In Supplementary Figure 1, we show how the etch rate of DLC remains

    relatively unchanged with oxygen flow rates, but is highly sensitive to SF6 flow rates. We

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    achieve a nominal etch rate of 70 nm/min at a mixture of 15 SF6:25 O2. However, the

    etch uniformity is better for higher concentrations of SF6. We note that carbon-based

    materials without elemental modifications are much more sensitive to oxygen plasma,

    which does not seem to be the case here.

    (i) (ii) (iii)

    (iv) (v) (vi)

    (viii)(vii) (ix)

    Device Layer

    Wafer Handle

    Buried oxide

    Supplementary Figure 2 Process steps for fabricating molded Si-DLC tips on silicon cantilevers using

    a Silicon on Insulator (SOI) wafer. We perform the following steps: - (i) Thermally oxidize SOI wafer.

    (ii) Etch anchor in KOH. (iii) Define a circular opening and etch device layer in KOH, buried oxide in

    CHF3 and handle wafer in KOH. (iv) Thermally oxidize to sharpen mold. (v) Deposit Si-DLC using a PIIID

    process. (vi) Etch Si-DLC in SF6, and SiO2 in CHF3, (vii) Define and etch cantilever into the device layer.

    (viii) Etch handle of wafer using front-to-back alignment lithography in SF6 using deep reactive ion

    etching. (ix) Release cantilever and tip in vapor-phase HF.

    For etching the DLC used in our study, we use 25 sccm of SF6 at an RF power of

    80 W using a carbon base plate. The use of SF6 is advantageous, because it not only is a

    commonly used gas for plasma etching of silicon, but is also highly selective and stops on

    the oxide formed earlier by the thermal oxide growth. Moreover, the presence of SiOx

    would hamper the etch rates of SF6-based plasma e.g. SiO2 is commonly used as an etch

    stop. The etch rates we achieve provide some evidence that there are no oxides of silicon

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    present at the surface of Si-DLC, because SF6-based plasma does not etch oxides of

    silicon very well. The process flow that we use to fabricate these tips is shown in

    Supplementary Figure 2.

    Tip Wear Scan Protocol (typical)

    In order to study the wear of the Si-DLC tips while isolating the mechanisms of

    substrate wear we chose a specific scanning protocol. In our scanning protocol, we

    operate the scanner in open loop, which results in small drifts over time. This is intended,

    since this allows for some change in the area that is scanned. In addition, we do not scan

    over the same area over and over again. Instead, we move the scanned region, stepping

    by 20 nm in one direction for every scan. The other direction is a 2 micron line scan.

    Once the scan in the stepping direction reaches a total of 100 microns, we step in the

    perpendicular direction, and repeat this again, and this continues until we reach a total of

    2500 mm. Thus each area is scanned at most 25 times. Also, given the nature of SiO2 in

    humid conditions, there almost certainly is wear of the underlying layer. This is one

    reason that we use 500 nm of thick oxide this ensures that the DLC tips are always on

    SiO2 as opposed to sliding intermittently on a freshly worn silicon surface.

    This kind of scanning is quite similar to what is to be expected in nanometrology

    or nanolithography applications, where it is unlikely that the same region would be

    scanned several times. In addition, we also do not scan over the same region repeatedly.

    The images we collect during the experiment (we collect images after every 8mm of

    scanning) corroborate our assumption that the surface is largely flat. Short videos of the

    surfaces while scanning are appended which show very little substrate wear.

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    Additional Tip Data

    In this section we present the data for three additional tips (Tips D, E and F in

    Supplementary Figure 3). We note that the fits for Tip D are excellent even though the

    adhesion method appears to be unreliable on account of what we believe to be either

    contamination or debris during the latter parts of the wear experiment. However, later in

    the experiment the adhesion recovers briefly to a level that fits with the model again,

    presumably because the experiments has moved into a contamination/debris free region.

    For Tip E, we note again that the adhesion method fails, as with Tip B. But the fit for the

    first 300mm of wear correlates extremely well to the final observed diameter. For Tip S,

    we modeled the tip geometry with a little more detail. The tip geometry plays a very

    important role in how well the model predicts the experimental data. By taking care to

    model this geometry very accurately, we note that the tip wear is tracked very accurately

    by the model. The tip shape that was used for the model is shown in the Supplementary

    Figure 3g. We also note that this apparently unusual geometry can result from the mold

    sharpening process. These data points illustrate the necessity for accurate information

    about the tip geometry, as this would help in increasing the accuracy of the atom-by-atom

    attrition-based model fits. While the reasons why the adhesion method appears to yield

    smooth curves for all tips, while still failing to explain the continued wear is unknown,

    we note that fitting the initial part of the curve yields consistent results for two such tips.

    Further work in this area is necessary in order to understand the reasons for this, as well

    as improved methods to monitor tip diameter non-destructively during the wearing

    process.

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    The sources of error due to the uncertainty in the tip geometry arise primarily

    because of our imaging uncertainty. The Si-DLC, being non-conducting, presents

    extreme challenges in accurately imaging these tips in a scanning electron microscope.

    The imaging must also be done extremely quickly; otherwise, the tip can get

    contaminated (due to electron beam induced carbon deposition). Thus this is another

    major roadblock that makes it prohibitively time-consuming to collect wear data on many

    tips. The summary of experimental data for these tips is given in Supplementary Table 1

    (similar to that in the main text). Note that wear volumes are normalized to volume per

    meter of sliding.

    SupplementaryTable 1 Summary of experimental and model fit parameters for Si-DLC tips

    DLC

    Tip

    Starting

    Radiusi

    (nm)

    End

    Radiusii

    (nm)

    Sliding

    Velocity

    (m/s)

    Applied

    Load

    (nN)

    Wear

    Volume

    (nm3/m)

    Enet

    (eV)

    Veff

    (10-

    28m

    3)

    Sources

    of

    erroriii

    D 19.5 20.3 20 11.3 12.5x103 1.00.4/.05 5.02 a, b, d

    E 7 12 10 3 2.8x103 1.150.15 5.52 a

    F 14 15 20 3 1.5x103 10.1 3.42 d

    i This is the radius of the spherical truncation of the unworn tip.

    ii This is the radius of the flat end of the worn tip.

    iii. a = uadh; b = contamination; c = k; d = Tip Geometry

    Supplementary Table 2 Summary of initial Contact Pressure for the six tips calculated using DMT13

    contact mechanics (GPa)

    Tip Tip A Tip B Tip C Tip D Tip E Tip F

    Contact

    Pressure 12 8 6.8 5.9 10 8.1

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    0.0 0.5 1.0 1.5 2.00

    10

    20

    30

    40

    50

    60 adhesion data atom-by-atom wear model fit

    tip

    ra

    diu

    s (

    nm

    )

    sliding distance (m)

    0

    20

    40

    60

    80

    100

    120 pu

    ll-off fo

    rce

    (nN

    )

    0.0 0.5 1.0 1.5 2.00

    5

    10

    15

    20

    25 adhesion data

    Atom-by-atom wear model fits: overall fit beginning only extrapolated

    tip

    ra

    diu

    s (

    nm

    )

    sliding distance (m)

    0

    10

    20

    30

    40

    50 pu

    ll-off fo

    rce

    (nN

    )

    100 nm

    100 nm

    c

    d

    a

    b

    Tip E

    Tip D

    100 nm

    0.0 0.2 0.4 0.6 0.8 1.00

    5

    10

    15

    20

    adhesion data atom-by-atom wear model fit

    tip

    ra

    diu

    s (

    nm

    )

    sliding distance (m)

    0

    10

    20

    30

    40 pu

    ll-off fo

    rce

    (nN

    )

    e

    f

    g

    Tip F

    Modeled Geometry for Tip F

    Supplementary Figure 3 Additional Wear Data for Si-DLC Tips Figures a, c and e show the images of

    the worn tips D, E and F respectively with the outline of these tips before wear. Figures b, d and f show the

    corresponding experimental data, along with the fits of the atom-by-atom attrition model. For Tip E, we

    note that it is absurd to assume that the tip becomes sharper after a certain amount of wear, as is indicated

    by the drop in adhesion around 0.3m of sliding. Thus, fitting the whole experiment results in an unrealistic

    prediction of the value of final tip radius; such a prediction does not correspond to the observed value.

    However, fitting only the initial portion of the curve before the adhesion values decrease yields a very

    accurate prediction of the final observed tip diameter. Figure g shows the modeled geometry for the Tip F,

    and it is seen that precise knowledge of this geometry increases the models accuracy in tracking

    experimental data.

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    Fitting parameters

    In equation (1), b is the effective lattice parameter. We use a value of fa = 5 1012

    Hz and a lattice parameter b of 0.4 nm, which is a value commonly used for glassy

    materials, and is consistent with that used in Ref 10 of the main paper.

    Wear of Si Tip on Si-DLC surface

    While tribologically, a comparable system would be a silicon tip sliding on a

    smooth Si-DLC surface, this system has few conceivable applications as Si-DLC films

    are rarely used for most nanomanufacturing applications. However, one such data set is

    presented in Supplementary Figure 4, where the high rate of wear makes it difficult to

    carry out the experiment for a long sliding distance.

    0.0 0.1 0.2 0.3 0.40

    20

    40

    60

    80

    100

    120

    pu

    ll-o

    ff f

    orc

    e (

    nN

    )

    sliding distance (m)

    Supplementary Figure 4 Adhesion change for a silicon tip sliding on Si-DLC. The experiment was

    stopped after 400mm of sliding because of the high adhesion force. Assuming uadh of 2.2 as before (very

    similar material system), one can estimate the diameter of this tip after 400mm of sliding to be 40 nm

    (starting radius of < 5nm), indicating large wear even for short sliding distances.

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    Wear of silicon tips sliding on SiO2

    The wear of silicon tips sliding on SiO2 is also investigated for comparison to the

    Si-DLC tips, as this is a more realistic comparison. We use commercially available

    contact-mode silicon cantilevers for this purpose. The spring constants were determined

    in a similar manner as that of the Si-DLC tips; this method is described in the methods

    section of the main manuscript. For tips sliding on SiO2 for 2 m at two different loads

    (comparable to the loading forces for Tips A and B for the Si-DLC tips), the wear rates

    are significantly higher. Images of two worn tips with the outlines of the tip prior to wear

    are shown in Supplementary Figure 5. The strikingly higher wear in such tips in

    comparison to that of the Si-DLC tips is evident. The extremely high wear rate of silicon

    tips is due to the spontaneous and recurring oxidation of the silicon surface, which in the

    presence of humidity undergoes tribochemical wear. The experiments were carried out in

    ambient conditions, and temperatures measured were 295 5K ,with a relative humidity

    of 305%.

    200 nm 200 nm

    Si Tip BSi Tip A

    a b

    Supplementary Figure 5 Scanning electron micrographs of single-crystal silicon tips after wear. The

    white lines show the outline of the tip prior to the wear experiments. Both tips were worn by sliding on

    SiO2 in ambient conditions. (a) Si Tip A sliding at an applied force of 24.5 nN. The wear volume is ~1.23

    108 nm3/m/nN and (b) Tip B sliding at an applied for of 5 nN; wear volume is ~1 10

    8 nm3/m/nN.

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