Supertex inc. - Microchip Technologyww1.microchip.com/downloads/en/DeviceDoc/HV7350DB1... · 2015....

Supertex inc.

Supertex inc. www.supertex.com

HV7350DB1

Doc.# DSDB-HV7350DB1A070214

General DescriptionThe HV7350 is a monolithic eight channel, high-speed, high voltage, ultrasound transmitter RTZ pulser. This integrated, high performance circuit is in a single, 8x8x0.9 mm, 56-lead QFN package.

The HV7350 can deliver a guaranteed ±1.0A source and sink current to a capacitive transducer with +/-60V peak to peak voltage. It is designed for portable medical ultrasound imaging and ultrasound NDT applications. It can also be used as a high voltage driver for other piezoelectric or capacitive MEMS transducers, or for test systems as a signal source or pulse signal generators. The HV7350’s circuitry consists of controller logic circuits, level translators, gate driving buffers and a high current and high voltage MOSFET output stage. The output stages of each channel are designed to provide peak output currents typically over ±1.0A for pulsing, with up to ±60V swings in RTZ mode. The upper limit frequency of the pulser waveform is depending on the load capacitance.

This demoboard datasheet describes how to use the HV7350DB1 to generate the basic high voltage pulse waveform as an ultrasound transmitting pulser. The HV7350 circuit uses DC coupling from a 3.3V logic input to output Tx1~8 internally, therefore the chip needs three sets of voltage supply rails: VLL +3.3V, VDD +5.0V and VPP/VNN ±10 to ±60V. The VPP and VNN rail voltages can be changed rather quickly, compared to the capacitor gate-coupled driving pulsers. This direct coupling topology of the gate drivers not only saves two high voltage capacitors per channel, but also makes the PCB layout easier.

The HV7350DB1 output waveforms can be displayed using an oscilloscope by connecting the scope probe directly to the test points TX1~8 and GND. The soldering jumper can select whether or not to connect the on-board dummy-load, a 330pF capacitor paralleling with a 2.5kΩ resistor. The test points can be used to connect the user’s transducer to easily evaluate the pulser.

Block Diagram

Eight Channel ±60V, ±1.0A, Ultrasound Pulser Demoboard

CPFVDD

+3.3V

RGND

HVOUT1

VPP

+10 to +60V

-10 to -60V

P-Driver

N-Driver

1 of 8 Channels

VLL

Logic&

LevelTranslator

-5V

RGND

RGND

DMP

1.0µF

VPF

VNF

Rb

LRP

+5.0V

CPOS

GND

GNDSUB

+4.0V

VREFREN

OEN

PIN1

NIN1

PIN8

NIN8

CLK

DAP

LRP

GND

LRN

GND

VNF

VPF

LRN

GND

GND CNEG CNF VNN

+5.0V

-5.0V

1.0µF

1.0µF

0.1µF 1.0µF 1.0µF

TX1

+3.3V

1.0µF 1.0µF

RGND

TX1WaveformGenerator

CPLD

OSC

JTAG

EXCLK

EN

CLKIN

WAVEFREQPHASOENREN

RTZPHASPWROENREN

40MHz

6

+3.3V

C4330pF

R2

R32.5k

DummyLoad

2

HV7350DB1



The PCB Layout TechniquesThe large thermal pad at the bottom of the HV7350 package is internally connected to the IC’s substrate (VSUB). This thermal pad should be connected to 0V or GND externally on the PCB. Designers need to pay attention to the connecting traces on the outputs TX1~8, specifically the high voltage and high speed traces. In particular, controlled impedance to the ground plane and more trace spacing needs to be applied in this situation.

High speed PCB trace design practices that are compatible with about 50 to 100MHz operating speeds are used for the demoboard PCB layout. The internal circuitry of the HV7350 can operate at quite a high frequency, with the primary speed limitation being load capacitance. Because of this high speed and the high transient currents that result when driving ca-pacitive loads, the supply voltage bypass capacitors and the driver to the FET’s gate-coupling capacitors should be as close to the pins as possible. The GND pin should have low inductance feed-through via connections that are connected directly to a solid ground plane. The VDD, VPP, VNN, CPF, CNF, CNEG and CPOS voltage supply and/or bypass capaci-tor pins can draw fast transient currents of up to ±2.0A, so they should be provided with a low impedance bypass capaci-tor at the chip’s pins. A ceramic capacitor of 1.0 to 2.0µF may be used. Only the VPP and VNN pins to GND capacitors need to be the high-voltage type. The CPF to VPP and CNF to VNN capacitors maybe low voltage. Minimize the trace length to the ground plane, and insert a ferrite bead in the power supply lead to the capacitor to prevent resonance in the power sup-ply lines. For applications that are sensitive to jitter and noise and using multiple HV7350 ICs, insert another ferrite bead between each chip’s supply lines.

Pay particular attention to minimizing trace lengths and us-ing sufficient trace width to reduce inductance. Surface mount components are highly recommended. Since the output im-pedance of the HV7350’s high voltage power stages is very low, in some cases it may be desirable to add a small value resistor in series with the output TX1~8 to obtain better wave-form integrity at the load terminals after long cables. This will, of course, reduce the output voltage slew rate at the terminals of a capacitive load.

Be aware of the parasitic coupling from the outputs to the in-put signal terminals of the HV7350. This feedback may cause oscillations or spurious waveform shapes on the edges of the signal transitions. Since the input operates with signals down to 3.3V, even small coupling voltages may cause problems. Use of a solid ground plane and good power and signal layout practices will prevent this problem. Also ensure that the cir-culating ground return current from a capacitive load cannot react with common inductance to create noise voltages in the input logic circuitry.

Testing the Integrated PulserThe HV7350 pulser demoboard should be powered up with multiple lab DC power supplies with current limiting functions.

The on-board dummy load 330pF//2.5kΩ should be connect-ed to the high voltage pulser output through the solder jumper when using an oscilloscope’s high impedance probe to meet the typical loading condition. To evaluate different loading conditions, one may change the values of RC within the cur-rent and power limit of the device. In order to drive the user’s piezo transducers with a cable, one should match the output load impendence properly to avoid cable and transducer reflections. A 70 to 75Ω coaxial cable is recommended. The coaxial cable end should be soldered to the TX1~8 and GND directly with very short leads. If a user’s load is being used, the on-board dummy load should be dis-connected by cutting the small shorting copper trace in be-tween the 0Ω resistors R2, R9, R12, R18, R23, R53, R54 or R55 pads. They are shorted by factory default.

All the on-board test points are designed to work with the high impedance probe of the oscilloscope. Some probes may have limited input voltage. When using the probe on these high voltage test-points, make sure that VPP/VNN voltages do not exceed the probe limit. Using the high impendence oscil-loscope probe for the on-board test points, it is important to have short ground leads to the circuit board ground plane.

If both of the inputs PIN and NIN are high, then the channel out TX will be in Hi-Z.

3

HV7350DB1



HV7350DB1 Schematic

RE

N

OE

N

PAD

VD

D

VN

N

VC

C =

+3.

3VV

DD

= +

4.0

to 5

.2V

VP

P /

VN

N =

+/-5

.0 to

70V

Note:

J4-

4, 5

, 6 &

7- p

ins

for t

est o

nly

TP10

CLK

SYN

C

EXTR

G

U2

XC95

72XL

_VQ

44

REN

OEN

PIN

1

NIN

1

PIN

2

NIN

2

PIN

3

NIN

3

PIN

4

NIN

4

PIN

5

NIN

5

PIN

6

NIN

6

PIN

7

NIN

7

PIN

8

NIN

8

TX1

TX2

TX3

TX4

TX5

TX6

TX7

TX8

RG

ND

RG

ND

RG

ND

RG

ND

RG

ND

RG

ND

VLL

VLL

VDD

VDD

CPFCPF

VPPVPPVPPVPPVPPVPP

17

54

19

52

4823

202122495051

MH

3M

H2

MH

1M

H4

D7 R

ED

D4 Y

LW

D6 G

RN

R4

1.0k

D3 R

ED

D5 Y

LW

R5

1.0k

R6

1.0k

R7

1.0k

R8

1.0k

TP12

TP9

TP6

J2EX

CLKE

X=0

EN

1

GN

D2

OU

T

VC

C4

40M

Hz

X1

TP13

13

12

J1

C18

0.22

2

3

R14

1.0k

43 40 39

R15

50

VC

C

TP30

EXTR

GTP18

R16 1k

R20 1k

C31

0.22

SW2

41725

23567

109

2411

R25

33k

C32

0.22

C33

0.22

C34

0.22

C35

0.22

SW1

SW3

SW4

SW5

R26

33k

R27

33k

R28

33k

R29

33k

R40

200

R41

200

R42

200

R43

200

R44

200

VC

C

C30

0.22

GNDGNDGNDWAVFRESELENAMOD

TMSTDITDOTCK

SET

LE

MC

CS

EN

VCC

VCC

VCC

32

31

30

29

28

35

26

15

C1

022

C2

022

C3

022

VC

C

U3

HV7

350

C25 022

C19 022

TP2

C12 1µF

C13 1µF

TP8

PIN

1

NIN

1

PIN

2

NIN

2

PIN

3

NIN

3

PIN

4

NIN

4

PIN

5

NIN

5

PIN

6

NIN

6

PIN

7

NIN

7

PIN

8

NIN

8

VCC

J3 J

TAG

123456

C22

0.22

RTZ

REN

PHAS

PWR

OEN

VC

CV

PP

C6

1µC

91µ

C8

1µC

51µ

TP35

TP6

8 7 55 56 1 2 3 4 5 6 9 10 11 12 13 14 15 16

38 37 34 33 22 21 20 19 18 16 14 13 12 8 42 41

TP50 TP

51

TP49

TP48TP

47

TP46TP

45

TP44TP

29

TP28TP

27

TP25TP

22

TP19TP

20

TP16

43 41 39 37 34 32 30.

28 31 29 33 38 40 42

TX2

TX4

TX6

TX8

TX1

TX3

TX5

TX7

PADGNDGND

CPOS

CNEG

CNFCNF

VNNVNNVNNVNNVNNVNN

72185336

35

4724

252627444546

TP43

R52

2.55

k1W

C40

330P

250V

TP41

R55

0

R51

2.55

k1W

C39

330P

250V

TP39

R54

0TP

40

32 1

TP0

32 1

BA

V99

/SO

T_1

D31

BA

V99

/SO

T_1

D30

R56

2.55

k1W

C38

330P

250V

TP26

R53

0

R10

2.55

k1W

C14

330P

250V

TP7

R9

0TP

21

32 1

TP42

32 1

BA

V99

/SO

T_1

D29

BA

V99

/SO

T_1

D28

R24

2.55

k1W

C29

330P

250V

TP0

R23

0

R19

2.55

k1W

C21

330P

250V

TP31

R18

0TP

32

32 1

TP23

32 1

BA

V99

/SO

T_1

D27

BA

V99

/SO

T_1

D26

R13

2.55

k1W

C20

330P

250V

TP14

R12

0

R3

2.55

k1W

C4

330P

250V

TP4

R2

0TP

11

32 1

TP1

32 1

BA

V99

/SO

T_1

D25

BA

V99

/SO

T_1

D24

C36

1µF

TP36

C37

1µF

TP17 C

281µ

F10

0v

C27

1µF

100v

TP33

C24 1µF

C23 1µF

6

14

1

12

2

3

VP

PV

DD

VN

NV

CC

D20ABAT54DW-7

D20BBAT54DW-7

D17B1100-13

D16B1100-13

SYN

C

CN

EG

CP

OS

12345678910

CN

FC

PF

VP

PV

NN

VD

DV

DD

J4 H

EAD

ER 1

0

R31

1R

301

R38

INF

R37

INF

R57

INF

R32

10R

3510

4

HV7350DB1



HV7350DB1 PCB and Board Layout

Actual Board Size: 72.4mm x 68.4mm

Power Connector Description1 +VCC +3.3V Logic voltage input for VLL and CPLD. (100mA)2 GND 0V, Ground3 +VDD +5.0V HV7350 positive VDD supply. (25mA)4 CNEG -5.0V HV7350 negative VNEG supply, only when REN=05 CPOS +5.0V HV7350 Positive VPOS supply, only when REN=06 CNF HV7350 VNF supply reference to VNN, ( VNF - VNN) = +5.0V, only when REN=07 CPF HV7350 VPF supply reference to VPP, ( VPP - VPF) = +5.0V, only when REN=08 -VNN -10 to -60V negative high voltage supply. (-5.0mA)9 GND 0V, Ground10 +VPP +10 to +60V positive high voltage supply. (+5.0mA)

Note: J4-4 to 7 are for external power connection of VNEG, VPOS, VNF, VPF, when REN = 0. Note, as default the resistors R34, R37, R38 and R57 is not installed. Do not need to connect these four pins to any power supply when internal regulators are be used when REN=1.

Voltage Supply Power-Up and Operation Sequence1 +VCC Power on +3.3V positive logic supply voltage for HV7350’s VLL and CPLD VCC

2 +VDD Power on +5.0V VDD positive supply3 OEN & REN Turn both OEN & REN LED off4 +VPP / -VNN Power on VPP/VNN = ±10 to 60V positive and negative high voltage supply5 OEN & REN Turn on OEN & REN LED on 6 WAVE Button Push WAVE button to select waveforms

Note: Power-down in the 6,5… to 1 reversing order.

Push Button OperationsWAV Toggle select pulse B-mode waveforms: None, 1-cycle, 1-cycle inverting, 3-cycle & 3-cycle inverting

FREQ Toggle select B-mode demo frequency of 10, 5, 2.5, 1.25 & 0.625MHz when X1 oscillator is 40MHzPHAS Toggle select B-mode waveform phase polarityOEN Toggle on or off HV7350 chip output signal OENREN Toggle select on or off HV7350 internal voltage-regulators signal REN

5

HV7350DB1



Figure 1. VPP/VNN = +/-60V 5MHz with 330pF//2.5kΩ load and 8-Channel pulsing

LED IndicatorRTZ RTZ indication, default is on

PHAS Phase polarity indicationPWR HV7350DB1 VLL 3.3V and CPLD chip VCC power supply indicationOEN HV7350 chip enable EN signal indication, power on default is off until OEN button is pushedREN HV7350 built-in regulators enable indication, power on default is off until REN button is pushed

Typical Waveforms


6

HV7350DB1



Typical Waveforms (cont.)


Figure. 4. Rise and Fall time at VPP/VNN = +/-60V with 330pF//2.5kΩ load

7

HV7350DB1





Figure 6. Damping fall time at VPP/VNN = +/-60V with 330pF//2.5kΩ load

8

HV7350DB1




Figure 7. Damping rise time at VPP/VNN = +/-60V with 330pF//2.5kΩ load

Figure 8. VPP/VNN = +/-60V 5MHz with 330pF//2.5kΩ load 4 of the 8-Channel waveforms shown

9

HV7350DB1




Figure 9. HD2 at VPP/VNN = +/-50V 2.5MHz with 330pF//2.5kΩ load

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receivesan adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liabilityto the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry andspecifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)

©2014 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Supertex inc.1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: 408-222-8888www.supertex.com10

HV7350DB1


Bill of MaterialsComponent Description Manufacturer Part Number

C1 - C3, C18, C19, C22, C25, C30 - C35 CAP CER .22µF 16V X7R 10% 0603 TDK C1608X7R1C224K

C4, C14, C20, C21, C29, C38 - C40 CAP CERC 330PF 200V X7R 0603 Panasonic ECJ-1VB2D331K

C5, C8, C12, C13, C23, C24, C36, C37 CAP CER 1.0µF 16V X7R 0603 TDK C1608X7R1C105M

C6, C9, C27, C28 CAP CER 1µF 100V X7R 20% 1210 TDK C3225X7R2A105MD3, D7 LED THIN 635NM RED DIFF 0805 SMD Lumex SML-LXT0805IW-TRD4, D5 LED THIN 585NM YEL DIFF 0805 SMD Lumex SML-LXT0805YW-TR

D6 LED THIN 565NM GRN DIFF 0805 SMD Lumex SML-LXT0805GW-TRD16, D17 DIODE SCHOTTKY 100V 1A SMA Diodes Inc. B1100-13

D20 DIODE SCHOTTKY DUAL 30V SOT-363 Diodes Inc. BAT54DW-7D24 - D31 DIODE SWITCH SS DUAL 70V SOT323 Fairchild BAV99WT1G

J1 CONN HEADER 2POS .100 VERT GOLD Molex 22-28-4023J2 CONN JACK END LAUNCH PCB GOLD SMA Johnson 142-0711-821J3 CONN HEADER 6POS .100 VERT GOLD Molex 22-28-4063J4 CONN HEADER 10POS .100 VERT GOLD Tyco 1-640454-0

R2, R9, R12, R18, R23, R53 - R55 Solder Gap (SHORT) NA NA

R3, R10, R13, R19, R24, R51, R52, R56 RES 2.55kΩ 1W 1% 2512 SMD Panasonic ERJ-1TNF2551U

R4 - R8, R14, R16, R20 RES 1.00kΩ 1/16W 1% 0603 SMD Panasonic ERJ-3EKF1001V

R15 RES 49.9Ω 1/16W 1% 0603 SMD Panasonic ERJ-3EKF49R9VR25, R26, R27, R28,

R29 RES 33.2kΩ 1/16W 1% 0603 SMD Panasonic ERJ-3EKF3322V

R30, R31 RES 1.00Ω 1/10W 1% 0603 SMD Rohm MCR03EZPFL1R00R32, R35 RES 10.0Ω 1/10W 1% 0603 SMD Panasonic ERJ-3EKF10R0V

R34, R37, R38, R57 NA NA NAR40, R41, R42, R43,

R44 RES 200 OHM 1/16W 1% 0603 SMD Panasonic ERJ-3EKF2000V

SW1, SW2, SW3, SW4, SW5 SWITCH LT 4.7MMX3.5MM 100GF SMD Panasonic EVQ-P2002M

TP3, TP15 TEST POINT PC MULTI PURPOSE BLK Keystone 5011U2 IC CPLD 72 MCELL C-TEMP 44-VQFP Xilinx XC9572XL-5VQ44CU3 IC HV7350K6-G 8-ch RTZ Supertex Inc. HV7350K6-G

X1 OSC CLOCK 40.000 MHZ 3.3V SMD CTS CB3LV-3C-40.0000-T

Supertex inc. - Microchip Technologyww1.microchip.com/downloads/en/DeviceDoc/HV7350DB1... · 2015....

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Transcript of Supertex inc. - Microchip Technologyww1.microchip.com/downloads/en/DeviceDoc/HV7350DB1... · 2015....