Sunil443 Ppt

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 Satellite Data Reception Centre 1

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 Satellite DataReception

Centre1

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� Remote sensing satellites earth station

centers receive data from different remote

satellites and process it depending on theuser requirements.

� The data comes from satellite in a particular

data format in X-band (8-12 GHz).The satelliteis visible to the ground station for a period of maximum 14 minutes

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� In this project an attempt has been made to

design and develop an interface which cansimulate the satellite Data pattern for end to

end testing of the ground receiving system,

Data acquisition system and Data processingsystem, validation of the entire system with a

known pattern .� The project is implemented in a FPGA from

the Altera Stratix class of FPGA devices.

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� Remote Sensing Satellites are in the orbit of 600 to800 Km height from the earth surface and send datacontinuously covering whole globe in some

specified times.� Satellites send particulars of any continent, may be

weather information, sea particulars, degree of vegetation.

� Satellite is visible to the earth station for a shortduration of about 12 to 15 minutes.

� During this visibility time Satellite imaging andsimultaneous data transmission takes place to the

ground station. 5

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Data Generated

According toSatellite Data

Format Structure

RS CodingProcess

Pseudo Randomsequence

generation

Attaching SyncMarker

ConvolutionEncoding

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 DATA PROCESS TAKES PLACE IN SATELLITE

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 DATAACQUISITION AND

QUICK LOOK

BROWSE SYSTEM

 DOWN

CONVERTERDEMODULATOR

 LOCALOSCILLATOR

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Transmitter side (satellite)� Frame Synchronize Code Generation.

�  Auxiliary Data Generation.� Video data Generation.

� PN Sequence generation.

� Randomization of Data.

� Word Clock Generation.� Convolution Coding.

� Serialization of data.

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Receiver Side (Earth Station) :� Frames synchronize detection Code.

� De-Randomization of data.� Serial to parallel data words .

Gitam University , ECE Department 11

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� PRE LAUNCH:

It will be used for design, development and testingof the Front-end hardware, before launching of the

satellite.

� POST LAUNCH:

It will be used for maintenance of the Front-end

hardware after launching of the satellite.

� It will be used to test the functionality of front-endhardware and the system interface everyday to ensurethat the satellite data will be received and archived

properly. 12

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� Resourcesat-2 (RS-2) spacecraft is developedto serve as continuity to the Resourcesat-1

(RS-1) satellite with its three tier cameras

LISS-4, LISS-3 and A WIFS.

� BDH system for these mission receives data

from this payloads and format them suitablywith auxiliary data,and transmit them to theground through X band system.

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 APPLICATIONS OF RESOURCESAT-2 SATELLITE

 AGRICULTURE PURPOSE  WATER RESOURCES

 SNOWMELT STUDIES

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� The above frame format structure of Resourcesat-2 satellite.

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S.No Description of Particulars present in

data format structure

Words Description

1

Frame Sync Code And Auxiliary data 0 to 51 words

2 Video Data 52 to 6115 words

3 Spare words for further research 6116 to 6348 words

4 RS code parity bits 6349 to 6577 words

5 Spare words 6578 to 6586 words

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S.No Description of Particulars present in data

format structure

Words Description

1 Frame Sync Code And Auxiliary data 0 to 51 words

2 Video Data 52 to 6115 words

(6065 to 12128 words) i.e.

the original video data for

both channels

3 Spare words for further research 6116 to 6348 words

4 RS code parity bits 6349 to 6577 words

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Spare words 6578 to 6586 words 17

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� Frame Sync Code Generation 

� Line Length Generation 

� Serialization � Randomization 

� Convolution Encoding 

� Video Data Generation � Word Generation 

� Word Clock Generation 

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� Data is attached to the frame sync code,

which is fixed for satellite and known. This is

to indicate the start of the frame that consistsof FCS, auxiliary data and video data.

� It is impractical to handle data bit wise as theline length or the data format for satellites

would be of the order of some 6586 bytes oreven more than that .

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OC (00001100) 28 (00101000)

F2 (11110010) 2C (00101100)

EA (11101010) 7D (01111101)

0E (00001110) 24 (00100100)

DA (11011010) DE (11011110)

C6 (11000110) 97 (10010111)

73 (01110011) 2A (00101010)

FE (11111110) 04 (00000100)

XX (00000000) XX (00000000)

X (0000)

 TOTAL NUMBER OF RAME

STARTING WORDS ARE 19 .

EACH WORD CONSISTS OF8 BITS OF DATA

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� The Frame Sync Code Can be Generated by

using two methods

Memory Method

Sequential Method

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S.NOWORDS

DESCRIPTION

DATA

DESCRIPTION

BINARY DATA

REPRESENTION

1 52 to 430 00 00000000

2 431 to 809 10 00010000

3 810 to 1189 20 00100000

4 1190 to 1567 30 00110000

5 1568 to 1946 40 01000000

6 1947 to 2325 50 01010000

7 2326 to 2704 60 01100000

8 2705 to 3083 70 01110000

9 3084 to 3462 80 10000000

10 3463 to 3841 90 10010000

11 3842 to 4220 A0 10100000

12 4221 to 4599 B0 10110000

13 4600 to 4978 C0 11000000

14 4979 to 5357 D0 11010000

15 5358 to 5736 E0 11100000

16 5737 to 6116 FE 1111111022

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� Since the data coming from the satellite is in

serial form, it is necessary to convert parallel

data into serial data. To convert this paralleldata to serial an 8-bit Parallel-in Serial out

Shift register is used.

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� In order to maintain symbol or bit

synchronization with the received

communications signal.� Every data capture system at the receiving end

requires that the incoming signal have aminimum bit transition density.

� To eliminate long sequence of zeros and ones toensure accurate timing recovery without

redundant line coding

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6586 words

 The total length of one frame is 6586 words. It indicates one line length of satellitedata .The main use of line length generation is as from satellite large amount of data

is going to be dumped, so in order to count the total number of lines acquired.

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� All the satellite data will be in serial form.

Satellite transmit and Receive Data in serial

form.� So for example 6586 words, and each word

consists of 8-bits of data. So total6586*8=52688 bits.

� So in order to handle all bits is not possiblefor proceszsing,so serial data is converted to

parallel data and processing is done.

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TPG

FIFO

SERIAL

DATA

OUT PORT

FPGA

CHIP

FLASH

MEMORY

 DIP SWITCH 28

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ENCODER

DOWN

CONVERTER

UPCONVERTER

MODULATOR

 LOCAL

OSCILLATOR

DEMODULATOR DAQLS

SYSTEM

ONLINE

DATA

STROAGE

WORK STATION -1

WORK STATION -2

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 SATELLITE DATA

TRACKING

SYSTEM

DATA

SERIALIZATION

 HOST SYSTEM TO

STORE DATA

 SATELLITE DATA

TO TEST

DAQLS SYSTEM

TERMINAL TO

RECEIVE DATA

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 FSC CODE GENERATION

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� All the possible modules are designed and

verified for the Data Pattern Generator and

Serializer for checking ground receptionchain.

� And it is implemented Altera FPGA Chip

devices. Testing and Simulations for all

modules is done in MAX+PLUS-II software

and obtained results are expected

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