Stray Inductance
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Transcript of Stray Inductance
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8/11/2019 Stray Inductance
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from Europefor the World
ApplicationNote
European Power-Semiconductor andElectronics Company
For further information contact:eupecMarketing Department Tel: +49 2902 764-0Max Planck Str. 5 Fax: +49 2902-764-1256D-59581 Warstein Internet:: http://www.eupec.com
AN_Stray_Inductance_Definition.doc
Definition of the module stray inductance LsFig.1 shows the principle circuit of a half-bridge and the resulting voltage and current wave-
forms when switching IGBT1. The circuit stray inductance L, shown as a concentrated ele-
ment, represents all distributed inductances (of capacitors, busbars and IGBT modules)
within the commutation loop (striped area).
D1
IGBT1 turn-on
MVcc
-15V
IGBT2
C
IGBT1
L
0
LD2
0
VIGBT2
D2I
IGBT1I
IGBT1 turn-off
0
VIGBT1
VGE
Fig.1: Half-bridge circuit with current and voltage waveforms when switching IGBT1
Due to the changing current a voltage drop of L* dioff/dt occurs across the stray inductance
L. It is overlayed to the DC link voltage VCCand seen as a voltage spike across the turning-
off IGBT1. Permissible limits for turn-off current di/dt and overvoltage can be deduced from
the RBSOA diagram of the IGBT. This curve (see Fig.2) is valid when the measurement is
done through the CE auxiliary terminals. Also a derated curve is given in the data-sheet for
measurements at the power terminals, taking into account the internal module stray induc-
tance between main and auxiliary terminals of the module. For dual modules, this diagrams
refers to the voltage across one of the both commutating IGBT switches.
For calculations the value for the internal module stray inductance L s is given in the data-
sheets. For single switch modules, this value is the before mentioned stray inductance be-
tween main and auxiliary terminal. For dual modules or modules containing several phase
legs, this value corresponds to the application relevant effective commutation loop between
upper and lower switch. Due to the construction this value is clearly lower than the sum of
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8/11/2019 Stray Inductance
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Application Note page 2 of 3
For further information contact:eupecMarketing Department Tel: +49 2902 764-0Max Planck Str. 5 Fax: +49 2902-764-256D-59581 Warstein Internet:: http://www.eupec.com
AN_Stray_Inductance_Definition.doc
V
dIF/dtIF
V0
separately determined induc-
tances of upper plus lower arm.
In modules with more than one
phase leg always the worst
case commutation path from
plus supply voltage through the
phase leg back to minus supply
voltage is considered.
The measurement is performed, while the diode turns off. The voltage drop happens at a
point of time, where the di/dt is constant and the diode still
has no blocking capability. Therefore the voltage drop can
only be caused by the module stray inductance. No other
effects have to be considered. The module stray inductance
is calculated according to Ls= V / diF/dt.
Dependent on the type designation, the data sheet value for
the stray inductance has to be interpreted in the following way:
Sicherer Arbeitsbereich IGBT (RBSOA)
Reverse bias safe operating area IGBT (RBSOA)
0
600
1200
1800
2400
3000
0 500 1000 1500 2000 2500 3000 350
VCE
[V]
IC[A]
IC,Modul
IC,Chip
RG,off
= 1,2,Tvj= 125C
Fig.2: RBSOA diagram for FZ1200R33KF2
DUT:
half-bridge
-15 V
-15 V
LL
CVCC
V
DUT:
single sw itch
-15 VLL
CVCC
V
Fig.3: Measuring circuit
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8/11/2019 Stray Inductance
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Application Note page 3 of 3
For further information contact:eupecMarketing Department Tel: +49 2902 764-0Max Planck Str. 5 Fax: +49 2902-764-256D-59581 Warstein Internet:: http://www.eupec.com
AN_Stray_Inductance_Definition.doc
Single modules type FZ... or ...GA... and Tripacks:
The module stray inductance is measured between the C and E main terminals.
Dual modules type FF... (with exception of FF200R33KF):
These modules contain two independent switches. Given is the
stray inductance between the C and E main terminals of one switch.
Half-Bridges type ...GB... and FF200R33KF (modules with three main terminals):
The given data sheet value covers the full
commutation loop between upper and lower
switch, including the inductance between
upper C1 and lower E2 terminals.
4-packs type F4-...:
These modules contain two independent phase-legs. The given data sheet
value covers thefull commutation loop between upper and lower switch
within one phase-leg, including the inductance between + and - terminals.
Six pack modules type FS...:
The given data sheet value covers thefull commutation loop between up-
per and lower switch within one phase-leg, including the inductance be-
tween + and - terminals.
3-Phase full bridges or PIM type ...GD... or ...GP...:
The given data sheet value covers the full commutation loop
between upper and lower switch at the worst position within
the module, containing the full inductance towards the P+
and N- terminals (terminals named 22 and 24 with PIM).