Start your Nios II I C Master/Slave/PIO Controller IP ......Nios II CPU Microtronix I2C Master IP...

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IP Core I 2 C PIO Slave Configuration Microtronix I 2 C Slave IP Core Avalon Bus Altera Nios II CPU Microtronix I 2 C Master IP Core 2-Wire I 2 C Bus Avalon I C Slave Configuration Avalon Bus Microtronix I 2 C Slave PIO IP Core 8-bit I/O Port Avalon I 2 C Master Configuration Altera Nios II CPU (1-4 8-bit I/O Ports) Key Features •I 2 C Master/Slave Transmitter & Receiver IP core •I 2 C 8-bit PIO Slave core • Own address and general call address detection • Input clock filter • Meets Philips I 2 C-bus specification version 2.1 • 7-bits addressing format • Single byte transmit and receive buffer • Santa Cruz I 2 C development board included • VHDL • 300 LE’s for Avalon M/S, 100 LE’s for PIO I2C Designer Package • Encrypted source code • Altera SOPC Builder component • HAL Master/Slave drivers & applications • Linux Master driver • ModelSim Test Bench • Includes license and 1 year of updates • Reference designs for Microtronix & Altera Dev Kits • 2-Hours of Technical Support I2C Evaluation Package (Download) • Altera OpenCore evaluation license • Encrypted source code • Altera SOPC Builder • ModelSim Test Bench Description The Microtronix I 2 C IP Core is a complete I 2 C solution offering three modes of operation: I 2 C Master controller, I 2 C Slave controller and an 8-bit PIO Slave device. Three I 2 C bus transmission speeds are supported; Normal: 100Kbps, Fast: 400Kbps and High-Speed: 3.4Mbps. The Microtronix I 2 C Master/Slave core provide a generic memory-mapped bus interface. It is also designed as an Altera SOPC Builder ready component and integrates easily into any SOPC Builder generated system using an Nios® II Avalon bus. The Microtronix I 2 C PIO Slave core is provided as an Altera Quartus II Megafunction and integrated into the Altera MegaWizard Plug-in Manager. The I 2 C bus is a simple two wire bi-directional interface developed for inter-IC (I 2 C) communication. Many semiconductor vendors offer a wide range of I 2 C devices, such as EEPROM memories, I/O ports, temperature sensors, A/D converters, etc. The IP is optimized for all Altera FPGA’s, including the newest generation Stratix II, Cyclone II and MAX II devices. Start your Nios II I 2 C Master/Slave/PIO Controller IP development project today. *IP supports non-Avalon processor systems

Transcript of Start your Nios II I C Master/Slave/PIO Controller IP ......Nios II CPU Microtronix I2C Master IP...

IP Core

I2C PIO Slave Configuration

MicrotronixI2C SlaveIP Core

AvalonBus

AlteraNios IICPU

MicrotronixI2C Master

IP Core

2-WireI2C Bus

Avalon I C Slave Configuration

AvalonBus

MicrotronixI2C Slave

PIO IPCore

8-bitI/OPort

Avalon I2C Master Configuration

AlteraNios IICPU

(1-4 8-bitI/O Ports)

Key Features

• I2CMaster/SlaveTransmitter&ReceiverIPcore• I2C8-bitPIOSlavecore• Ownaddressandgeneralcalladdressdetection• Inputclockfilter• MeetsPhilipsI2C-busspecificationversion2.1• 7-bitsaddressingformat• Singlebytetransmitandreceivebuffer• SantaCruzI2Cdevelopmentboardincluded• VHDL• 300LE’sforAvalonM/S,100LE’sforPIO

I2C Designer Package

• Encryptedsourcecode• AlteraSOPCBuildercomponent• HALMaster/Slavedrivers&applications• LinuxMasterdriver• ModelSimTestBench• Includeslicenseand1yearofupdates• ReferencedesignsforMicrotronix&AlteraDevKits• 2-HoursofTechnicalSupport

I2C Evaluation Package (Download)

• AlteraOpenCoreevaluationlicense• Encryptedsourcecode• AlteraSOPCBuilder• ModelSimTestBench

Description

TheMicrotronixI2CIPCoreisacompleteI2Csolutionofferingthreemodesofoperation:I2CMastercontroller,I2CSlavecontrollerandan8-bitPIOSlavedevice.ThreeI2Cbustransmissionspeedsaresupported;Normal:100Kbps,Fast:400KbpsandHigh-Speed:3.4Mbps.TheMicrotronixI2CMaster/Slavecoreprovideagenericmemory-mappedbusinterface.ItisalsodesignedasanAlteraSOPCBuilderreadycomponentandintegrateseasilyintoanySOPCBuildergeneratedsystemusinganNios®IIAvalonbus.TheMicrotronixI2CPIOSlavecoreisprovidedasanAlteraQuartusIIMegafunctionandintegratedintotheAlteraMegaWizardPlug-inManager.

TheI2Cbusisasimpletwowirebi-directionalinterfacedevelopedforinter-IC(I2C)communication.ManysemiconductorvendorsofferawiderangeofI2Cdevices,suchasEEPROMmemories,I/Oports,temperaturesensors,A/Dconverters,etc.TheIPisoptimizedforallAlteraFPGA’s,includingthenewestgenerationStratixII,CycloneIIandMAXIIdevices.

Start your Nios II I2C Master/Slave/PIO Controller IP development project today.

*IP supports non-Avalon processor systems

NORTHAMERICANHEADOFFICELONDON,CANADA

PHONE:+15196900091TOLL-FREE:+18886900091

The I2C Expansion Board Provides:

• DallasDS1307ZRealTimeClock,• Microchip24LC01B1KbEEPROM• PhilipsPCA9554A8bitI/OPort• HardwarePrototypingArea• SantaCruzinterface

Ordering Info

• SKU:6232-01-02MicrotronixI2CIPDevelopmentKit—includes:• I2Ccoreand1-1-1license• I2CExpansionBoard(optional)• 2-HoursofTechnicalSupport

• www.microtronix.com

Development Kit Info

I2C Expansion Board (optional)

TheMicrotronixI2CExpansionBoardprovidesaneasywaytodesign,developandtesttheMicrotronixI2CIPcore.TheI2Cboardprovidesaprototypingarea,I2CdeviceexpansionheaderandanAlteraSantaCruzsocketconnector.TheboardisdesignedasanexpansioncardforeitheraMicrotronixorAlteraNiosIISantaCruzdevelopmentboardhavinganAlteraSantaCruzexpansionheader.HardwarereferencedesignsareprovidedforMicrotronixandformostAlteraNiosIIEvaluationKits.

TheI2CIPwasfullydevelopedandisownedbyMicrotronix.ItislicensedundertheMicrotronix1-1-1LicenseAgreement(1-user,1-computer,1-year).TherearenoroyaltyfeestousethisI2CIPcoreinyourfinalproduct.TheIPshipswith2-hoursofTechnicalSupportfor90daysfromdateofpurchase.

InterfacingyourI2CdevicetotheNiosIIprocessorandµClinuxhasneverbeeneasierormoreflexible.TheµClinuxsoftwarethatcomeswiththeCDincludesallsourcecodeandaNiosIIHALcomponentwithsupportingdrivers.I2Cdetect,I2CdumpandI2CsetI2CLinuxapplicationtoolsarealsoincludedfortestinganddebuggingyourI2Capplication.

Designer CD Contents

• I2CIPlicense(download)• EncryptedIPsourcecode• AlteraSOPCBuildercomponent• HALdriversforI2Cbus• NiosIIreferencedesignsforsupportedDevKits• SampleLinuxapplications• Schematics

Supported Hardware Dev. Platforms

• MicrotronixNiosIIdevelopmentplatform• AlteraCycloneEP1C20NiosIIDev.Kit• AlteraCycloneEP2C35NiosIIEvaluationKit• AlteraStratixEP1S10NiosIIDev.Kit• AlteraStratixEP1S40NiosIIDev.Kit• AlteraStratixEP2S60ESNiosIIDev.Kit• AlteraStratixEP1S40NiosIIDev.Kit

* Available upon request