Standar Drivers Electronics

7/26/2019 Standar Drivers Electronics

1/31

Lighting systemsLight sources in modern buildings:characterization, modeling and simulations

Panel Session: New Harmonic Sources in Modern Buildings

1

Jiri Drapela

Brno University of Technology, Czech Republic

Roberto LangellaSecond University of Naples, Iatly

IEEE PES General Meeting 2014, July 27-31, Washington DC


2/31

2

Lighting technologies for general lighting in modern buildings

About 20% of electricity worldwide is consumed by artificial illumination system, thus by lightsources (lamps) of different types

Direction according to market studies(residential, public buildings and commercial sectors)

High intensity discharge, halogen lighting and incandescent bulbs in withdrawal Fluorescent lighting run over and then withdrawal LED lighting taking market, increasing penetration

Only fluorescent lamps fed by electronic ballasts and LED systems are taken into consideration

in the presentation


3/31

3


Design of converters for lamps vs. Emissions of harmonic currentEmissions are related to circuitry of supply units (ballast and converters/ drivers) which design is subject tofollowing factors: application (replacement of lamps, for designated luminaires, for illumination systems with specific

distribution system, ) qualities (dimming, communication, etc.) requirements of related standards production costs

Design variations related to application integrated design

(converter inseparable from lamp)

external converter for specific no. of lamps

converter feeding specific distribution systemwith independently controlled lamps

Requirements for converters for lamps (standards) to ensure correct operation of a lamp (fluorescent tube, LED) in all operational states requirements for safety EMC requirements in terms of immunity

limitation in emissions

conv.

light sourcemains

mainsluminaire

conv.

mainsluminaire

conv. conv.

luminaire

conv.


4/31

4


Direct or indirect requirements on /specifications for ballasts and converters design according tothe (EU) standards (brief overview)

Lamp performance and safety

specifications

EN 60081 and EN 61195. Double-capped fluorescent lamps.

EN 61167. Metal halide lamps.

Lamp controlgear general

(particular), performance andsafety requirements

EN 61347-x-y standard series.

EN 60921. Ballasts for tubularfluorescent lamps.

Luminaire general (particular),performance and safetyrequirements and tests

EN 60598-x-y standard series.

EN 60921. Ballasts for tubularfluorescent lamps.

..Luminaire, controlgear EMC requirements and tests

EN 61547. EMC Immunity requirements. EN 55015. Radio frequency emission limits.

EN 61000-4-y standard series. EN 61000-3-2. Limits for harmonic current emissions

.


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5

with capacitive PFC with active PFC

+

-

Y

Y Y

NN

rectifier

HPFNPFLPF

with inductive PFC

+

-

circuit circuitcircuit

N

Y

i

/2

i

/2 /2

i

/2

i

double stagetopology

Single-Stage (S-S)topology

N

Y Y

EMI Filter

Rectifier Inverter

Driver Ouput stage

230V ~

L

N CB

i

v vB

iI

iLvL

Typical circuits of EB for FLs

screw-basedCFLs (P25 W)

screw-basedCFLs

screw-based CFLs(small choke DiscontinuousCurrent Conduction(DCC) - LPF)

external EB forLFLs (big choke

Continuous CC

external EBfor LFLsand CFLs

screw-basedCFLs

external EB forCFLs and LFLs

FL is fed from a Half-bridge resonantvoltage source (or from a Push-Pull)inverter which is supplied from a source ofDC voltage

Electronic Ballast (EB) for Fluorescent Lamps (FLs) - topologies


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6

Drivers (power supplies) for LEDs - topologies

Typical circuits of Drivers/Power supplies for LEDs

L

N

i

v

CD

CB iL

vL

L

NvB

CB

i

v

iLvL

iILBK

PWM

iL

vL

PWM

iI

iI

iLv

L

Cr

Lr1 Lr2

non-isolated

isolated

Voltagedivider, usedfor very lowinp. power

There are used the same PFCtechniques as in case of EBs.

A map is at at next slide

Buck conv. universal input;Const. Current (CC) or Const. Voltage(CV) output; driver for LP or powerLEDs

Flyback conv. universal input; CCor CV output; driver for power LEDsor power supply for LED track,luminaries or lamps

Half-Bridge (HB)resonant conv.universal input; CC orCV output; driver forpower LEDs or powersupply for LED track,luminaries or lamps

Optimized to supply voltage level;series string of 10-35 mA LEDs (Low-Power LEDs)


7/31

7

with capacitive PFC with active PFC

+

-

Y

Y Y

NN

rectifier

HPFNPFLPF

with inductive PFC

+

-

circuit circuitcircuit

N

Y

i

/2

i

/2 /2

i

/2

i

double stagetopology

Single-Stage (S-S)topology

N

Y Y

screw- or othercap- basedLED lamps(P25 W)

also externaldrivers for highpower apps(P>25 W)

external driversfor LEDs

screw- or other cap-based LED lamps

(small choke DiscontinuousCurrent Conduction(DCC) - LPF)

external driversfor LEDs andpower suppliesfor tracks,

luminaries or

lamps

external driversfor LEDs andpower suppliesfor tracks,luminaries orlamps

Drivers (power supplies) for LEDs - topologies

Typical circuits of Drivers/Power supplies for LEDs Power Factor Correction

L

NvB

CB

i

v

iLvL

PWM

iI


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8

Modeling of lamps with converters

Modeling in time domain Full / switching models even if simplified/ optimized for specific purposesUtilization of an accurate model of lamp itself if fed from an electronic converter is notso important for input to input response as the convertor model is. (For Low/Frequency(LF) conducted disturbances study).

Simulations of switching models behaviour are very time consuming.and thus arenot suitable for response prediction of large systems or for simulation of long termdisturbancesSince information about switching components in input current for mentioned studies isvery minor simplifications in modeling can be made

Simplified models linearization linearized modelsaveraging averaged models

Simplified models are created to keep information about LF bandwidth behaviour, i.e.about LF conducted disturbances

Modeling in frequency domain

There are also models and procedures to obtain models for modeling of disturbingloads in frequency domain

Fixed current sources based equivalent models Norton equivalent models cross-harmonic complex admittance models


9/31

-200

-150

-100

-50

0

50

100

150

200

-0.4 -0.2 0 0.2 0.4

Lamp currentiL

(A)

Lampvo

ltagevL

(V)

for

for

9

Modeling of FL at HF

ZS LF

CB

CF

RF

LR

CF

RL

-350

-250-150

-5050

150250

350

Linevoltageandcurrent,

DCbusvoltage

v(V),i/300(A),vB(

V)

vB

i v

tTO

a)

-150

-100

-50

0

50

100

150

0 5 10 15 20 25 30

Lampvoltageandcurre

nt

vL

(V),iL/300(A)

iL

vL

d)

-150

-100

-50

0

50

100

150

0 0.05 0.1 0.15Time (ms)

Lampvo

ltagean

dc

urren

t.

vL

(V),iL/300(A

)vL

iL

Based on dynamic AV characteristic curve of a discharge innormal operation if supplied by HF current, a FL can besubstituted by a resistance

It is acceptable if DC voltage ripple (vB) is reasonable (up to30%), otherwise different model has to be used to keepcorrectness, for instance voltage driven resistance, etc.

Then model (switched model) of an EB can be drawn asfollows:

Experimental results: CFL of about 20 W, 230 V @ 50Hz

EMI Filter

Rectifier Inverter

Driver Ouput stage

230V ~

L

N CB

i

v vB

iI

iLvL

Basic EB for CFL


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10

Frequency

0Hz 125KHz 250KHz 375KHzI(R1)

1.0pA

1.0uA

1.0A

Waveforms of supply voltage (red), input current(green) and of DC bus voltage (blue);Spectra of input current: full and LF part,THDI=146% (up to h=50)

N

R6

430

L4

2.3mH

D3

3

1

houtL

L2

2mH

1 2+

M2

IRF840

lamp_N

D6R8

10kC6

6.8u

C8

6.8n

lamp_L

V6TD = 0

TF = 0.5uPW = 9uPER = 20u

V1 = 0

TR = 0.5u

V2 = 10

D4

3

1

houtN

D2

3

1R1

0.4

R7

.05

R5

.05

C7 33n

D5

3

1 D70

V5TD = 10u


V1 = 0

TR = 0.5u

V2 = 10

R9

10k

M1

IRF840

-

R10

6.8V4

FREQ = 50VAMPL = 325VOFF = 0

Frequency

0Hz 2.0KHz 4.0KHzI(R1)

0A

40mA

80mA

120mA

Time

20ms 30ms 40ms 50ms 60ms1 I (R 1) 2 V (L )- V (N ) V (+ )- V (- )

-400mA

0A

400mA

-700mA

700mA1

>>-400V

-200V

0V

200V

400V2

Simple switched model of a CFL with basic EBModel in PSpice of a 18W CFL Simulation results

Switching models are only necessary when switching

ripples are of interest or detailed transient information isneeded

It slows down computing (switching frequency isthousand times higher then system frequency) andinformation about High Frequency (HF) ripple is uselessfrom point of view of Low-Frequency (LF) disturbances

propagation study

Basic EB for CFL


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11

Simplification of the inverter stage

EMI Filter

Rectifier Inverter

Driver Ouput stage

230V ~

L

N CB

i

v vB

iI

iLvL

-350

-250-150

-5050

150250

350

L

inevoltageandcurrent,

DCbusvoltage

v(V),i/300(A),vB(

V)

vB

i v

tTO

a)

-0.2

-0.1

0

0.1

0.2

0.3

0.4

Invertercurren

t

iI(A),iIF/4(A) iI

iIF

b)

0

1000

2000

30004000

5000

0 5 10 15 20 25 30

Time (ms)

EquivalentDCbus

load

REL

()

c)

Experimental results: CFL of about 20 W, 230 V@ 50Hz

Switching frequency of inverter is constant in steady-state andnormal operation; the inverter control circuit does not containregulation of the lamp current

Then, for LF phenomena study purposes, the inverter withoutput stage and lamp can be replaced by an equivalent linearresistance of constant value (representing the same limitationsas in case of the lamp substitution). Switching signals of theinverter are de facto averaged over the switching period.

Simplified model of the basic EB for CFL is as follows:ZS

LF

CB

CF

RF

REL

Basic EB for CFL

*) iIF is filtered current iI

IF

B

EL i

v

tR =)(


12/31

12

Time

560ms 570ms 580ms 590ms 600ms1 I (R 1) 2 V (L )- V (N ) V (+ )- V (- )

-500mA

0A

500mA

1

>>-400V

0V

400V2

Frequency

0Hz 2.0KHz 4.0KHzI(R1)

0A

40mA

80mA

120mA

D3

3

1

D2

3

1

R10

6.8

N

D5

3

1

C6

6.8u

0

V4


L+

R6

5k

R1

0.4 D4

3

1

-

L2

2mH

Simplified model of the basic EB for CFLModel in PSpice of a 18W CFL Simulation results

Waveforms of supply voltage (red), input current(green) and of DC bus voltage (blue);Spectra of input current: THDI=146% (up to h=50)

Simulation results in term of LF part of input current conformwith the results obtained for corresponding switching model

Basic EB for CFL


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13

Basic EB for CFL performance analysis based on simplified model

Lser

CB

Rser

REL

ELBC RC =

Scheme composed only of essential parts

Magnitude and shape of input / line currrent (i.e.

power and spectral components) are full given byvalue ofRser, Lser, CBandREL and by their correlation

input power is mainly represented and thusestimated by REL line current waveform is matter of balance in

charging and discharging process over halfsystem period given by CB in relation to REL.An invariant parameter describing the rectifierload there is C load/converter time constant:

serial combination of Lserand CBconstitutes aseries resonant circuit influencing input currentby self-oscillations at resonant frequency fr. The

resonant frequency is second invariant

parameter of the rectifier.

Expression of frcomes from circuit seriesimpedance:

Thus fr is as follows:

the last one component there is Rserwhich

smooths line current and which can benormalized by CB in form of series time constantor by equivalent capacitive reactance atfundamental frequency:

serBELBserB

rLCRCLC

f

=

= 2

111

2

122 &

( ) ( )

+

+

++=

22

221

1

1

ELB

ELB

ser

ELB

ELser

RC

RCLj

RC

RRZ

0.1

1

10

100

1000

10000

10 100 1000 10000fr(Hz)

|Z|()

L ser= 5H2H

1H0.5H

0.2H0.1H

50mH20mH

10mH

5mH2mH

1mH 0.5mH

CB=10 F

REL =5150 C=51.5 ms

serBS RC = serBCB

serS RC

X

Rr

1==

Basic EB for CFL


14/31

14

Basic EB for CFL performance analysis based on simplified model (cont.)

0

50

100

150

200

250

300

350

101001000 C(ms)

VB,avg

THDI(I1) (%), h 40I(mA)

THDI(I) (%), h 40

VB(%)

0

25

50

75

100

101001000 C(ms)

(Ih/I1).

100(%)

I1/I1

I3/I1

I5/I1

I7/I1I9/I1I11/I1I13/I1I15/I1

0

25

50

75

100

1 5 913

17

21

25

29

33

37h(-)

(Ih/I1).100(%)

C=10 ms26 ms

258 ms

103 ms

52 ms

1030 ms515 ms

Influence of CTo comply with harmonic current emission limitsand to maintain reasonable DC voltage ripple, theCof CFLs is in range (10)-15-50-(70) ms

The larger C the shorter conduction time of therectifier and higher content of harmonics in inputcurrent

Simulation results for various Cwhile Rser=0 ,Lser=0 H:

Relative amplitude spectrum of line current for variousload/converter time constants

Relative amplitudes of chosen harmonics vs. load/converter time constant

Chosen circuit quantities vs. load/ converter timeconstant

Basic EB for CFL


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15

Basic EB for CFL performance analysis based onsimplified model (cont.)

10

100

1000

10100100010000 fr(Hz)

VB,avg(V)

THDI(I) (%), h


16/31

Frequency

0Hz 0.5KHz 1.0KHz 1.5KHz 2.0KHz 2.5KHz 3.0KHz1 I(R2)

0A

40mA

80mA

120mA1

2

>>

16

Basic EB for CFL performance analysis based on simplified model (cont.)

Analytical solution

C=51.5 ms , fr=1592 Hz, S=7.5s

Rser=7.5,Lser=1 mH, CB=10 F, REL=5150 (blue)Rser=0.75,Lser=0.1 mH, CB=100F, REL=515 (green)

Influence of S

Summary

Resistance Rserconsists of series combination of the supply network effective resistance, used chokesresistances and resistance of a resistor applied in input side of EB to limit inrush current (~ Ohms).The Rserattenuates line current shape and possible resonant oscillations in the current and Scan be

practically in range from 0.2 s to 0.2 ms

The input current waveform is invariant if the rectifier invariant parameters C, frand Sare of the samevalue

En example (simulation results):

Frequency

0Hz 0.5KHz 1.0KHz 1.5KHz 2.0KHz 2.5KHz 3.0KHzI(R2)

0A

0.4A

0.8A

1.2A

Except numerical simulation, the resulting input current waveform can be obtained from solution ofanalytical description of the simplified model. The most critical part of it there is to find out conductionangles bounding CB capacitor charging and discharging areas, especially in case of multi-conduction

Time

1 .4 80 s 1 .4 85 s 1 .4 90 s 1 .4 95 sI(R2)

-10A

0A

10A

Basic EB for CFL


17/31

17

EB with passive PFC

Division of the passive PFCs (patterns)Passive PFC techniques introduced to reduce harmonics content to meet standards requirements forharmonics emissions

- inductive passive PFC

CB

v

iig

iI

vB

LF,DCLF,AC

CVF2

v

iig

vB

CVF1

DVF1

DVF2

DVF3

- capacitive passive PFC Valley-Fill (VF)

- other variants of the Valley-Fill(some of them)

CVF2

v

iig

iI

vB

LVFCVF1

DVF1

DVF2

DVF3

RVF

CVF2

v

iig

iI

vB

CVF1

DVF1

DVF2

DVF3

CVF3DVF4

DVF5

DVF6

i

v

iI

vB

CVF1

CVF2

CpL

CpH

RVF2

RVF1

RpH

RpL

Proper size to smooth current inthe case of CFLs (P25 W), ifnecessary, used on both the ACand DC sides. Coke size isusually quite small -> harmonicscontent stays very high

Behaviour (contribution) is fullydescribed in the section of basicEB for CFL simplified modelperformance analysis

Large chokes at DC side for PFcorrection of EB with inputpower above 25 W are not used

anymore

Utilization of the VF may involve EB

(P>25 W) to comply with currentlimits for harmonics

VF capacitors are charged in seriesand discharged to load in parallel,connection is provided by network ofdiodes

Due to this, DC bus voltage varybetween rectified voltage peak anddrops at least to half of the peakvalue


18/31

18

Double-stage active PFC EB

Typical circuit of double-stage active PFC EB

Active boost type PFC, in dependences on employed regulationloops, emulates EB input to be like a resistor and regulates outputvoltage (vB) on reference, i.e. on constant output power, thus wholethe inverter part including lamp can, for modeling, substituted byresistance again, if interested in the line current

The PFC can work in Discontinues- Continuous- or CriticalConduction Mode (DCM, CCM, CrCM) with corresponding (various)switching control strategies, for example:

PWM

CB

LBT

iT

iDig

vg

2xLHF2xCHF

230V ~

L

N

i

v

Controller PFC circuit

iI

iLvL

vB

Measurement results


19/31

19


Switching model of an active PFC for EB

D102DN4722

RlowM18k

X1

MTP8N50

cmp

drainRsL

162m

C1

22n

Rzcd

22k

Rupp1.59Meg

L HV

Rs

13m

RuppM2.2Meg

Cin330nF

Ccmp0.68uF

Rsense2.5

Rlow10k

cs

-

+

MC33262

FB

CMP

MUL

CS ZCD

GND

DRV

VCC

U1 MC33262

R1

0.0001

Dout

MUR130

U2

XFMR10.04692

0 1

2 3

CMUL

10nF

L1

1mH Rstart100k

Resr70m

0

CVcc

100uF

mul

Vinput


Rload

4444

D101DN4722

D100DN4722

Lp

1.1mH

Cout40uF

C2

100n

DN4722D103

D1DN4934

drv

L2

1mH

N

Model in PSpice Simulation results

Waveforms of supply voltage (blue), input current(green) and of DC bus voltage (red);Spectra of input current: THDI=5.1 % (up to h=50)

Model represents full controlling with CrCM control strategy, itmeans switching frequency is changing within period

Again, computing is very time consuming

Content of LF harmonics is very small (THDIpractically up to15%). On other hand PFC causes different time variations in

input current when supply voltage magnitude is varying (indepencance on regulation scheme)

0.0

0.5

1.01.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

3 915

21

27

33

39h(-)

(IhI1).100(%).


20/31

20


D-S Active PFC EB response to voltage changes

Simulations using switching models are extremely time consuming.

The solution is to apply an averaging technique to obtain an Averaged-switch model

Averaged switch modeling allow us to predict steady-state characteristics and Low-bandwidth

dynamics of converters

Measurement results

-400

-200

0

200

400

0 50 100 150 200 250 300

Time, t(ms)

Supp

lyvo

ltage,v

(V)

-2

-1

0

1

2

Linecurrent

i,I(A)

v i I(RMS1/2p)

Voltage dip to from 230 to 90 V, duration time of 150 ms


21/31

21


Averaged model of the boost rectifier circuitSignals are averaged over switching period. Average models change thediscontinuous system into the continuous system

Substitute for switch-diode combination of the boost DC/DC conv. suitablefor both the DCM and CCM with fixed switching frequency fsand variable

duty cycle ratio d:

Boost rectifier becomes ideal, assumingthat inner wide/bandwidth currentcontrolling loop operates ideally

High-frequency switching componentsremoved by averaging

Line current low-frequency componentsremain

Resulting model in nonlinear and time-varying

Switch network

+

= DCM;

2

CCM;

2

12

2

v

ifLd

d

d

u

SBT

+

=

2

12

2

2

,

v

ifLd

ddMAXu

SBT

CCM/DCM boundary:


22/31

22

Frequency

0Hz 0.25KHz 0.50KHz 0.75KHzI(R0)

0A

100mA

200mA

300mA

Time

0.980s 0.985s 0.990s 0.995s1 V (L )- V (N) V (+ )- V (- ) 2 I (R 0)

-500V

0V

500V1

-400mA

0A

400mA2

>>

Time

0.980s 0.985s 0.990s 0.995s1 V (L )- V (N) V (+ )- V (- ) 2 I (R 0)

-500V

0V

500V1

-400mA

0A

400mA2

>>

Frequency

0Hz 0.25KHz 0.50KHz 0.75KHzI(R0)

0A

100mA

200mA

300mA


Averaged model of the boost rectifier circuit (cont.)Model in PSpice Simulation results

Waveforms of supply voltage (green), input current (blue) andof DC bus voltage (red); Spectra of input current: THDI=27.3 %

(up to h=50)

Waveforms of supply voltage (green) distorted by 3rd and 5th

harm. (10%-0; 5%-180), input current (blue) and of DC busvoltage (red); Spectra of input current: THDI=17.6 % (up to

h=50)

Controlling loop cover Low-bandwidth DCvoltage loop only. A part correcting dbased oninput voltage waveform is not employed. Thusline current distortion is bigger than in case offull voltage loop implementation

The first order PI controller integral time constantis about 20 ms, it means that cut-off frequency ofcorresponding transfer function is at approx. 8Hz


23/31

23

Time

400ms 450ms 500ms 550ms 600ms 650ms 700ms 750ms 800ms1 V (L )- V (N) V (+) - V (- ) 2 I (R0 )

-500V

0V

500V1

-1.0A

0A

1.0A2

>>

Time

400ms 450ms 500ms 550ms 600ms 650ms 700ms 750ms 800ms1 V (L )- V (N) V (+) - V (- ) 2 I (R0 )

-500V

0V

500V1

0A

2.0A

4.0A

6.0A2

>>


Averaged model of the boost rectifier circuit (cont.)Simulation resultsResponse of the model on slow and rapid

supply voltage changes:

a) voltage step from 230 to 115 V (sinusoidalwaveform)

b) voltage dip from 230 to 115 V for 100 ms

(sinusoidal waveform)

Waveforms of supply voltage (green), input current (blue) andof DC bus voltage (red);


24/31

24

Single-stage active PFC EB

Typical circuit of Single-Stage (S-S) active PFC EB

In order to reduce production costs, Single-Stagetopologies were introduced. S-S topology is able toprovide some of D-S functionalities: input emulatesresistor and feeding of lamp is ensured, EB does not

regulate DC bus voltage and so lamp voltage (current)Some of characteristics:

-switching frequency is fixed in steady-state (normaloperation)

- typically w/o regulation loops

- DC bus voltage is of natural behavior depending onemployed circuit which can lead to:

- up to double of standard DC voltage level or

- serious DC bus voltage variation causing periodicaldrift of lamp operating point, it means modeling oflamp by a resistance could be inaccurate

Some of other variants

LBT

CB

Lr

Cr

DBT

S1

S2

2xLHF2xCHF

230V ~

L

N

i

v

iLvL

ig

vB

CB

Lr

Cr

Cin

Lin

Dx Dy

S1

S2

CB

Lr

Cr

Cin1

Cin2

Lin

S1

S2

LBT

CB

Lr

Cr

Cin1

Cin2

DBT2

DBT1

S1

S2

Measurement results


25/31

25

Single-stage active PFC EB

Switching model of an S-S active PFC for EB

Model in PSpice

M2

IRF840

houtN

D33

1

V5TD = 10u


V1 = 0

TR = 0.5u

V2 = 10

lamp_N

D43

1

N

C4

100n

D7

MUR160

-

R7

.05

R1

0.0001

D23

1

D6

MUR160

R910k

R6

304

C733n

L

D8

MUR160

R8

10k

D53

1

+ R5 .05

V4


L3

5.0mH

R100.0001

C5

100nlamp_L

L4 3.8mH

houtL

M1

IRF840

C8

6.8n

C6

35u

0

V6TD = 0


V1 = 0

TR = 0.5u

V2 = 10

L2

5mH

1 2

Simulation results

Time

80ms 90ms 100ms 110ms 120ms1 I(R1) 2 V(L)- V(N) V(+)- V(-)

-400mA

0A

400mA1

-0.5KV

0V

0.5KV

1.0KV2

>>

Frequency

0Hz 50KHz 100KHzI(R1)

10uA

1.0A

1.0nA

0.0

2.0

4.0

6.0

8.0

3 711

15

19

23h(-)

(IhI1).100(%

).

Waveforms of supply voltage (red), input current(green) and of DC bus voltage (blue);Spectra of input current: THDI=7.9 % (up to h=50)

Model represents S-S interleaved PCF EB

The model can be again simplified using averagingtechnique if just LF phenomena are subject of interest.Simplification procedure to get averaged-switch model, as incase of D-S active PFC EB can be adopted. In fact theincluded PFC operate with constant switching frequency andeven duty ratio.


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Modeling of LEDs

LEDs (lamps) can be simply modeled using diode model(s)of appropriate parameters

In a case of stable lamp voltage (current) with small rippleensured by feeding converter, a resistance can beemployed as substitute

Experimental results: Screw/based LED lampof about 6 W, 230 V @ 50Hz

Basic Driver for LEDs

L

NvB

CB

i

viI

iL

vL

Cr

Lr1 Lr2-350

-250

-150

-50

50

150

250

350

0 5 10 15 20 25 30Time (ms)

Linevo

ltagean

dcurren

t,

DCbusvo

ltage,

v(V),i(mA),vB

(V)

vi

vB

020406080

100120140160

0 5 10 15 20 25 30

Time (ms)

Lampvoltageandcurrent,.

vL(V),iL(mA)

iL

vL

0

10

20

30

4050

60

0 5 10 15 20 25 30

Time (ms)

Invertercurrent,

iI(mA),iIF(mA)

iI

iIF

0

24

6

8

10

0 5 10 15 20 25 30

Time (ms)

Equ

ivalen

tDCbus

loa

d,REL

(k

)


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Modeling of drivers with LEDsThere is pretty symmetry between LED drivers and EB in modeling: If the switching converter is of fixed switching frequency and operating with constant

duty ratio, whole the second stage of the converter with the LEDs string can be, usingaveraging method, replaced by an equivalent resistance which loads rectifier as incase of EB. Then following model can be used:

In a case the driver second stage include controlled switching converter, its averagedswitch model can be utilized, following already described procedure. The same can beapplied for modeling of an active PFC if it is present.

Basic Driver for LEDs

ZSLF

CB

CF

RF

REL


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References (cont.)

TAO, F. Advanced High-Frequency Electronic Ballasting Techniques for Gas Discharge Lamps. Dissertation, Center for Power Electronics

System, Blacksburg, Virginia, 2001 Texas Instruments. Using the TPS92070EVM-648 Integrated Dimming LED Lighting Driver Converter for 230 VAC Input. Users Guide

SLUU523, July 2011, 21 pp. TURCHI, J. Four Key Steps to Design a Continuous Conduction Mode PFC Stage Using the NCP1653 [on line]. AND8184/D, On

Semiconductor, 2004, 8pp., www.onsemi.com Z. Wei , N. R. Watson and L. P. Frater "Modelling of compact fluorescent lamps", Proc. 13th IEEE Int. Conf. Harmonics Qual. Power, pp.1 -

6, 2008 Zhu, Huiyu. New Multi-Pulse Diode Rectifier Average Models for AC and DC Power Systems Studies. PhD Thesis, Virginia Polytechnic

Institute and State University, 2005, 177 pp. http://scholar.lib.vt.edu/theses/available/etd-12202005-203239/unrestricted/complete_final.pdf ANSI C82.77-2002. Harmonic Emission Limits-Related Power Quality Requirements for Lighting Equipment. ANSI Lighting Group NEMA,

2002 IEC 61000-3-2 ed.3:2005. Electromagnetic compatibility (EMC) Part 3-2: Limits for harmonic current emissions (equipment input current


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Thank you for your attention

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