SPWM V/Hz inverter

8/10/2019 SPWM V/Hz inverter

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CHAPTER 1

INTRODUCTION

1.1 Background

After long debates in the past, it is proven that AC transmission and distribution is more

economical and reliable than DC. Hence, AC transmission and distribution is used widely

which has resulted in growing popularity of AC based appliances. AC can also be divided as

single phase or three phases. Three phase AC is more popular in high power application

while single phase is used in home appliances and low power systems.

Even though constant AC sources are readily available, in many cases we need to control the

frequency and magnitude of output voltage of the available AC source. peed Control of

induction motors, used in various appliances and machines li!e conveyer belt, air

conditioner, pumps, electric traction, etc is one of the e"amples where it is necessary to

control the frequency for controlling the speed of the motor to match the variable torque,

power and speed requirement. Due to robust and rugged structure, induction motors are more

popular than DC motors. #ut speed control of AC motor is not as simple as that of DC

motors due to comple" torque$speed Characteristics of AC induction motor. o, it requires

special control system li!e constant volt%H& 'nverter.

Constant volt%hert& inverter is the inverter which maintains the ratio of magnitude of output

AC voltage to frequency constant. This inverter finds its application for control of AC motor

drive which implements constant (%f speed control method. )ne of the most popular control

strategies used for variable AC output from inverter is *ulse +idth odulation -*+

technique which controls the duty cycle of the controller switches at high switching

frequency to achieve controlled AC output from inverter. 'n this pro/ect, sinusoidal *+

technique is used to control the magnitude of output AC voltage from the inverter

maintaining constant (%f ratio.

1.2 Objectie

To design and fabricate constant volt/hertz inverter

The ma/or ob/ective of this pro/ect is to develop a control strategy to change voltage when

frequency is varied e"ternally so as to maintain a constant volt%hert& inverter.

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1.! "co#e o$ t%e #roject

'n this pro/ect, there is provision of changing voltage by varying frequency e"ternally so as

to maintain a constant ratio of voltage to frequency ratio. This pro/ect is microcontroller

based and is easily controllable. 't has wide range of applications when employed forcontrolling speed of a three phase induction motor in industrial sectors.

1.& 'et%odo(og)

'n order to carry out the mentioned ob/ectives, the following methodology will be adopted0

1. *reliminary study of inverter, particularly constant volt%hert& inverter

2. imulations of constant volt%hert& inverter on AT3A#%imulin!

4. *rogramming *3A# software for ds*'C microcontroller

5. imulation of constant volt%hert& inverter in *roteus software to determine requiredparameters of the hardware using the microcontroller

6. Design and fabrication of hardware of the proposed scheme

7. Testing of fabricated hardware

8. 9inal report of the pro/ect illustrating activities and results obtained

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CHAPTER 2

IN*ERTER "+"TE'

2.1 *o(tage "ource Inerter ,*"I-

'nverter is an electrical converter system which is able to convert DC supply to AC output at

desired magnitude and frequency level. (oltage source inverter is the inverter topology

where independently controlled AC output is voltage signal. The AC output voltage from

inverter may be either fi"ed or variable. The input DC source may be fi"ed DC source or it

may be rectified from fi"ed AC source. This DC voltage is converted to AC by using

networ! of switches to alternate between positive and negative DC buses. Depending upon

the number of output phases, inverter may be single phase or three phase system.

2.2 Pu(e /idt% 'odu(ation ,P/'-

*ulse width modulation is the process of modifying the width of the pulse in pulse train in

direct proportion to small control signal. :reater the control voltage wider the pulse width

becomes and vice versa. #; using *+ techniques, the frequency spectra of inputwaveforms can be changed such that the ma/or non$fundamental components are at

relatively high frequency and also to reduce the switching stress imposed upon the power

switching devices. The high frequency components can be filtered by using low pass filters

so as to reduce the harmonic distortion at output.

*ulse +idth odulation -*+ refers to a form of signal modulation where data is

represented by the ratio of the )< time to the total time -!nown as the duty cycle. *+ has

the property where the instantaneous DC component

is directly proportional to the duty cycle.

9igure 2.1 shows the duty cycle and frequency of

*+. The relationship between the time average

voltage, (avg, the high and low voltage of the square

wave -(hi and (lo and the duty cycle -D in percent

is as follows0

(avg= -(hi> (lo ? D @ (offset

3

Figure 2.1 Duty Cycle and Frequency of

PW


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+here,

D=t ONt W

AndfPWM=

1t w

2.! 0eneration o$ "P/' uing Ana(og ")te

#asically there are two types of *+ techniques$ Analog ystem and Digital *+

technique. 9igure 2.2 shows the single phase half bridge topology of inverter. 'n Analog

*+ technique, which is also a conventional system, a carrier signal and modulating signal

are compared using a comparator and output of the comparator is desired *+ signal. 9or

sinusoidal *+ technique, the reference waveform is a sinusoidal wave and the carrier

waveform is triangular and hence the width of output *+ signal varies sinusoidally as

shown in figure 2. ine wave and Triangular waves are generated using analog techniques

and compared using a comparator. The output of the comparator is high when amplitude of

modulating sine wave is greater than carrier signal and vice versa as shown in fig 2.7.)utput

voltage amplitude can be controlled by controlling the odulation 'nde" of the system. The

frequency of the system can be varied by changing the frequency modulation inde".

4

Figure 2.2 !ingle "hase half bridge to"ology


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2.& 0eneration o$ t%ree #%ae *"I "P/' uing Digita( ")te

The proposed alternative approach is to replace the conventional method of generation of

*+ by the use of microcontroller. Digital *+ techniques are applied using

quanti&ation method. ost of the digital techniques employ counter and comparator based

system. Digital systems are more fle"ible, less sensitive to environmental noise and simpler

in construction in comparison to the analog techniques. Digital *+ technique can be

easily applied by using digital technologies li!e microcontroller.

9igure 2.5 shows the three phase topology of full bridge inverter. *+ can be generated

using digital logic equipments li!e microcontroller by using sine table. Complementary

*+ outputs are generated from a microcontroller using its *+ module. Altogether, thereare si" *+ channels with three *+ pairs configured in complementary mode for the

5

Figure 2.# !PW $eneration "rinci"le

Figure 1.% Three "hase &!' to"ology

V dc2


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three arms of the inverter. 'n complementary mode, if one of the *+ is high, the other is

low and vice$versa as shown in figure below. A certain programmable dead time is inserted

so that upper and lower switches of the H$bridge are not simultaneously )(DC%2. Therefore, 6 duty cycle corresponds

to average voltage of &ero volts averaged over a *+ period in complementary mode.

2.&.1 Uing (ooku# tab(e to generate ine 3ae

inusoidal waveform can be generated by using a loo!$up table. A loo!$up table contains,

sine values for a complete electrical cycle - to 47 degrees, normali&ed in the range $1 to 1.

The number of data points to be used depends upon the *+ frequency and the modulation

frequency i.e. frequency of sine wave to be generated. Also, too little points will cause a

staircaseB effect in the motor current waveform. The staircase effect will cause e"cessive

motor current distortion, which causes higher heat dissipation. Too many points will use

more memory of the microcontroller. A good rule of thumb is to divide ma"imum desired

modulation frequency by the *+ frequency.

'n this pro/ect, 267 points have been used in sine table for a 1 !H& *+ frequency and

ma"imum modulating frequency of 88.F8 H&.

6

PWMHPWML


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The sine values for the 267 different points can be evaluated by the e"pressionG

y [ i]=sin( 2 256 i)where, i = to 266

The sine values are read from the table at periodic interval, scaled to match the allowable

ranges of duty cycle, and then written to the duty cycle register. 'f any numerical value is put

in the duty cycle register then the microcontroller produces output *+ waveform of that

particular duty cycle.

At first, the data from table is first multiplied by 6 percent duty cycle value. The resulting

value is then multiplied by the value of )odulation inde *.' to change the average

voltage of through the variation of pulse widths. 9inally, 6 percent duty cycle value is then

added to ensure that resulting duty cycle value is positive.

ine tableiI = yiI ? 6 percent duty cycle ? .' @ 6 percent duty cycle

Figure 2.0 Diagra) shoing the scaling o"eration to generate the required duty cycle fro)

the sine table

9igure 2.7 shows the scaling process carried so that duty cycle values are obtained

sinusoidally. 9igure 2.8 shows the *+ signals for the upper and lower switch and shows

the variation of duty cycle over a completer electrical cycle for modulation inde" value of

one. 't can be seen that at &ero electrical degree of sine wave, the duty cycle of the high side

*+ is 6, therefore the average voltage is &ero for a *+ period as the lower switch is

also )


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switch is )


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9igure 2.J given shows the effect of changing the modulation inde" on the variation of pulse

width, thereby changing the amplitude of the fundamental voltage component.

Figure 2.4 Changing &)od through PW "attern here5 .' *a 6 .' *b 6 .'*c

2.&.2 C%anging t%e $re4uenc) o$ t%e ine 3ae

A variable called PhaseB is used as a 17$bit pointer to the sine table with "

representing and "9999 representing 47 . 3et us assume the sine table pointer is

ad/usted every *+ period. 'n other words, at each *+ interrupt, 9requencyB variable is

added to the *haseB. The value of Delta7PhaseB determines how fast the code moves

through the sinusoidal data table, and, as a result, sets the modulation frequency.

The 9requency variable is calculated as follows0

Deltaphase=216

Desired modulation frequency (Hz)

FPWM

9or e"ample, to get a 87 H& modulation frequency using 1 KH& *+ frequency

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Delta_phase = 216

7610000

=4!"07=4!

After the *hase variable has been ad/usted byDelta7Phase, two additional table pointers are

calculated for the 2ndand 4rdmotor phases by adding a constant offset to *hase. 9or a 17$bit

pointer, a value of "6666 provides 12 offset and a value of "AAAA gives a 25

offset.

2.5 'at%eatica( Ana()i

The ine *+ is implemented using a (' -(oltage ource 'nverter as shown in figure

2.5. At any instant, either the top or the bottom switch of a half bridge is on. Hence, the

resultant fundamental component of phase$to$neutral point )B voltage -(A), (#)and (C)

can be represented as0

Vi#=V dc2

Vif

+here i = A,#,C

(if represents the 4$phase waveforms shifted at an angle of 12 with one another. Each

phase waveform can be represented as shown below0

V $f = % sin&

V 'f = % sin (&)120*+

V ,f = % sin (&)240*+

V$O=V dc2

% sin&

V'O=V dc2

% sin (&)120*+

V,O=V dc2

% (&)240*+

The resultant line$to$line output voltage is given by0

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V $' = V $O-V'O =.(/+Vdc2

%sin (&)/0*+

V ', = V 'O-V ,O =.(/+V dc2

%sin(&)150*+

V ,$ = V,O-V $O =.(/+Vdc2

%sin (&)270*+

9rom the above equations, it is clear that the ma"imum line$to line voltage is achieved when

m=1

i . e . Mai%% line-t#-line #lta3e =./ Vdc2

2V ( 5%s ) = /V dc2

V 44 ( 5%s )= 0"612 (dc

V ph (%s ) =V (%s )

/=

0"612

/ V dc = 0"/54V dc

These equations are valid for modulation inde", '.I. 6 = 1. 9or any value of m, the

following equations will be valid.

V ( %s )= 0"612 % (dc

V ph (%s )=V (%s )

/=

% 0"612

/ V dc = 0"/54 % V dc

et s ass%e thatV5e6f5e6

=

+here ! = constantDividing both sides of equation -a by (ph-rms with m=1, we get

V e

V ph (%s )f=

V ph (%s )

#58 %=V5e6

V ph (5%s )=

V ph (5%s )f

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CHAPTER !

"I'U7ATION "TUDIE"

#efore carrying out activities in hardware, simulations were carried out in softwares such as

AT3A#%imulin! and *roteus. This chapter is mainly concerned with the simulations in

these softwares.

!.1 'AT7AB "iu(ation

AT3A# simulation was performed to test and confirm its implementation in a real

hardware. The ma/or components of the simulin! model as shown in figure 4.1 are given

below0

1. Cloc!

2. *rogramming bloc!

4. *+ generator bloc!

1. C(ock8This bloc! is used to provide current simulation real time for the program.

2. Prograing b(ock8't is a bloc! where program can be written. This bloc! is used

in this model for specifying modulation inde" and frequency input to the *+

generator bloc!.

!. P/' generator b(ock8This bloc! generates sinusoidal *+ signals for )9ETs

used in the three phase H$bridge.

Constant (%f *+ generator bloc! simulates the wor!ing of microcontroller, which

generates constant (%f *+ outputs. +ith the help of programming bloc!, required (%f

ratio and output as per the real time could be obtained and modulation inde" and frequency

are fed to *+ generator, which generates sine *+ signals to provide it to the gates of

the inverter.

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Figure #.1 Constant &/f PW generator bloc,

Figure #.2 'nverter bridge

9igure 4.2 shows the inverter bridge which comprises of si" )9ET. The gating signals

generated from the *+ generator are fed to the gates of the )9ET bloc!s. The three

phase outputs are fed to the three phase load. Here three phase load is ta!en as resistive.

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Programming

!

"


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Figure #.# 8ut"ut avefor)s

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3.2 Software realization

#min $ minimum r&'u&ncy to b& g&n&rat&dM(min$minimum modulation ind&)#ba*&$ arbitrarily *&t r&'u&ncy

Flowchart of the process used in constant Volt-hertz inverter

+

16

,&t Modulation (nd&) $

M(min

-&n&ration o t.& r&'uir&d PWM

/a&orm* ba*&d on t.& calculat&d

dut c cl&*

omutation o duty cycl&* or t.& *i)

PWM /a&orm* rom t.& ,in& loou

tabl& ba*&d on and M(

alculation o Modulation (nd&)M( $ .ma): ;

(* ?min >

#r&'u&ncy : inut rom

,tart

(nitiali@ation o con*tant ratio :

A&*

A&*

Bo

,&t Modulation (nd&) $

Bo


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!.! Proteu "iu(ation

After performing simulations on AT3A#, further simulations were carried out on *roteus.

#efore this, programming was done in *3A# and the he" code, thus generated after

compilation of the source code, was loaded in the microcontroller. The layout of *roteussimulation is shown in figure 4.5. The load used in this simulation is three$phase resistive

load. The *+ waveforms generated from the microcontroller are shown in the figures 4.6.

Figure #.% 9ayout for Proteus !i)ulation

Figure #.( PW signal generation fro) )icrocontroller ith PW frequency of 1+ ,-z17


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'n figure 4.6, *+H1 and *+31 are complementary *+ outputs from the

microcontroller for producing gate signals for the first arm of the three$phase H$bridge.

imilarly, *+H2 and *+32 are complementary *+ outputs from the microcontroller

for producing gate signals for the second arm of the bridge. 9igure 4.7 and 4.8 show the

output waveforms.

Figure #.0 9ine:to:line voltage avefor)

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Figure #.3 9ine:to:neutral voltage avefor)

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RECTIFIER !SFET I"VERTER #RI$%E

IS!&'TI!" CIRC(IT

ICR!C!"TR!&&ER

'C )!*ER S())&+

$C V!&T'%E &I", S())&+ 'C V!&T'%E

TREE )'SE &!'

CHAPTER &

HARD/ARE DE"I0N AND 9ABRICATION

&.1 Decri#tion o$ t%e #ro#oed c%ee

This scheme is design of the three phase inverter to drive or supply any load which required

constant (%9 such as induction motor. This drive generates the output voltage in proportion

to the output frequency to provide a relatively constant ratio of voltage to frequency -(%H&.

inusoidal pulse width modulation -*+ is widely used in power electronics to digiti&e

the power so that a sequence of voltage pulses can be generated by )< and )99 of the

power switches. The pulse width modulation inverter is simple and provides better control

scheme. *+ techniques are characteri&ed by constant amplitude pulses with different

duty cycle for each period. The width of this pulses are modulated to obtain inverter output

voltage control and to reduce its harmonic content. To generate this signal, triangular wave is

used as a carrier signal and is compared with sinusoidal wave, whose frequency is the

desired frequency. The proposed alternative approach is to replace the conventional method

with the use of microcontroller. The use of microcontroller brings the fle"ibility to change

the real$time control algorithms without further changes in hardware. 't is also low cost and

has a small si&e of control circuit for the three phase full bridge inverter. The microcontroller

has the built in dead time control circuit and various other features to control pwm signals.

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Figure %.1 ;loc, diagra) of the "ro"osed sche)e

a. Recti$ier8The first step in this process is to convert the AC supply voltage into DC by the

use of a rectifier. DC power contains voltage ripples which are smoothed using filter

capacitors. This section of the (9D is often referred to as the DC lin!. 'n our pro/ect,

rectifier is not used. 'nstead, dc supply is directly ta!en from the available dc ban!.

b. 'O"9ET Inerter Bridge8 This DC voltage is then converted bac! into AC. This

conversion is typically achieved through the use of power electronic devices such as ':#T

power transistors or )9ETs using a technique called *ulse width odulation -*+.

The output voltage is turned on and off at a high frequency, with the duration of on$time, or

width of the pulse, controlled to appro"imate a sinusoidal waveform. The )9ET inverter

bridge has 7 switches that are controlled in order to generate 4$phase AC output from the DC

bus. *+ signals, generated from the microcontroller, control these 7 switches. witches

H1 through H4 are upper switches. witches 31 through 34 are lower switches. The

amplitude of phase voltage is determined by the duty cycle of the *+ signals. 'n this

configuration, three out of si" switches will be on at any given timeG either one upper and

two lower switches or one lower and two upper switches. The switching produces a

rectangular shaped output waveform that is rich in harmonics. +hen switches are turned off,

the inductive nature of the load oppose any sudden change in direction of flow of the current

until all of the energy stored in the load is dissipated. To facilitate this, fast recovery diodes

are provided across each switch. These diodes are !nown asfreeheeling diodes.

21

TREE

)'SE

&!'$L1

H1

L2

H3

L3

H2


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Figure %.2 8!F


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needs to be isolated to protect from overvoltage damage. )ptocoupler can provide such

isolation. 't is also !nown as optoisolators.

)ptocouplers are basically small electronics device which

facilitates the transmission of electrical signal between two

parts of a system while !eeping them electrically isolated. They use

beam of light to transmit the signal while maintaining e"cellent

isolation. #asically, there are two parts of optocoupler0 an optical

transmitter -3ED and an opto$receiver -phototransistor separated by transparent barrier

which allows light to pass through it but does not allow any electrical transmission. The

main purpose of an opto$isolator is to prevent high voltages or rapidly changing voltages on

one side of the circuit from damaging components or distorting transmissions on the other

side. Commercially available opto$isolators can withstand input$to$output voltages up to 1

!(.

They are best for transmitting *+ signals with frequent switching. 'n this pro/ect, high

speed 7


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Enhancement mode )9ET has been used in our pro/ect for switching electronic signals.

Enhancement mode)9ET can be ta!en as a switch as these transistors require a positive

gate voltage to turn < and a &ero voltage to turn 99 ma!ing them easily understood as

switches and also easy to interface with logic gates.

The operation of the enhancement mode )9ET can best be described using its '$(

characteristics curves shown below. +hen the 'nput voltage, -(in to the gate of the transistor

is &ero, the )9ET conducts virtually no current and the output voltage -( out is equal to

the supply voltage -(DD. o the )9ET is fully$)99 and in its cut$off region.

The minimum )


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toggles between two values, high and low the )9ET well behave as a single$pole single$

throw -*T solid state switch.

Cut o$$ region

Here the operating conditions of the transistor are &ero input gate voltage -( '


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After successful implementation of the proposed scheme in softwares, design and fabrication

of hardware was carried out. ome of the pictures of the hardware are shown below0

Figure %.4 Fabrication of -ardare *icrocontroller Part

9igure 5.F shows microcontroller part. The microcontroller part is a low voltage part of the

pro/ect. 'n order to vary frequency, a potentiometer was used as shown in the above figure.

The voltage developed in potentiometer is fed to the microcontroller which by means of its

ADC -analog$to digital converter converts the analog signal -i.e. voltage into digital signal

to be used internally for calculating frequency. The *+ signals generated from the

microcontroller is fed to the three phase part as shown in the figure 5.2 via *+ channels of

26

PWM "CDPCD, #E"M

M(E""BDE"LL!E

#E!FC!BA GEA(B-

B"

LM317

"LDG-!

E!-CLGD"E

I,P(

M(E"B"BDE"LL!E


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pro/ect. The output waveforms were similar to those observed in softwares such as

AT3A# and *roteus.

Figure %.1+ Co)"le)entary PW out"uts

Figure %.11 Co)"lete train of "ulses for a co)"lete cycle ith co)"le)entary out"uts

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Figure %.12 9ine to neutral voltage avefor)

Figure %.1# 9ine:to:line voltage avefor)

&.!.1 E:#erient reu(t

*ower analy&er was used to chec! if constant volt%hert& ratio was being maintained at output

of the inverter. The ratio of fundamental rms phase voltage to frequency -(%f was set at

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.17 in the code of the microcontroller. The observations of the e"periment are tabulated

below in Table 5.10

DC bus voltage, -(dc = 16 (

9or odulation 'nde" -.'. =1

Mai%% fnda%ental line-t#-line #lta3e (V += 0"612 V dc = "1! V

a"imum fundamental *hase (oltage -(ph1 =6.4 (

Table 5.1

.


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.


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Constant volt%hert& 'nverter system was successfully designed as per the aim of pro/ect. #ut

still we can improve the performance of this system by further study and enhancement. This

system can also be used to drive three phase induction motor with few enhancements and

proper protection system. The following are suggestions for future enhancement for better

performance and reliability of the system0

#y employing e"tra protection system -a better snubber circuits for )9ET

switching circuit, the reliability of the system can be increased.

This system can be used for speed control mechanism of AC induction drive after

considering the ma"imum voltage and current level which the system can handle.

)9ETs with better static and dynamic characteristics can be used to increase

switching efficiency and hence the overall efficiency of the system.

'solation circuit with optocoupler of better rise and fall time can be used to preventlosses of pulse during *+ signal transfer.

#y adding proper filter circuits, the quality of output can be increased for driving

both resistive and inductive loads.

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BIB7IO0RAPH+

uhammad H. Nashid -21, *ower Electronics Handboo!, Academic *ress

*rof. Dr. 'ndra an Tamra!ar, A Course anual on *ower Electronics Application notes of various *'C provided in )fficial icrochip website

www.microchip.com

Datasheets of )9ETs and )9ET drivers provided in )fficial 'nternational

Nectifier website www.irf.com

www.alldatasheets.com

33
http://www.microchip.com/http://www.irf.com/http://www.alldatasheets.com/http://www.irf.com/http://www.alldatasheets.com/http://www.microchip.com/


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1PC&bits'931P 3= // Set 9imer3 1nterrupt Priorit< Le)el1!S0bits'931! 0= // Clear 9imer3 1nterrupt !lag1.C0bits'931. 0= // .nable 9imer3 interrupt93C-bits'9- 7= // Start 9imer3

/NA4C 1191AL1OA91- !-+ C6A.L SCAN/)oid initAdc7)oid2I

A47C-7bits'!-+M 0b00= // 4ata -utput !ormat> integerA47C-7bits'SS+C 0b070= // Sample Clock Source> ?P 9imer

starts con)ersionA47C-7bits'ASAM 7= // A4C Sample Control> Sampling beginsimmediatel< after con)ersion

A47C-7bits'A47&B 0= // 70;bit A4C operation A47C-&bits'C!? 0b000= //A44*ASS

A47C-&bits'CSCA 7= // Scan 1nput Selections for C60Qduring Sample A bit

A47C-&bits'C6PS 0= // Con)erts C60 A47C-&bits'AL9S 0= //alwa


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asmmo) ,A4C7B!0*832= //+ead the A4C results into 83 >>suppose the potis set at 700T* then A4C7B!0 reads //70&3d decimalasmasr 83*7*8#2=// +ight shift b< 7 bits to get the freFuenc> this statement //di)ides it b< &''ie70&3/&K77 decimal and this number is the freFuenc< K77N700002/JKK3J 'D& 6Rso the //highesh freF b< this method is 'D& 6R'' So* if we use 70hR

freF* we can achie)e 'D 6R maEimum freF using this //algorithmasmmo) 8#*,!reFuenc>suppose the pot is set at 700T* then A4C7B!7 reads//70&3 decimalasmsl 8#*K*8#2=// Left shift B< K to get 7K )alue inthe range >>multipl< b< &UK or b< 3& to transform the//freFuenc< to the range 0 to 3&J in fractional format to be usedbelow for MP" instruction2asmmo) 8#*,Modulation2=

N/ if!reFuenc7

P79C-bits'P9-PS 0b00=// Choose P8M time period based on input clock selected// +efer to .Fuation 7#;7// P8M switching freFuenc< is &0 k6R// !C" is #0 M6R// P79P.+ !C"/!pwmN7N&22;7 7000DDDP79P.+ 7DDD=// P8M 1/- pairs 7 to 3 are in complementar< mode// P8M pins are enabled for P8M outputP8M7C-7bits'PM-47 0=P8M7C-7bits'PM-4& 0=P8M7C-7bits'PM-43 0=P8M7C-7bits'P.76 7=P8M7C-7bits'P.&6 7=P8M7C-7bits'P.36 7=P8M7C-7bits'P.7L 7=P8M7C-7bits'P.&L 7=P8M7C-7bits'P.3L 7=P8M&C-7bits'P.76 0= //P8M module & used as general i/oP8M&C-7bits'P.7L 0=// s


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// Clock period for 4ead 9ime nit B is 9c"P749C-7bits'49APS 0b07=P749C-7bits'49BPS 0b07=// 4ead time )alue for 4ead 9ime nit B and nit AP749C-7bits'49A #K=P749C-7bits'49B #K=// 9c< N & N #K &'&K usec

// 4ead 9ime nit selection for P8M signals// 4ead 9ime nit A selected for P8M acti)e transitions// 4ead 9ime nit B selected for P8M inacti)e transitionsP749C-&bits'49S3A 0=P749C-&bits'49S&A 0=P749C-&bits'49S7A 0=P749C-&bits'49S31 7=P749C-&bits'49S&1 7=P749C-&bits'49S71 7=// P8M 1/- pin controlled b< P8M ?eneratorP7-4C-bits'P-436 7=P7-4C-bits'P-4&6 7=P7-4C-bits'P-476 7=

P7-4C-bits'P-43L 7=P7-4C-bits'P-4&L 7=P7-4C-bits'P-47L 7=// 1nitialiRe dut< c


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asmM-'B w3* Gw7H2= // 8rite 0EDA2=//=Set ew -scillator SelectionasmM-'B w0* Gw7H2=//= Place 0E07 in 80 for setting clock switch enabled bitasmM- 0E07* w02=//=-SCC-L low b if -S8.0 then oscillator switch is complete=

PM43bits'P8M&M47=//there is simulation problem in proteus during Pll*ie in lock and oswenbut works in hardware//which means proteus canWt simulate PLL mode using eEternal oscillator *but it simulates if clock is set in !+CPLLinit,P8M2=initAdc72=init1nterrupts2= while72Idela


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asmmp< 8KN8*A2= //Multipl< b< theP8M scaling factor

asmsac A*8:2= //Store the scaled resultasmadd 8*8:*8:2= //Add the P8M scaling

factor to produce K0T offsetasmmo) 8:*,P74C72= //8rite the P8M dut< c


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APPENDI; B

DATA"HEET" O9 "O'E O9 THE CO'PONENT" U"ED

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dPIC!!9


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O#tocou#(er> O#toio(ator ,?N1!@-

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Po3er 'O"9ET ,IR9&=A-

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'O"9ET drier ,IR"211=-

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Figure Pin Configuration of 8!F


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SPWM V/Hz inverter

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