Software Defined Radio Development using a Network-On-Chip based Rapid Prototyping Platform
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Transcript of Software Defined Radio Development using a Network-On-Chip based Rapid Prototyping Platform
Dr. N. D. Gohar
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Start Date: 05/01/2008
Completion Date: 05/01/2012
Duration: 4 Years
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Deliverable Number
Due Date Elapsed Time (months)
Deliverable
1 01/08/08 3 Lab Setup and Manpower Recruitment
2 01/11/08 6 Kernel Definitions and Block Level Documentation of REXAPP Platform for SDR
3 01/05/09 12 Designed MATLAB/Simulink Kernels (RECEIVER End)
4 01/11/09 18 Designed MATLAB/Simulink Kernels (TRANSMITTER End)
5 01/05/10 24 REXAPP Compiler (Conceptual Block-Level Specification)
6 01/11/10 30 REXAPP Compiler (Complete with Source Code)
7 01/05/11 36 Synthesized Kernels for SDR
8 01/11/11 42 System Level Software/Hardware
9 01/05/12 48 Complete REXAPP Platform for SDR
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Deliverable Number
Due Date Elapsed Time (months)
Deliverable Status
1 01/08/08 3 Lab Setup and Manpower Recruitment
Submitted
2 01/11/08 6 Kernel Definitions and Block Level Documentation of REXAPP Platform for SDR
Submitted
3 01/05/09 12 Designed MATLAB/Simulink Kernels (RECEIVER End)
Merged with Deliverable 4 and is expected to be completed by 01/08/2009
4 01/11/09 18 Designed MATLAB/Simulink Kernels (TRANSMITTER End)
5 01/05/10 24 REXAPP Compiler (Conceptual Block-Level Specification)
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6 01/11/10 30 REXAPP Compiler (Complete with Source Code)
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7 01/05/11 36 Synthesized Kernels for SDR Completed Some OFDM kernels
8 01/11/11 42 System Level Software/Hardware
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9 01/05/12 48 Complete REXAPP Platform for SDR
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Installment #
Due DateInstallment Amount
Status
1 May 2008 Rs. 2,649,857/- Released
2 August 2008 Rs. 618,000/- NOT Released
3 February 2009 Rs. 2,652,000/- NOT Released
4 August 2009 Rs. 1,308,000/- NOT Released
5 February 2010 Rs. 908,000/- NOT Released
6 August 2010 Rs. 2,268,000/- NOT Released
7 February 2011 Rs. 1,699,385/- NOT Released
8 August 2011 Rs. 1,955,020/- NOT Released
9 February 2012 Rs. 1,920,703/- NOT Released
Total Rs. 14,666,925/-
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Breakdown of Installment 1 (18% of Rs. 14,666,925/-)
Technical HR Development Cost
Rs. 1,163,160/-
Equipment Rs. 841,414/-
Travelling Rs. 324,000/-
Miscellaneous Rs. 35,998/-
Audit Charges Rs. 11,822/-
Contingency Rs. 23,644/-
University Fund Rs. 239,962/-
Total Rs. 2,640,000/-
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Expenditure
Head Amount Expenditure
Technical HR Development Cost
Rs. 1,163,160/- Rs. 380,702/-
Equipment Rs. 841,414/- Rs. 937,501/- (Rs. 867,506/- + Rs. 69,995/-)
Travelling Rs. 324,000/- Rs. 167,672/-
Miscellaneous Rs. 35,998/- -
Audit Charges Rs. 11,822/- -
Contingency Rs. 23,644/- -
University Fund Rs. 239,962/- -
Bank Profit Rs. 67,108/- Rs. 470/-
Total Rs. 2,707,108/- Rs. 1,486,345/-
Project Team of NUST ResearchersResearcher Status TaskJamshaid Sarwar Malik PhD Scholar Design and development of hardware radio
channel modelsfor the REXAPP platform
Nasir Mehmood PhD Scholar Design and Development of the high-level compiler for theREXAPP
Saba Zia Lab Engineer Design and Implement OFDM physical layer on FPGA
Shahnawaz BE Scholar Design and FPGA Based Implementation of a CCKCorrelator Block for DSSS technique in IEEE 802.11g
Yasir Habib BE Scholar Design and FPGA Based Implementation of a CommonKernel for Channel Coding/Decoding Techniques for Wireless LAN, WiMAX and DVB-H
Muhammad Uzair BE Scholar Design and FPGA Based Implementation of a CommonKernel for Channel Coding/Decoding Techniques forWireless LAN, WiMAX and DVB-H
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Project Team of KTH Researchers
Researcher Status TaskMohammad Ali Shami PhD Scholar Implementation of DRRA
architecture to be used for theSDR platform.
Omer Malik PhD Scholar Design and Development of the high-level compiler for theREXAPP
Kashif Javed MS Scholar Development of reconfigurable Matlab Kernels for thefollowing standards:• CDMA-95• CDMA-200• WCDMA• 802.11• 802.16• DVB-H
Sohail Asghar MS Scholar Design and development of baseband equivalent models forRF front-end
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Successful completion of the project will enable, enhance and expedite development of SDR targeting 4G technologies and beyond, Smart Antennas and Multi-media standards.
Advanced SDR labs established at NIIT Quality manpower in the field of
SoC/SoPC/ASIC design for RF communication will be produced and will help in establishing design houses in Pakistan.
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