Software Defined Radio - California State University...

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1 Software Defined Radio GNU Radio and the USRP 2 Overview What is Software Defined Radio? Advantages of Software Defined Radio Traditional versus SDR Receivers SDR and the USRP Using GNU Radio 3 Introduction What is Software Defined Radio (SDR)? Getting code as close to the antenna as possible Replacing hardware with software for modulation/demodulation Advantages: Makes communications systems reconfigurable (adapting to new standards) Flexible (universal software device - not special purpose) Filters/Other Hardware Cognitive Radio

Transcript of Software Defined Radio - California State University...

Page 1: Software Defined Radio - California State University ...vfeen0br/katzpage/sdr_project/sdr/sdr_intro.pdf · What is Software Defined Radio (SDR)? Getting code as close to the antenna

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Software DefinedRadio

GNU Radio and theUSRP

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Overview

What is Software Defined Radio?

Advantages of Software Defined Radio

Traditional versus SDR Receivers

SDR and the USRP

Using GNU Radio

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Introduction What is Software Defined Radio (SDR)?

Getting code as close to the antenna as possible Replacing hardware with software for

modulation/demodulation Advantages:

Makes communications systems reconfigurable(adapting to new standards)

Flexible (universal software device - not specialpurpose)

Filters/Other Hardware Cognitive Radio

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Traditional Receiver

LocalOscillator

RF Amplifier

IF Amplifier

x Demod-ulator

fc

fLO

|fLO-fc|fLO+fc

f (KHz)530 1700980

10 KHz

f (KHz)530 1700980

10 KHzf (KHz)

455

10 KHz

fLO=1435 KHz

455f (KHz)

10 KHzf (KHz)

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Traditional vs. SDR Receiver

RF Amplifier

IF Amplifier

x Demod-ulator

LocalOscillator

Receiver Front End

Traditional/ HardwareReceiver

SoftwareReceiver Front End ADCCurrentSDRReceiver

SoftwareADC

FutureSDRReceiver ?

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SDR Receiver Using the USRP

Receiver Front End ADC USB

ControllerFPGA PC

Daughterboard Motherboard

similar to traditionalfront end with fIF = 0

Decimation,MUX, +

Interface to PC

GNU Radiosoftware

USRP: Universal Software Radio Peripheral

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Quadrature SignalRepresentation

The received signal, S(t), may be represented as follows:

S(t) = I(t)cos(2! fct) +Q(t)sin(2! fct)

fc = carrier frequency

I(t) = in-phase component

Q(t) = quadrature component

Contain amplitudeand phaseinformation ofbaseband signal

•GNU Radio software uses I and Q components todemodulate signals•USRP front end translates the signal to zero frequencyand extracts I and Q

a

f (MHz)446

16 KHz

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Extracting I(t) from S

S(t) = I(t)cos(2! fct) +Q(t)sin(2! fct)

S(t)cos(2! fct) = I(t)cos2(2! fct) +Q(t)sin(2! fct)cos(2! fct)

=I(t)

21+ cos(4! fct)[ ] +

Q(t)

2sin(4! fct) + sin(0)[ ]

=1

2I(t) +

1

2I(t)cos(4! fct) + +

1

2Q(t)sin(4! fct)

Multiplying both sides by cos(2πfct):

Applying this signal to a low pass filter, the output will be:1

2I(t)

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Extracting Q(t) from S

S(t) = I(t)cos(2! fct) +Q(t)sin(2! fct)

S(t)sin(2! fct) = I(t)cos(2! fct)sin(2! fct) +Q(t)sin2(2! fct)

=I(t)

2sin(4! fct) " sin(0)[ ] +

Q(t)

21" cos(4! fct)[ ]

=1

2I(t)sin(4! fct) +

1

2Q(t) "

1

2Q(t)cos(4! fct)

Multiplying both sides by sin(2πfct):

Applying this signal to a low pass filter, the output will be:1

2Q(t)

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USRP Receiver Front End

RFAmplifier

x LPF

90°

x LPF

LOfc

I

Q

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Analog to Digital Converter(ADC) 12 bit A/D Converter (212 levels) 2 volt peak-peak maximum input 64 Msamp/second

ADC

∆t

!t =1

64 "106= 0.0156µS !v =

2

212= 0.488mV

Quantization Levels:Sampling Interval:

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Decimation Original sampling rate is 64Msamp/sec Converts a portion of spectrum 32 MHz wide Generally we are interested is a narrower portion of the

spectrum requiring a lower sampling rate USB cannot handle that high data rate Occurs in the FPGA of the USRP

a

f32MHz

LPFf

250KHz

Downsample divide by 128

f250KHz

fs = 64Msamp/sec fs = 64Msamp/sec fs = 500Ksamp/sec

64M

500K= 128

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SDR Receiver with USRP

ADC

FPGA(Decimator,MUX, etc.)

USBController PC

I

Q

Daughterboard Motherboard

GNURadio

Software

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USRP -Motherboard/Daughterboard

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GNU Radio Software Community-based project started in 1998 GNU Radio application consists of sources (inputs), sinks

(outputs) and transform blocks Transform blocks: math, filtering,

modulation/demodulation, coding, etc. Sources: USRP, audio input, file input, signal generator,

… Sinks: USRP, audio output, file output, FFT, oscilloscope,

… Blocks written in C++ Python scripts used to connect blocks and form application

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Design of a Receiver

USRP: Set frequency of local oscillator (receivefrequency), gain of amplifier, decimation factor

GNU Radio application: use Python to specifyand connect blocks that perform demodulationand decoding

USRP GNU Radio Application

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Example: 400 - 500 MHz NBFMReceiver Problem: Receive an audio signal (up to 4

KHz) transmitted at 446 MHz usingnarrowband FM (NBFM) with a 16 KHztransmission bandwidth

USRP GNU Radio Application

a

f (MHz)400 500446

16 KHz

a

f4KHz

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Design Procedure

1. Plan the block diagram of systemcomponents

2. Determine block parameters3. Determine decimation rates4. Write Python script to specify the blocks

and connect them together

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NBFM Receiver: BlockDiagram/Parameters

a

f (MHz)400 500446

16 KHz

Daughterboardfc = 446 MHz

f (MHz)

16 KHz

ADC64 Msamp/sec

f (MHz)

16 KHz

32-32

FPGADec. factor = ?

f (MHz)

16 KHz

?-?

Channel Filtercutoff = 8KHzDec. factor = ?

f (KHz)

16 KHz

?-? 8-8

FMDemodulator

Dec. factor = ?

f (KHz)4-4

Audio

FM

USRP PC

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Determining the DecimationFactors

64Msamp/sec 8Ksamp/sec

Total Decimation factor = 8000 = D1D2D3

a

f (MHz)

16 KHz

32-32

FPGADec. factor =

D1

Channel Filtercutoff = 8KHzDec. factor =

D2

FMDemodulatorDec. factor =

D3f (KHz)

4-4

Audio

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FPGA Decimation Factor, D1

•Total Decimation factor = 8000 = D1D2D3

•Maximize the decimation in FPGA

•Maximum decimation factor in FPGA = 256

•Select D1 = 250 (factor of 8000)

•Output sample rate = 64Ms/s / 250 = 256Ks/s

a

f (MHz)

16 KHz

32-32

FPGADec. factor =

D1

Channel Filtercutoff = 8KHzDec. factor =

D2

FMDemodulatorDec. factor =

D3f (KHz)

4-4

Audio

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Channel Filter Specification

•Maximum frequency = 16 KHz Reduce sample rate to 32 Ks/s

•256Ks/s / 32Ks/s D2 = 8

a

f (MHz)

16 KHz

32-32

FPGADec. factor =

250

Channel Filtercutoff = 8KHzDec. factor =

D2

FMDemodulatorDec. factor =

D3f (KHz)

4-4

Audio

f (KHz)

16 KHz

128-128

64Ms/s

256Ks/s

a

H (dB)

f (KHz)-60

-16 16-9 9-8 8

-0.10

Channel Filter

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FM Demodulator

•Maximum frequency = 4 KHz Reduce sample rate to 8 Ks/s

•32Ks/s / 8Ks/s D3 = 4

•FM Demodulator block “extracts” audio signal from FM waveform by

operating on I and Q

a

f (MHz)

16 KHz

32-32

FPGADec. factor =

250

Channel Filtercutoff = 8KHzDec. factor = 8

FMDemodulatorDec. factor =

D3f (KHz)

4-4

Audio

f (KHz)

16 KHz

128-128

64Ms/s

256Ks/s

f (KHz)

16 KHz

-16 8-8

FM

1632Ks/s

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Complete Application Design

•Total decimation ratio = 250*8*4 = 8000

•Problem: The audio card requires an input sample rate ≥ 44.1 Ks/s

•Solution: Use a Resampler to increase the output sample rate

a

f (MHz)

16 KHz

32-32

FPGADec. factor =

250

Channel Filtercutoff = 8KHzDec. factor = 8

FMDemodulatorDec. factor = 4 f (KHz)

4-4

Audio

f (KHz)

16 KHz

128-128

64Ms/s

256Ks/s

f (KHz)

16 KHz

-16 8-8

FM

1632Ks/s

8Ks/s

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Final Application Design

•Audio Card requires a sample rate ≥ 44.1 Ks/sec. Use 48 Ks/sec.

•Modify FM Demodulator to have a decimation factor of 1 (no change)

•Increase the sample rate to 48 Ks/sec with Resampler (x 3/2)

a

FPGADec. factor =

250

Channel Filtercutoff = 8KHzDec. factor = 8

FMDemodulator

Dec. factor = 148Ks/s

Resamplermult by 3div by 2

32Ks/s32Ks/s256Ks/s64Ms/s

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Implementing the Design Create a Python script to specify and

connect the various GNU radio blocks Blocks are already written in C++ USRP parameters are set within Python

script # indicates that the line is a comment Refer to nbfm.py script

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Setting the USRP Parameters The following code sets the USRP

Parameters:

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Channel Filter Design

The following code specifies the channelfilter and computes the coefficients

a

H (dB)

f (KHz)-60

-16 16-9 9-8 8

-0.10

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Channel Filter Creation The following code creates the channel filter

using the coefficients computed:

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FM Demodulator The following code creates the FM demodulator. The demodulator block also includes a low pass

filter.

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Resampler The following code creates the resampler. The resampler decimates and/or interpolates the

data to adjust the sample rate.

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Connecting the Blocks

The following code connects the blocks:

Or, a single connect statement:

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Final Thoughts

Demonstration Storing/creating data Transmitters Installing GNU radio Questions Where do we go from here?