X+/-

D

EN

>> 17

A[17:0]

B[17:0]

SN-1[43:0]

C[43:0]

SHIFT17

SEL_CASC

SN[43:0]

OVFL

ADD_SUB

0

LUT4A

B

C

D

LUT_BYPEN

CLKRST

LO

RO

CIN

CO

D

EN

SL

SYNC_SR

SmartFusion®2 SoC FPGAs

ARM® Cortex™-M3 | HS USB OTG | 10/100/1000 Ethernet | PCI Express Gen2 | Up to 150K LEs

More Resources in Low-Density Devices

Lowest Power

Proven Security

Exceptional Reliability

2

SmartFusion2 SoC FPGAs

Microsemi SmartFusion2 SoC FPGAs Offer More Resources in Low-Density Devices with the Lowest Power, Proven Security, and Exceptional Reliability

Communications Industrial Defense Automotive

More Resources in Low-Density Devices • ARM Cortex-M3 with embedded flash • PCIe Gen2 support in 10K LE • Comprehensive microcontroller subsystem

With Clear Advantages• Lowest Power

• Reduces total power by up to 50% • 70 mW per 5G SERDES (PCIe Gen2)

• Proven Security• Protection from overbuilding and cloning• Secure boot for FPGA and processors

• Exceptional Reliability• SEU immune zero FIT flash FPGA configuration• Reliable safety-critical and mission-critical systems

These devices are ideal for general purpose functions such as Gigabit Ethernet or dual PCI Express control planes, bridging functions, input/output (I/O) expansion and conversion, video/image processing, system management, and secure connectivity. Microsemi FPGAs are used by customers in the communications, industrial, medical, defense, and aviation markets.

SmartFusion2 Advantages

3

AES Advanced Encryption Standard MDDR DDR2/3 Controller in MSS

AHB Advanced High-Performance Bus MMUART Multi-Mode UART

APB Advanced Peripheral Bus MPU Memory Protection Unit

AXI Advanced eXtensible Interface MSS Microcontroller Subsystem

COMM_BLK Communication Block SECDED Single Error Correct Double Error Detect

DDR Double Data Rate SEU Single Event Upset

DPA Differential Power Analysis SHA Secure Hashing Algorithm

ECC Elliptical-Curve Cryptography SMC_FIC Soft Memory Controller

EDAC Error Detection And Correction TSE Triple Speed Ethernet (10/100/1000 Mbps)

ETM Embedded Trace Macrocell ULPI UTMI + Low Pin Interface

FDDR DDR2/3 controller in FPGA fabric UTMI USB 2.0 Transceiver Macrocell Interface

FIC Fabric Interface Controller WDT Watchdog Timer

FIIC Fabric Interface Interrupt Controller XAUI 10 Gbps Attachment Unit Interface

HS USB OTG High-Speed USB (2.0) On-The-Go XGMII 10 Gigabit Media Independent Interface

IAP In-Application Programming XGXS XGMII Extended Sublayer

MACC Multiply-Accumulate

MPU

eNVM

ETM

D

I

S

ARM® Cortex™-M3 InstructionCache

DDRBridge

DDR User I/OMulti-standard User I/O (MSIO)SPI I/OJTAG I/O

AHB Bus Matrix (ABM)

SYSREG

COMM_BLK

Interrupts APB AHB AHB SMC_FIC Con�g AXI/AHB

HS USBOTG ULPIPDMAAPB

HPDMAeSRAMTSE MACFIC_1FIC_0

SPI x 2MMUART x 2

I2C x 2Timer x 2

Microcontroller Subsystem (MSS)

SHA256 SRAM-PUF

System Controller

SmartFusion®2 SoC FPGA

NRBGIn-ApplicationProgramming

FPGA Fabric (Up to 150K Logic Elements)

AES256

Flash*Freeze

ECC

MSSDDR Controller

+ PHY

Serial 0 I/O Serial 1 I/O DDR User I/O

Con�g AXI/AHB/XGXS

PLLs

Micro SRAM(64x18)

Micro SRAM(64x18)

Con�g AXI/AHB/XGXS Con�g AXI/AHB

Serial Controller 0(PCIe, XAUI/XGXS)+ Native SERDES

Serial Controller 1(PCIe, XAUI/XGXS)+ Native SERDES

Fabric DDRController + PHY

Standard Cell/SEU Immune

Flash Based/SEU Immune

Large SRAM(1024x18)

Math BlockMACC (18x18)

OSCs

WDT

CAN

RTC

FIIC

Large SRAM(1024x18)

Math BlockMACC (18x18)

Mul

ti-st

and

ard

Use

r I/

O (M

SIO

) Multi-stand

ard U

ser I/O (M

SIO

)

SmartFusion2 SoC FPGAs offer 5K–150K LEs with a 166 MHz ARM Cortex-M3 processor, including ETM and instruction cache with on-chip eSRAM and eNVM and a complete microcontroller subsystem with extensive peripherals, including CAN, TSE, and USB.

SmartFusion2 FPGA Architecture

• Up to 16× transceiver lanes

• PCIe Gen2, XAUI/XGXS+, generic (EPCS) mode at 3.2G

• Up to 150K LEs, 5 Mbit SRAM, 4 Mbit eNVM

• Hard 667 Mbps DDR2/3 controllers

• Integrated DSP processing blocks

• Power as low as 7 mW standby, typical

• DPA-hardened, AES256, SHA256, on-demand NVM data

integrity check

• SEU-protected/tolerant memories: eSRAMs, DDR bridges

4

General Purpose Applications

PCIe 1G Control Plane• PCIe Gen2 in 10K LE devices

with I/O expansion

Multi-Axis Motor Control• Deterministic and secure multi-axis/

high-RPM solutions• Motor control IP and development kit

SmartFusion2 SoC FPGA

System ControlPWM Timing

PID ControlLoop

Transforms

Host Interface

eNVM,eSRAM

PowerManagement

Timing

AutomationController/Host CPU

Inverter Bridge,IGBTs,

SiC MOSFETS

PowerSupply/

Conversion

Sensors:Speed, Torque,

Position A/DConversion

IEEE 1588 Slave/Client• IEEE 1588 IP and small form factor,

Cortex-M3, low power

Peripherals

Flash,SRAM

CPU

MCU

GigabitEthernet PHY

SERDES

Security

FPGAFabric

SmartFusion2 SocFPGA

ARM®

Cortex™-M3Processor

10/100Ethernet PHY

DDR3DRAM

LCD

I2CGPIO

SPI

SPI

USB

PCIe

DDR3DRAM

SPI FLASH

SPI Flash

DDR3 Oscillator

SPI Clockand PPS

SmartFusion2 Soc FPGA

ZL30722

VSC8572PHY

IEEE 1588PLL

SyncEPLL

TimeStamp Unit

1588 PTPOC IP

TransportLayer

Protocols

ARM®

Cortex™-M3Processor

SPI InterfaceTime

Stamp Unit

AlgorithmTime andSynch IP

5

General Purpose Applications

Secure Connectivity–Gaming • Security, anti-tamper, and

Ethernet MAC low power SmartFusion2 SoC FPGA

BatteryMonitor

Anti-TamperMonitor

Ethernet PHYSpeaker,Key Pad,Joy Stick

SystemMonitoring

EthernetMAC

HMIInterface

SystemDiagnostics

I/OExpander

MemoryController

PCIeInterfaceBattery

HostProcessor

DDRMemory

Status LEDsSerial IO,Diagnostics Port

PCIe

Anti-TamperingSensors

OOO

HostProcessor PoE

Managers

eSPII2C

PMBus

StatusLEDs

SGMII

SGMII

SGMII

SGMII

SGMII

RJ45/SFP

RJ45/SFP

RJ45/SFP

5 V PoLSupply

PMBusInterface

eSPIController

I2CController

SystemControl

EthernetSwitch

PoEPD69208

PoEPD69208

EthernetPHY

EthernetPHY

EthernetPHY

PoEPD69208

ClockManagement

SmartFusion2 SoC FPGA

3.3 V PoLSupply

2.5 V PoLSupply

1.5 V PoLSupply

Board Initialization• PMBus, instant-on, and MSS peripherals

Audio Processing, Storage, and Retrieval• I2S to SPI bridge allows multiple audio recordings and playbacks

SmartFusion2 SoC FPGA

Conversion,Buffering &Formatter

Host Interface

I2SInterface

SPIInterfaceTimberwolf

ZL38051Audio Processor

2 DigitalMEMS

Microphones

Audio Jack

SPI Flash

6

Alpha/Neutronparticlesstrikeroutingmatrix

SRAM Configuration Failures

Flash FPGANo Error

SRAM FPGAFunctional Failure

Clear Advantages

Lowest PowerSmartFusion2 Reduces Total Power

• Flash FPGAs deliver lowest power without sacrificing performance

• 70 mW per 5G SERDES (PCIe Gen2) • Flash*Freeze ultra low power mode 12 mW

Proven SecurityProtect Systems from Over-building and Cloning

• HSMs protection from overbuilding • DPA countermeasures protect bitstream from cloning• Only FPGA vendor with validated DPA countermeasures• Secure boot for FPGAs and processors

Exceptional Reliability• Error-free SEU immune fabric configuration • No scrubbing required • All SoC memory SEU-protected • Built-in error detection and correction• SEU-tolerant implementation • Devices deployed in safety-critical and mission-critical systems

The following logo is a trademark of Cryptography Research, Inc. used under license.

7

Software IDE SoftConsole Keil MDK IAR Embedded Workbench®

Free Versions from Microsemi Free with Libero SoC 32K Code Limited 32K Code Limited

Available from Vendor N/A Full version Full Version

Compiler GNU GCC RealView® C/C++ IAR ARM Compiler

Debugger GDB Debug µVision Debugger C-SPY® Debugger

Instruction Set Simulator No µVision Simulator Yes

Debug Hardware FlashPro4 ULINK®2 or ULINK-ME J-LINK™ or J-LINK Lite

Trace Capability No ULINKpro JTAGjet-Trace

Microsemi’s Libero® System-on-Chip (SoC) is a comprehensive software toolset for designing with Microsemi SmartFusion2 SoC FPGAs. Libero SoC manages the entire design flow from design entry, synthesis, and simulation, through place-and-route, timing, and power analysis, with enhanced integration of the embedded design flow. Microsemi’s Libero SoC design suite offers high productivity with its comprehensive, easy-to-learn, easy-to-adopt development tools that are used for designing with Microsemi’s power efficient flash-based IGLOO2 devices. The suite integrates industry standard Synopsys Synplify Pro synthesis and Mentor Graphics ModelSim simulation with best-in-class constraints management, debug capabilities, timing analysis, power analysis, secure production programming and push button design flow.

This comprehensive suite features an intuitive design flow with GUI wizards to guide the design process. Its easy-to-adopt single-click synthesis to programming flow integrates industry-standard third-party tools, a rich IP library of DirectCores and CompanionCores, and supports complete reference designs and development kits.

http://www.microsemi.com/products/fpga-soc/design-resources/design-software/libero-soc#downloads

Intellectual PropertyMicrosemi enhances your design productivity by providing an extensive suite of proven and optimized IP cores for use with Microsemi FPGAs. Our extensive suite of IP cores covers all key markets and applications. Our cores are organized into Microsemi-developed DirectCores and third-party-developed CompanionCores. Most DirectCores are available for free within our Libero tool suite and include common communications interfaces, peripherals, and processing elements.

Functionality DirectCore Examples

Connectivity UART,16550, 429, PCI, JESD204B

DSP CIC, FFT, FIR, CORDIC, RS

Memory Controller FIFO, DDR, QDR, SDR, MemCtrl, MMC

Processor 8051, 8051s, ARM7TDMI

Ethernet MII, RGMII, GMII, SGMII

Security DES, 3DES, AES, SHA

Functionality CompanionCores Examples`

Connectivity CAN, CANFD, PCIE, VME

DSP FFT, JPEG, RS, DVBMOD

Memory Controller SDRAMDDR, Flash, SD

Processor 80188, 80186, LEON3, 6809

SecurityMD5, ARC4, RNG, ZUC, AES, SHA, 802.1ae (MACSec)

http://www.microsemi.com/products/fpga-soc/design-resources/ip-cores

DirectCore™

CompanionCore™

System Builder Wizard

SmartFusion2 Design Resources

©2016 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are registered trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners.

Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any particular purpose, nor does Microsemi assume any liability whatsoever arising out of the application or use of any product or circuit. The products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction with mission-critical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer’s responsibility to independently determine suitability of any products and to test and verify the same. The information provided by Microsemi hereunder is provided “as is, where is” and with all faults, and the entire risk associated with such information is entirely with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this document is proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at any time without notice.

Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for aerospace & defense, communications, data center and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world’s standard for time; voice processing devices; RF solutions; discrete components; enterprise storage and communication solutions, security technologies and scalable anti-tamper products; Ethernet solutions; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is headquartered in Aliso Viejo, California and has approximately 4,800 employees globally. Learn more at www.microsemi.com.

Microsemi Corporate HeadquartersOne Enterprise, Aliso Viejo, CA 92656 USAWithin the USA: +1 (800) 713-4113 Outside the USA: +1 (949) 380-6100 Fax: +1 (949) 215-4996Email: sales.support@microsemi.com www.microsemi.com

SmartFusion2 Features M2S005 M2S010 M2S025 M2S050 M2S060 M2S090 M2S150

Logic/DSP

Maximum Logic Elements (4LUT + DFF) 6,060 12,084 27,696 56,340 56,520 86,184 146,124

Math Blocks (18×18) 11 22 34 72 72 84 240

Fabric Interface Controllers (FICs) 1 2 1 2

PLLs and CCCs 2 6 8

Security AES256, SHA256, RNG AES256, SHA256, RNG, ECC, PUF

MSS

Cortex-M3 + instruction Cache Yes

eNVM (K Bytes) 128 256 512

eSRAM (K Bytes) 64

eSRAM (K Bytes) Non-SECDED 80

CAN, 10/100/1000 Ethernet, HS USB 1 Each

Multi-Mode UART, SPI, I2C,Timer 2 Each

Fabric Memory

LSRAM 18K Blocks 10 21 31 69 109 236

uSRAM 1K Blocks 11 22 34 72 112 240

Total RAM (K bits) 191 400 592 1,314 2,074 4,488

High Speed

DDR Controllers (count × width) 1×18 2×36 1×18 2×36

SERDES Lanes 0 4 8 4 16

PCIe End Points 0 1 2 4

User I/O

MSIO (3.3 V) 115 123 157 139 271 309 292

MSIOD (2.5 V) 28 40 62 40 106

DDRIO (2.5 V) 66 70 176 76 176

Total User I/Os 209 233 267 377 387 425 574

I/Os Per PackagePackage Options

Package Type FCS(G)325 VF(G)256 FCS(G)536 VF(G)400 FCV(G)484 TQ(G)144 FG(G)484 FG(G)676 FG(G)896 FC(G)1152

Pitch (mm) 0.5 0.8 0.5 0.8 0.5 1.0 1.0 1.0 1.0

Length × Width (mm) 11×11 14×14 16×16 17×17 19×19 20×20 23×23 27×27 31×31 35×35

Device I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes I/O Lanes

M2S005 (S) — — 161 — — — 171 — — — 84 — 209 — — — — — — —

M2S010 (S/T/TS) — — 138 2 — — 195 4 — — 84 — 233 4 — — — — — —

M2S025 (T/TS) 180 2 138 2 — — 207 4 — — — — 267 4 — — — — — —

M2S050 (T/TS) 200 2 — — — — 207 4 — — — — 267 4 — — 377 8 — —

M2S060 (T/TS) 200 2 — — — — 207 4 — — — — 267 4 387 4 — — — —

M2S090 (T/TS) 180 4 — — — — — — — — — — 267 4 425 4 — — — —

M2S150 (T/TS) — — — — 293 4 — — 248 4 — — — — — — — — 574 16

Note:090 FCSG325 is 11x13.5 package dimension

Highlighted devices can migrate vertically in the same package.

SmartFusion2 Product Family

SF2-10/16