The Integrated Design of a MEMS-based Flow-Sensor System Nicolas André, Université catholique de Louvain, Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Louvain-la-Neuve, Belgium Laurent A. Francis, Université catholique de Louvain, Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Louvain-la-Neuve, Belgium Jean-Pierre Raskin, Université catholique de Louvain, Institute of Information and Communication Technologies, Electronics and Applied Mathematics, Louvain-la-Neuve, Belgium Philippe Nachtergaele, Open Engineering, R&D, Liège, Belgium Jean-Marc Vaassen, Open Engineering, R&D, Liège, Belgium Joe Civello, Agilent Technologies, Agilent EEsof EDA, Santa Rosa CA, USA Sébastien Cases, SoftMems, Grenoble, France Stéphane Paquay, Open Engineering SA, Liège, Belgium Erwin De Baetselier, Open Engineering SA, Liège, Belgium

1 Abstract A high level of functional integration is critical for successfully building smart systems. Existing design flows focus mostly on system level integration. However, to capture all multiphysics interactions and optimize the sensitivity of a smart transducer system such as a MEMS shear stress flow sensor based on capacitive effects, it is important to simulate the fluid-structure interactions (FSI) together with the electronics circuitry. To interface extremely small capacitance variations (several hundred femtoFarads depending on the out-of-plane beam deflection) from a capacitive transducer, co-integration of the MEMS transducer with an integrated read-out integrated circuit (IC) is mandatory to minimize parasitic elements and thus provide high resolution. We need to ensure the system's performance with regards to sensitivity, low consumption in view of high autonomy, reliability for extended lifetime while limiting its cost. For that we opted for a SoC (System-on-Chip) technology. We have co-integrated the sensor with its electronic interface using thin film SOI technology wafers and traditional CMOS-compatible layers. We demonstrate a design and process flow for integrated 3D MEMS/IC, able to address complex multi-technology and multi-physics challenges on the MEMS/IC as well as the packaging level.

2 Introduction Co-integration of CMOS circuits and MEMS within a single package is often seeked to improve sensors performance or integration level while cutting down the production costs. To interface extremely small capacitance variations (several

hundred femtoFarads depending on the out-of-plane beams deflection) from a capacitive transducer, co-integration of the MEMS transducer with an integrated read-out IC is mandatory to minimize parasitic elements and thus provide high sensitivity. A SoC (System-on-Chip) technology, building the sensor and the circuit on the same substrate using thin film SOI technology wafers and traditional CMOS-compatible layers, following by a post-process release as in [1]-[2], is presented in this work. Silicon-on-Insulator (SOI) technology, with unique properties such as harsh environment resistance and low power consumption [3], is presented here as a platform for CMOS and MEMS co-integration. An original CMOS-compatible process has been developed for the design and the co-fabrication of out-of-plane (3D) movable cantilevers and ring oscillators (RO) circuits on the same chip. The measured transducer, by deflection of the out-of-plane MEMS component, shows 10% variation of the frequency under no velocity and 120m/s. As a complement to the fabrication, a thermomechanical model with 2 layers simulates the internal stress value according to the observed deformation with model updating technology. This model tool allows retrieving the value of the capacitance for given values of the fluid flow (FSI or Fluid Structure Interaction).

3 SoC Description 3.1 Fabrication Classically with micro-electro-mechanical system (MEMS), microcantilevers are widely used in atomic force microscopy (AFM), mass sensing, and contact sensing and force measurements. A change in surface tension or surface stress, due to interfacial interactions between the surface and the environment or intermolecular interactions on the surface, is detected electrically either via resistive or capacitive integrated transducers. In this section, we introduce a method to fabricate three-dimensional cantilevers using both microfabrication techniques and mechanical stress in multilayered thin films and to co-integrate this mechanical sensing component and the complementary metal-oxide semi-conductor (CMOS) circuit on a same silicon chip. The term three-dimensional (or 3-D) is used here to specify a structure presenting a non-flattened geometry, i.e. an out-of-plane curvature when the reference plane is the silicon substrate surface. Movable 3-D cantilevers offer detection as a result of a stimulus changing their deflection. This change in deflection (due to a flow for example) bends downwards or upwards the cantilevers, respectively, increasing or decreasing their equivalent capacitance. For 3-D MEMS based cantilevers, several techniques have been proposed in the literature: projection micro-stereolithography [4], plastic deformation under magnetic field [5], reflow of solder hinges [6], multi-stack silicon-direct wafer bonding [7]. In [8], the incorporation of a probe tip under the released structures is even done to reach such a shape. Finally in our work [9], a novel miniaturization technique, based on appropriate use of built-in stresses, is used to obtain the 3-D MEMS component.

Fig. 1: Schematic cross section of an SOI flow anemometer:

before release (left) and after release (right). In the purpose of going further towards the embedded microsystem, CMOS circuits and MEMS sensors need to be co-integrated. The most critical steps for our chosen process are the thermal annealing and the release of MEMS without degrading CMOS circuits. Figure 1 presents the co-integrated flow anemometer, before MEMS release, with completed IC part, and immediately after release with an IC-respectful dry SF6-plasma etching (25 W, 30 min). At that point, a 432°C annealing concludes the process. Focusing on 3-D beams, the manufacturing process is the following:

• First, the silicon oxide layer (0.25 µm thickness) is deposited at a temperature of 300°C.

• Next, the system is cooled down to room temperature. All steps for IC take place (photolithographies, etchings, depositions, implantations).

• The aluminium layer (1 µm-thick) is deposited over the silicon oxide at 150°C. • The system is then cooled down to a temperature of 20°C and the 2 layers are

released from the substrate. Due to layer thicknesses, deposition temperatures and highly different thermal expansion coefficients, the beam bends slightly upwards.

• Finally, to get an important elevation of the beam in the positive direction (upwards), an annealing at 432°C is performed to increase the internal stress in aluminium layer (due to plasticity effect). Then, after cooling down the released microstructures to 20°C (room temperature), the beam curls up as shown in Fig. 3.

Co-integration of our microsystem with the circuit requires in brief 2 extra lithographic steps, mainly to protect the MEMS areas when processing only the IC part (implantations, etchings, etc.) and protect the IC part when processing only the MEMS devices (dry etching). 3.2 Ring oscillator In a fluid flow, the 3-D shaped cantilevers are deformed due to the fluid-structure interaction. The cantilever forms by design the moving electrode of a variable capacitance, the counter-electrode being static and located on the surface of the substrate in close proximity to the cantilever. The integrated capacitors are then sensed by a 5-stages ring oscillator providing an image of the fluid’s velocity. The dimensions for the interdigitated capacitor are the following: 200 µm-long, 10 µm-

wide and 1.25 µm-thick (composed of 250 nm SiO2 and 1 µm Al-Si alloy) for out-of-plane cantilevers and identical dimensions for in-plane beams forming the counter-electrode except their width, which is of 30 µm. Each couple composed of 2 curved beams and 2 flat beams (in-plane) corresponds to a 50 fF capacitance connected directly to the output node of a CMOS inverter (Fig. 2). In order to decorrelate the temperature effect from the airflow, a quasi-identical 5-stage ring oscillator without out-of-plane movable beams is measured in parallel.

Fig. 2: Electrical assembly schematic – oscillation frequency sensitive to C (C variable with airflow rate).

4 Micromechanical analysis

4.1 Multimorph bending The 3-D shape relies precisely on the control of the internal stresses in multilayered structures originating from thermal expansion mismatch between constituting layers as well as on the control of the plastic yielding of a metallic layer (see next subsection).

Fig. 3: Close view of out-of-plane microbeams.

4.2 Simulation and modeling The simulation of the MEMS part was achieved with Oofelie: Multiphysics and performed in 3 steps. i) To exactly simulate the whole process is not necessary to model the beam behavior under airflow. For example, the aluminium plasticity analysis is skipped and to reproduce the correct curvature and deformation of the beam at the working temperature with no flow, a thermomechanical model with 2 layers is defined in the simulation software. For the oxide layer, we impose the internal stress related to a temperature decrease of 280°C. For the aluminium layer, the internal stress value is computed according to the observed deformation with model updating technology. ii) After the first step, a correct prediction of the internal beam stresses allows a mechanical prediction of the beam behavior with Fluid Structure Interaction simulation (FSI). After FSI simulation, the beam curvature is provided as a function of the fluid flow. iii) Once this beam curvature is predicted, we finally use BEM technology to compute the capacitance between the movable and fixed electrodes. For maximum performance, a FMM solver is used to extract these values of the capacitance. After the last analysis, the value of the capacitance as a function of the fluid flow can then be extracted. 4.3 Link with EDA tools Simulation flow presented here above allows retrieving the value of the capacitance for given values of the fluid flow. However, in order to perform system simulation, a model of the variable capacitance as a continuous function of the fluid flow is required. Such model can be generated in OOFELIE using SEM, that corresponds to multiphysic compact (few degrees of freedom) but accurate models. Usually automatically extracted from 3-D models, SEM can also be created using experimental or numerically sampled data. This last feature will be used to generate an analytical expression of the variable capacitance model. One of the SEM interfacing capabilities is the ability to export them in Verilog-A and VHDL-AMS for simulation inside EDA tools such as ADS (Agilent EEsof EDA Advanced Design System) or to export them to the MEMS simulation suite of SoftMEMS. 4.4 EDA Circuit Co-simulation The Verilog-A model created is imported as an ADS device. The model behaves as a variable capacitance as a function of the airflow. This setup permits to simulate the complete flow, from the MEMS design up to the electronic circuit that it is part of.

Fig. 4: Simulation flow principle.

5 Results 5.1 Set-up The measurement set-up includes a Suss microtech hollow nozzle placed at 100 µm above the circuit for applying a constant pressure through it. As a flow is constantly escaping, the movable out-of-plane cantilevers bend correspondingly. A white light interferometer Polytec MSA 500 measures the cantilevers topography under flow through a transparent window and a 10x Mirau objective placed at the top of the nozzle. Beams tips are in average 140 µm-height from the substrate surface when no pressure is applied, and almost totally flat for 2 bars applied pressure.

Fig. 5: SEM picture of a flow anemometer. Fig. 6: Measurement set-up for flow

stimulus and electrical probing.

5.2 Measurements Figure 7 illustrates the RO frequency shift as a function of the applied pressure, showing 10 % variation between no beam deflection (i.e. no flow or pressure) and maximum beam deflection (movable beams being in the substrate plane). The correspondence between each applied pressure and the flow rate is obtained by adding a flowmeter before the exit. The Bernoulli law governing the escaping flow then approximates the current applied velocity. This behavior was also simulated using Oofelie Multiphysics. For a range of flow velocities from 0 to 120 m/s (i.e. from atmospheric pressure to applied 2 bars), there was a measurable change in oscillating frequency over a range of 270 kHz to 240 kHz.

Fig. 7: Frequency variation for different applied pressures, with a Suss®-made pressure nozzle and 2 different flow anemometers.

6 Conclusions 3-D SOI sensors were built and characterized under various airflows illustrating the 3-D stressed-cantilever concept. Micro-integrated sensors can easily be built incorporating their associated electronics on the same chip. Such minimalist flow transducers offer a list of advantages such as CMOS compatibility, SOI process, simple to build 3-D microstructure, no direct current consumption due to capacitive detection, extremely low power consumption, of the order of 0.1 µW as well as occupy small chip area (1.25 mm2 including CMOS circuits and MEMS). The presented technology can then be seen as a technology for the fabrication of highly integrated low-power MOS circuits, built with co-integrated MEMS sensors.

7 Acknowledgment The authors are very grateful to P. Simon and D. Van Vynckt for support in characterization tests and C. Renaux for the CMOS process.

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