1. One-half of

the CHAMP-WB-

DRFM consists

of the CHAMP-

WB 6U OpenVPX

base board

assembly.

defenseelectronics.com

SINGLE BOARD CAPTURES, Digitizes DC to 6 GHz

CAPTURING AND digitizing broad swaths of spectrum is now an essential function in many

applications. Because of the large amount of digital processing now performed in many systems, platforms ranging from electronic-intelligence (ELINT) and signal-intelligence (SIGINT) to radar and electronic-warfare (EW) systems can all benefit from fast digitizers with broad, instantaneous bandwidths. The CHAMP-WB-DRFM OpenVPX board from Curtiss-Wright (www.cwcdefense.com) in partnership with Tektronix Component Solutions (www.tektronix.com) is the first product to address this challenge at the board level.

This new offering uses an analog-to-digital converter (ADC) from Tektronix that samples at 12 GSamples/s to digitize

a bandwidth of 6 GHz. This single-board solution also features a 12-GSamples/s digital-to-analog converter (DAC) at its output, and a Virtex-7 field-programmable gate array (FPGA) from Xilinx (www.xilinx.com) working at 12 GSamples/s.

The CHAMP-WB-DRFM VPX board consists of Curtiss-Wright’s CHAMP-WB baseboard assembly (Fig. 1) with the FPGA supported by 8 GB of DDR3L SDRAM and the TADF-4300 Enhanced FMC mezza-nine card (Fig. 2) with the ADC and DAC; together they form the CHAMP-WB-DRFM (see Table). As the 6-GHz band-width of the CHAMP-WB-DRFM is nearly three times that of its nearest board-level competitor, it offers possibilities unavail-able before. For example, EW, SIGINT, ELINT, and other surveillance systems must scan over a broad range of frequen-

GTRI STUDIES BLAST EFFECTS ON SOLDIERSJACK BROWNE /Contributing Editor

AS IMPROVISED explosive devices (IEDs) have become

more prominent on the battlefield, it has become correspondingly imperative for the United States Armed Forces to fully understand the destructive effects of these weap-ons on their troops. GE Intelligent Platforms (www.ge.com) has been working with the Georgia Tech Research Institute (GTRI) to gain more insight into the neurological injuries that can sometimes result from IEDs.

GTRI was made a part of the Integrated Blast Effects Sensor Suite (I-BESS) program by the US Army Rapid Equipping Force (REF). The program was created to record IED blast information that can later be analyzed by doctors; the hope is to eventually help diagnose and deter-mine the best way to treat soldiers with concussions or brain injuries. Sensors are located throughout military vehicles, as well as on sol-diers’ seats, to capture data during a traumatic event. In addition, soldiers carry smartphone-sized data record-ers and a variety of sensors to gather additional data.

(continued on p. 8)

Advanced Super Hornet slices radar signature 8

Simulator checks system performance 24

Digital correction revivesdirect-conversion receivers 14

GO TO MWRF.COM/DEFENSEELECTRONICS S1

A Special Section to PENTON’S DESIGN ENGINEERING & SOURCING GROUP OCTOBER/NOVEMBER 2013

DENIS SMETANA Product Marketing Manager, GARY GONCHER, System Architect

(continued on p. 30)

S30 OCTOBER/NOVEMBER 2013 DEFENSE ELECTRONICS

COVER STORY

cies, so this capability to bridge the gap between the analog signal from the antenna and the point at which it enters the digital domain, without requiring a frequency downconverter for input frequencies to 6 GHz, helps reduce the size, weight, power consumption, and overall complexity of the receive path.

Such capability can also be useful in measurement appli-cations such as radar test ranges where it can capture and externally store information using the 200 Gb/s of available backplane bandwidth. These tests are performed to judge the performance of an aircraft’s radar, radar warning receiver (RWR), or EW system during multiple passes through the test range while being subjected to threats transmitted from the ground. Spectrum management and long-term surveillance are other applications.

Using the CHAMP-WB-DRFM as the core conversion and processing portion of a digital RF memory (DRFM) in a fighter air-craft as an example, the analog signal from an antenna or downconverter is directly digitized by the ADC on the TADF-4300 and sent via LVDS to the FPGA. Customer-supplied algorithms resident in the FPGA scour the captured signal stream to find the comparatively narrowband signals from an enemy radar.

If such signals are found, the FPGA performs the signal process-ing tasks required to confuse the radar, drawing on a threat library or other data stored in the synchronous dynamic random-access memory (SDRAM) on the CHAMP-WB-DRFM board. The output of the FPGA, which is a modified version of

3. Two CHAMP-WB-DRFM boards combined with a CHAMP-AV9 computing and signal processing

board can perform low-and high-resolution signal detection, pre-and post-processing, and applica-

tion processing.

2. The other part of the VPX solution is the Enhanced FMC mezzanine

card. The two parts combine to digitize an analog bandwidth of 6 GHz

with 8-b resolution, provide signal processing using a Virtex-7 FPGA,

and reconvert the signal to analog form using a 10-b DAC.

THE CHAMP-WB, TADF-4300, AND FMC-516 SPECIFICATIONS AT A GLANCE.

CHAMP-WB

FPGA digital signal processing 3600 25 x18 MACs (1 TFLOP)

FPGA general purpose processing 980,000 logic cells, 1.2 million FFs

FPGA internal memory 54 Mb

On-board memory 8 Gbytes

Memory bandwidth 19.2 Gbytes/s

Mezzanine bandwidth (per site) 154 Gb/s

Backplane data bandwidth 200 Gb/s

TADF-4300

Maximum sampling frequency 12 GSamples/s

Bandwidth 6000 MHz

Number of channels 1 or 2

Resolution 8 b

Effective number of bits (30 kHz to 6 GHz) More than 6.1

Spurious-free dynamic range (30 kHz to 6GHz) More than 40 dBc

FMC-516

Maximum sampling frequency 250 MHz

Bandwidth 500 MHz

Number of channels 4

Resolution 16 b

Effective number of bits (typ.) 11.3

Spurious-free dynamic range (typ.) 84 dB FS

the original input stream, is sent to the TADF-4300 and reconverted to analog form and then sent off-board to an upconverter, transmitter, and antenna.

A SIGINT scenario that requires higher-resolution samples of the signals detected and processed by the CHAMP-WB board and TADF-4300 is shown in Fig. 3. In this case, the high-bandwidth CHAMP-WB-DRFM board is comple-mented by a second CHAMP-WB board with two four-channel FMC-516 mez-zanine cards that can capture as many as eight signals with 16-b resolution.

The CHAMP-WB-DRFM (shown on the left-hand side of Fig. 3) performs conversion and initial processing func-tions. The second CHAMP-WB shown (on the right-hand side of Fig. 3) has the two FMC-516 mezzanine cards, which have a narrower bandwidth but higher (16-b) resolution. With their eight inde-pendent channels (four on each card),

they can receive the signals of interest identified by the first CHAMP-WB-DRFM at their original frequencies but analyze them in greater detail.

A system control board is required to coordinate the multiple receivers. The Curtiss-Wright CHAMP-AV9 computing and signal processing board performs this function, employing two fourth-generation Intel i7 quad-core pro-cessors with 16 GB of DDR3 SDRAM, a Gen3 PCIe switch, and interfaces to network-attached storage via its four 40-Gb/s Gigabit Ethernet interfaces. It also provides four USB 3.0 and four SATA 3 interfaces for local storage, dis-plays, or other USB or SATA-enabled devices. With the combined eight cores of the i7 processors operating in paral-lel, the CHAMP-AV9 has more than 1.3 TFLOPS processing power, allowing a variety of analysis and data to and from each CHAMP-WB-DRFM board. All

boards communicate via PCIe 3.0.This three-board subsystem adds

considerable functionality. Its 40-Gb/s Gigabit Ethernet and Gen3 PCIe inter-faces allow the broadband data stream from the left CHAMP-WB-DRFM or the fine-tuned, higher-resolution “signals of interest” data stream on the right (or both) to be sent to and received from external RAID hard drives or solid-state storage modules.

The addition of a workstation or laptop computer and signal analysis software forms a complete system that performs broadband “direct-to-digital” signal capture; coarse and fine signal identification; pre-and post-processing; high-speed data transfer between all ele-ments of the system; detailed waveform analysis and other RF measurements; and high-capacity data storage.

DENIS SMETANA | Product Marketing Manager,

FPGA Products, ISR Solutions

Curtiss-Wright Controls Defense Solu-

tions, 20130 Lakeview Center Plaza, Ste. 200, Ashburn, VA 20147; (703) 779-7800, email: defensesales@curtisswright.com, www.cwcdefense.comGARY GONCHER | System Architect

Tektronix Component Solutions, Beaver-ton, OR; (503) 627-6201, e-mail: gary.gon-cher@tektronix.com, www.tektronix.com

COVER STORY

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Email: info@signalantenna.com

S32 OCTOBER/NOVEMBER 2013 DEFENSE ELECTRONICS