Silicon wafer fabrication - Northeastern University

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Silicon wafer fabrication • Taken from www.egg.or.jp/MSIL/english/index-e.html

Transcript of Silicon wafer fabrication - Northeastern University

Page 1: Silicon wafer fabrication - Northeastern University

Silicon wafer fabrication• Taken from

www.egg.or.jp/MSIL/english/index-e.html

Page 2: Silicon wafer fabrication - Northeastern University

Silicon wafer fabrication – slicing and polishing• Taken from www.egg.or.jp/MSIL/english/index-e.html

Page 3: Silicon wafer fabrication - Northeastern University

Wee

k 1

Wee

k 2

N-type Si wafer <100>

Pre-diffusion cleanPad oxidation

Spin photoresist

PR

SiO2

O2

ECE 1406 PMOS Fabrication Sequence

Expose PR with active area maskand develop

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Wee

k 3

Wee

k 4

Etch Active Area

Gate oxidation

Deposit LPCVD polysilicon

Poly

PR/etch gate maskStrip PR

O2

SiH4

SFO

6

2

Wee

k 2

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Wee

k 5

Wee

k 6

Ion implant BF2+

Pre-diffusion cleanDrive-in/oxidation

PR/etch contact maskStrip PR

CleanSputter deposit Al/1%Si

Al/Si

P doped areas

OH O

2

2

Ar

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Wee

k 6

PR/etch metal maskStrip PRAnneal

Source

DrainGate (contact not shown)

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Influenza Virus

50 nm Transistor

6 LevelMetallization

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IBM 7-Level Cu Metallization

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Micromachining Ink Jet Nozzles

Microtechnology group, TU Berlin

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TI Digital Micromirror Device

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MEMS Gyroscope Chip

1µm Drive

0.01Å Sense

J. Seeger, X. Jiang, and B. Boser

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Single chip six-degree-of-freedom inertial measurement unit (uIMU) designed by IMI

principals and fabricated by Sandia National Laboratories

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Gene chips, proteomics arrays.

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NEMS: TOWARD PHONON COUNTING: Quantum Limit of Heat Flow.

RoukesGroupCal TechTito

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Biological Nanomotor

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What is a Microswitch?

Surface Micromachined5-500 Micron Size5-300 V Actuation

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source

source

source

gate

gate

gate

drain

drain

drain

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source

source

gate

gate

drain

drain

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Two-Contact Switch

Beam

Gate

Drain

Contact

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MEMSMicroswitch

Contact

Contact

Contact

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LPCVD Systems


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