Signal Processing - Fraunhofer
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Digital signal processing enables efficient equaliza- tion of transmission impairments in optical communi- cation systems. The high symbol rates in optical trans- port networks require massive parallelization and highly efficient implementation of these equalization algorithms. Challenges n Coding and Encoding n Electronic predistortion n Carrier recovery for coherent receivers n Digital electronic distortion equalization n Digital nonlinearity mitigation n Forward error correction n DAC and ADC synchronization n High-bandwidth FPGA interfacing Services Expertise of Fraunhofer HHI technical experts covers n Algorithm design and engineering n Optimized HDL implementation of custom DSP algorithms n Simulation and FPGA implementation of HDL code n Experimental validation through transmission experiments High-Speed Digital Signal Processing Algorithm Engineering and IP Core Licensing www.hhi.fraunhofer.de Photonic Networks and Systems Benefits n Advanced algorithms from the forefront of research n Fast development cycles from first algorithms to real-time implementation n Customizable designs and adjustments [1] Algorithm Engineering: Different levels of DSP algorithms for advan- ced 4D modulation formats: 6PolSK-QPSK [1]. 2. Signal after frontend correction and CD compensation 3. Signal after equalization 1. Received signal 4. Signal after carrier recovery
Transcript of Signal Processing - Fraunhofer
Digital signal processing enables efficient equaliza-tion of transmission impairments in optical communi-cation systems. The high symbol rates in optical trans-port networks require massive parallelization and highly efficient implementation of these equalization algorithms.
Challenges
n Coding and Encoding
n Electronic predistortion
n Carrier recovery for coherent receivers
n Digital electronic distortion equalization
n Digital nonlinearity mitigation
n Forward error correction
n DAC and ADC synchronization
n High-bandwidth FPGA interfacing
Services
Expertise of Fraunhofer HHI technical experts covers
n Algorithm design and engineering
n Optimized HDL implementation of custom DSP algorithms
n Simulation and FPGA implementation of HDL code
n Experimental validation through transmission experiments
High-Speed Digital
Signal Processing
Algorithm Engineering and
IP Core Licensing
www.hhi.fraunhofer.dePhotonic Networks and Systems
Benefits
n Advanced algorithms from the forefront of research
nFastdevelopmentcyclesfromfirstalgorithmstoreal-time implementation
n Customizable designs and adjustments
[1] Algorithm Engineering: Different levels of DSP algorithms for advan-
ced 4D modulation formats: 6PolSK-QPSK [1].
2. Signal after frontend correction and CD compensation
3. Signal after equalization
1. Received signal
4. Signal after carrier recovery
Exemplary IP-Core
High-Speed OFDM IP Core Features
n Up to 64 Gbit/s net data rate at physical layer
n Optional 40G Ethernet interface
n Up to 1024 subcarriers
n Independent electrical I and Q signals
n 2 x 8 GHz signal baseband bandwidth
nConfigurableOFDMparameters
www.hhi.fraunhofer.de Photonic Networks and Systems
References
n [1] J. K. Fischer, S. Alreesh, R. Elschner, F. Frey, C.Meuer,L.Molle,C.Schmidt-Langhorst,T.Tanimura,C. Schubert, „Experimental Investigation of 126-Gb/s 6PolSK-QPSK signals“ Opt. Express, vol. 20, no. 26, pp. B232-B237, Dec. 2012
n [2]R.Elschner,F.Frey,C.Meuer,J.K.Fischer,S.Alreesh,C.Schmidt-Langhorst,L.Molle,T.Tanimuraand C. Schubert, „Experimental demonstration of a format-flexiblesingle-carriercoherentreceiverusingdata-aided digital signal processing,“ Opt. Express, vol. 20, no. 27, pp. 28786-28791, Dec. 2012
CONTACT
Dr.-Ing. Johannes Fischer Photonic Networks and Systems Fraunhofer Heinrich Hertz Institute Einsteinufer 37 | 10587 Berlin | Germany
phone +49 30 31002-556 email [email protected] www.hhi.fraunhofer.de/dsp
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[2] IP Core: FPGA placement view of a 64-Gbit/s OFDM transmitter
yellow: interface to DACorange: 1024-point IFFTlight blue: interface to MAC layerblue: cycle prefix insertion blockviolet: bit-loading mask extraction block
