SIC architecture
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The Simplified Instructional Computer (SIC) • SIC is a hypothetical computer that includes the hardware features most often found on real machines • Two versions of SIC • standard model • XE version 1 www.chitkara.edu.in
Transcript of SIC architecture
The Simplified Instructional Computer (SIC)
• SIC is a hypothetical computer that includes the hardware features most often found on real machines
• Two versions of SIC
• standard model
• XE version
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SIC Machine Architecture
• Memory
• 8-bit bytes
• 3 consecutive bytes form a word
• 215 bytes in the computer memory
• RegistersMnemonic Number Special use
A 0 Accumulator; used for arithmetic operationsX 1 Index register; used for addressingL 2 Linkage register; JSUB
PC 8 Program counterSW 9 Status word, including CC
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SIC Machine Architecture
Data Formats• Integers are stored as 24-bit binary numbers;• 2’s complement used for negative values• No floating-point hardware
Instruction Formats
Addressing Modes
opcode (8) address (15)x
Mode Indication Target address calculationDirect x=0 TA=addressIndexed x=1 TA=address+(X) 3www.chitkara.edu.in
SIC Machine Architecture
Instruction Set
• load and store: LDA, LDX, STA, STX, etc.
• integer arithmetic operations: ADD, SUB, MUL, DIV, etc.
• comparison: COMP
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SIC Machine Architecture
• conditional jump instructions: JLT, JEQ, JGT
• subroutine linkage: JSUB, RSUB
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SIC Machine Architecture
Input and Output
• Input and output are performed by transferring 1 byte at a time to or from the rightmost 8 bits of register A
• The Test Device (TD) instruction tests whether the addressed device is ready to send or receive a byte of data
• Read Data (RD)
• Write Data (WD)
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SIC/XE Machine Architecture
Memory
• 220 bytes in the computer memory
More Registers
Mnemonic Number Special useB 3 Base register; used for addressingS 4 General working registerT 5 General working registerF 6 Floating-point acumulator (48bits)
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SIC/XE Machine Architecture
Addressing Modes
How the target address is used?
Mode Indication Target address calculationBase relative b=1, p=0 TA=(B)+disp (0<=disp<=4095)Program-counter b=0, p=1 TA=(PC)+disp (-2048<=disp<=2047) relative
Direct b=0, p=0 TA=disp (format 3) or address (format 4)Indexed x=1 TA=TA+(X)
Mode Indication operand value
immediate addressing i=1, n=0 TA
indirect addressing i=0, n=1 (TA)
simple addressing i=0, n=0 SIC instruction (all end with 00)
i=1, n=1 SIC/XE instruction
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SIC/XE Machine Architecture
Instruction Set• new registers: LDB, STB, etc.
• floating-point arithmetic: ADDF, SUBF, MULF, DIVF
• register move: RMO
• register-register arithmetic: ADDR, SUBR, MULR, DIVR
• supervisor call: SVC
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SIC/XE Machine Architecture
Input/Output
• SIO, TIO, HIO: start, test, halt the operation of I/O device .
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