Shubha Paging Segmentation

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    Paging and Segmentation

    BY,

    Shubha B.

    1PI08LDS16

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    Logical vs. Physical Address Space

    Logical address generated by the CPU; also referred to as

    virtual address.

    Physical address address seen by the memory unit

    Logical and physical addresses are the same in compile-time

    and load-time; logical (virtual) and physical addresses differ in

    execution-time.

    The user program deals with logical addresses; it never sees

    the real physical addresses.

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    Paging

    Memory-management technique that permits the physicaladdress space of a process to be non-contiguous.

    Each process is divided into a number of small, fixed-sizepartitions called pages or Divide logical memory into blocks of

    same size called pages.

    Physical memory is divided into a large number of small, fixed-size partitions called frames.

    When a process is to be executed, its pages are loaded into anyavailable memory frames.

    Some internal fragmentation , but no external fragmentation.

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    Address Translation Scheme

    Operating system maintains apage table for each process

    Contains the frame number foreach process page

    To translate logical to physical

    addresses

    A logical address is divided into:

    Page number (p) used as anindex into a page table which

    contains base address of eachpage in physical memory.

    Page offset (d) combined withbase address to define thephysical memory address that issent to the memory.

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    Paging Model of memory is shown:

    To run a program of size n pages, need to find n free frames and

    load program.

    Set up a page table to translate logical to physical addresses

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    Address translation in paging

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    The following steps are needed for address Translation:

    Given a (page #, offset), find (frame #, offset).

    Assuming the size of a page/frame is 2m bytes , m bits todetermine the offset within a page

    2n > number of pages in process => n bits to hold the pagenumber

    2k > number of frames in memory => k bits to hold the frame

    number

    Logical address is nm

    Physical address is simply km where k is the frame that stores

    page n

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    Paging Example

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    Paging Example

    Page size 4 bytes.

    Physical memory 32bytes.

    Logical address 0 maps to physicaladdress 20 (=(5*4)+0).

    Logical address 3 maps to physicaladdress 23 (=(5*4)+3).

    Page1 is mapped to frame6.It maps tophysical address 24(=(6*4)+0)

    Logical address 13 maps to physicaladdress 9.

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    Page Table Implementation

    Implemented as a set of registers.(if Page table is less).

    Problem: If page table is large, it is not applicable.

    Page table kept in main memory. PTBR register points to the

    Page table. Page-table length register (PRLR) indicates size of

    the page table.

    Problem: In this scheme every data/instruction access

    requires two memory accesses. One for the page table and

    one for the data/instruction.

    Using Translation look aside buffer or associative registers.

    Very fast, very expensive.

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    Memory Protection

    Memory protection implemented by associating protection bitwith each frame.

    Valid-invalid bit attached to each entry in the page table:

    valid indicates that the associated page is in the process

    logical address space, and is thus a legal page

    invalid indicates that the page is not in the process logical

    address space

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    Shared Pages Shared code

    One copy of read-only (reentrant) code shared among processes(i.e., text editors, compilers, window systems).

    Shared code must appear in same location in the logical address

    space of all processes

    Private code and data

    Each process keeps a separate

    copy of the code and data

    The pages for the private code

    and data can appear anywhere

    in the logical address space

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    Two-Level Page Table

    A logical address (on 32-bit machine with 4K page size) isdivided into:

    a page offset consisting of 12 bits.

    a page number consisting of20 bits; further divided into:

    a 10-bit level-2 page number.

    a 10-bit level-1 page number.

    Thus, a logical address look likes

    p1 is an index into the outer page table

    p2 is the displacement within the page of the outer page

    table

    Address translation scheme

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    Advantages

    Easy to allocate memory keep a list of available frames, andsimple grab first one thats free.

    Easy to swap pages, frames, and often disk blocks as well,

    all are same size.

    No external fragmentation

    Any page can be placed in any frame in physical memory

    Sharing of the common code is possible.

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    Disadvantages

    Internal fragmentation: Page size may not match size neededby process

    Wasted memory grows with larger pages

    Page tables are fairly large , so page tables are too big to fit in

    registers, so they must live in physical Memory.

    This table lookup adds an extra memory reference for every

    address translation.

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    Segmentation

    A segment can be defined as a logical grouping of instructions,such as a subroutine, array, or a data area.

    A program is a collection of segments.

    Segmentation is t technique for managing these segments.

    Divide a process into unequal size blocks called segments.

    Each segment has a name and a length.

    Memory Management Scheme that supports user view ofmemory.

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    A segment is a logical unit such as

    main program, procedure, function

    local variables, global variables, common block

    stack, symbol table, arrays

    Protect each entity independently

    Allow each segment to grow independently

    Share each segment independently

    Each of these segments are of variable

    length and length will be defined in the

    program.

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    Segmentation Architecture

    Segment Table Maps two-dimensional user-defined addresses into one-

    dimensional physical addresses. Each table entry has

    Base - contains the starting physical address where the

    segments reside in memory. Limit - specifies the length of the segment.

    A logical address consists of two parts.

    A segment number, s, and an offset, d. Segment number used as index into the segment table.

    The offset d is between 0 and the segment limit.

    The offset is added to the base to produce the physical

    address.

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    If the offset is not within the limit, trap to the operating

    system.(logical address beyond end of segment).

    Segmentation Example:

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    Address Translation

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    Sharing of Segments

    Segments are shared when entries in the segment tables oftwo different processes point to the same physical locations.

    It is possible to share only the parts of the programs.

    Subroutine packages are shared

    among many users.

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    Advantages and Disadvantages Advantages:

    Each segment can be

    located independently

    separately protected

    grow independently

    Segments can be shared between processes.

    Eliminate the fragmentation.

    Disadvantages:

    Allocation algorithms as for memory partitions External fragmentation, back to compaction problem.

    Solution: combine segmentation and paging.

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    Segmentation vs. Paging

    Segment is good logical unit of information sharing, protection

    Segmentation

    Break process up into logical segments

    Segments are generally of different sizes

    Page is good physical unit of information

    simple memory management

    Paging

    Break process up into physical pages

    Pages are the same size

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    Paging Segmentation

    The main memory partitioned into frames

    or blocks.

    The main memory partitioned into

    segments.

    The logical address space divided into

    pages by compiler or MMU

    The logical address space divided into

    segment specified by the programmer.

    Suffers from internal fragmentation or

    page break

    Suffers from external fragmentation.

    Operating system maintains the page

    table.

    Operating system maintains the segment

    table.

    Does not supports the user view of

    memory

    Supports the user view of memory

    Processor uses the page number anddisplacement to calculate absolute

    address.

    Processor uses the segment number anddisplacement to calculate absolute

    address.

    Multilevel paging is possible Multilevel segmentation is possible. But

    no use.

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    Similarity:

    Address space can exceed size of real memory.

    Differences:

    Programmer is aware of segmentation. Paging is hidden.

    Segmentation maintains multiple address spaces per

    process. Paging maintains one address space.

    Segmentation allows procedures and data to be separatelyprotected. This is hard with paging.

    Segmentation easily permits tables whose size varies.

    Segmentation facilitates sharing of procedures between processes.This is hard with paging.

    Pure segmentation suffers from memory fragmentation.

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    Thank you